summaryrefslogtreecommitdiff
path: root/drivers
AgeCommit message (Collapse)AuthorFilesLines
2020-07-17treewide: convert bd_t to struct bd_info by coccinelleMasahiro Yamada71-127/+131
The Linux coding style guide (Documentation/process/coding-style.rst) clearly says: It's a **mistake** to use typedef for structures and pointers. Besides, using typedef for structures is annoying when you try to make headers self-contained. Let's say you have the following function declaration in a header: void foo(bd_t *bd); This is not self-contained since bd_t is not defined. To tell the compiler what 'bd_t' is, you need to include <asm/u-boot.h> #include <asm/u-boot.h> void foo(bd_t *bd); Then, the include direcective pulls in more bloat needlessly. If you use 'struct bd_info' instead, it is enough to put a forward declaration as follows: struct bd_info; void foo(struct bd_info *bd); Right, typedef'ing bd_t is a mistake. I used coccinelle to generate this commit. The semantic patch that makes this change is as follows: <smpl> @@ typedef bd_t; @@ -bd_t +struct bd_info </smpl> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2020-07-17Convert CONFIG_MXC_UART to KconfigTom Rini1-1/+2
This converts the following to Kconfig: CONFIG_MXC_UART Signed-off-by: Tom Rini <trini@konsulko.com> Acked-by: Peng Fan <peng.fan@nxp.com>
2020-07-17Merge https://gitlab.denx.de/u-boot/custodians/u-boot-x86Tom Rini26-54/+1107
- New timer API to allow delays with a 32-bit microsecond timer - Add dynamic ACPI structs (DSDT/SSDT) generations to the DM core - x86: Enable ACPI table generation by default - x86: Enable the copy framebuffer on Coral - x86: A few fixes to FSP2 with ApolloLake - x86: Drop setup_pcat_compatibility() - x86: Primary-to-Sideband Bus minor fixes
2020-07-17Merge tag 'u-boot-imx-20200716' of ↵Tom Rini18-159/+586
https://gitlab.denx.de/u-boot/custodians/u-boot-imx i.MX for 2020.10 ---------------- - i.MX DDR driver fix/update for i.MX8M - i.MX pinctrl driver fix. - Use arm_smccc_smc to remove imx sip function - i.MX8M clk update - support booting aarch32 kernel on aarch64 hardware - fused part support for i.MX8MP - imx6: pcm058 to DM Travis: https://travis-ci.org/github/sbabic/u-boot-imx/builds/708734785
2020-07-17acpi: Enable ACPI table generation by default on x86Simon Glass1-1/+1
This should ideally be used by all x86 boards in U-Boot. Enable it by default. If some boards don't use it, the cost is small. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17x86: apl: Fix save/restore of ITSS prioritiesSimon Glass1-1/+1
The FSP-S changes the ITSS priorities. The code that tries to save it before running FSP-S and restore it afterwards does not work as U-Boot relocates in between the save and restore. This means that the driver data saved before relocation is lost and the new driver just sees zeroes. Fix this by allocating space in the relocated memory for the ITSS data. Save it there and access it from the driver after relocation. This fixes interrupt handling on coral. Also drop the log_msg_ret() in irq_first_device_type() since this function can be called speculatively in places where we are not sure if there is an interrupt controller of that type. The resulting log errors are confusing when there is no error. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17pmc: Move common registers to the header fileSimon Glass1-9/+0
These registers need to be accesses from ACPI code, so move them to the header file. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17p2sb: Add a method to hide the busSimon Glass1-0/+10
The P2SB bus needs to be hidden in some cases so that it does not get auto-configured by Linux. Add a method for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Tested-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17i2c: designware_i2c: Support ACPI table generationSimon Glass3-1/+136
Update the PCI driver to generate ACPI information so that Linux has the full information about each I2C bus. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> [bmeng: Correct one typo in dw_i2c_gen_speed_config() comments] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17i2c: Add log_ret() on errorSimon Glass1-2/+2
Add a few of these calls to make it easier to see where an error occurs, if CONFIG_LOG_ERROR_RETURN is enabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-17i2c: designware_i2c: Add a little more debuggingSimon Glass1-5/+5
Add debugging for a few more values and also use log to show return values when something goes wrong. This makes it easier to see the root cause. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Heiko Schocher <hs@denx.de>
2020-07-17x86: gpio: Add support for obtaining ACPI info for a GPIOSimon Glass1-0/+34
Implement the method that converts a GPIO into the form used by ACPI, so that GPIOs can be added to ACPI tables. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17x86: pinctrl: Drop the acpi_path memberSimon Glass1-4/+0
This is in the device tree now, so drop the unnecessary field here. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17x86: pinctrl: Set up itss in the probe() methodSimon Glass1-4/+4
At present the itss is probed in the ofdata_to_platdata() method. This is incorrect since itss is a child of p2sb which itself needs to probe the pinctrl device. This means that p2sb is effectively not probed when the itss is probed, so we get the wrong register address from p2sb. Fix this by moving the itss probe to the correct place. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17x86: pinctrl: Add multi-ACPI controlSimon Glass2-0/+14
Add a Kconfig to control whether pinctrl is represented as a single ACPI device or as multiple devices. In the latter case (the default) we should return the pin number relative to the pinctrl device. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17x86: pinctrl: Add a way to get the pinctrl reg addressSimon Glass3-14/+28
At present we can query the offset of a pinctrl register within the p2sb. For ACPI we need to get the actual address of the register. Add a function to handle this and rename the old one to more accurately reflect its purpose. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17sound: Add an ACPI driver for Maxim MAX98357acSimon Glass3-0/+171
This chip is used on coral and we need to generate ACPI tables for sound to make it work. Add a driver that does just this (i.e. at present does not actually support playing sound). Signed-off-by: Simon Glass <sjg@chromium.org> [bmeng: Use the correct acpi_irq_polarity enum number] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17sound: Add an ACPI driver for Dialog Semicondutor da7219Simon Glass3-0/+200
This chip is used on coral and we need to generate ACPI tables for sound to make it work. Add a driver that does just this (i.e. at present does not actually support playing sound). Signed-off-by: Simon Glass <sjg@chromium.org>
2020-07-17acpi: mmc: Generate ACPI info for the PCI SD CardSimon Glass1-1/+77
Write required information into the SSDT to describe the SD card card-detect pin. Since the required GPIO properties are not present in the device-tree binding, set them manually for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17dm: acpi: Add support for the NHLT tableSimon Glass1-0/+15
The Intel Non-High-Definition-Audio Link Table (NHLT) table describes the audio codecs and connections in a system. Various devices can contribute information to produce the table. Add core support for this, based on a structure which is built up through calls to the driver. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17dm: core: Add a way of overriding the ACPI device pathSimon Glass1-0/+19
Some devices such as GPIO need to override the normal path that would be generated by driver model. Add a device-tree property for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com>
2020-07-17acpi: Add an acpi command to list/dump generated ACPI itemsSimon Glass1-0/+16
Add a command that shows the individual blocks of data generated by each device, effectively splitting the full table into its component parts. This can be helpful for debugging. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17dm: acpi: Enhance acpi_get_name()Simon Glass3-22/+11
For many device types it is possible to figure out the name just by looking at its uclass or parent. Add a function to handle this, since it allows us to cover the vast majority of cases automatically. However it is sometimes impossible to figure out an ACPI name for a device just by looking at its uclass. For example a touch device may have a vendor-specific name. Add a new "acpi,name" property to allow a custom name to be created. With this new feature we can drop the get_name() methods in the sandbox I2C and SPI drivers. They were only added for testing purposes. Update the tests to use the new values. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Add support for DSDT generationSimon Glass1-1/+24
Some devices need to inject extra code into the Differentiated System Descriptor Table (DSDT). Add a method to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: correct one typo in inject_dsdt() comments] Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Support ordering SSDT data by deviceSimon Glass1-0/+84
Add a /chosen property to control the order in which the data appears in the SSDT. This allows matching up U-Boot's output from a dump of the known-good data obtained from within Linux. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Record the items added to SSDTSimon Glass1-4/+79
It is useful to be able to control the order of data written to the SSDT so that we can compare the output against known-good kernel dumps. Add code to record each item that is added along with the device that added it. That allows us to reorder things later if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Add support for SSDT generationSimon Glass1-0/+14
Some devices need to generate code for the Secondary System Descriptor Table (SSDT). Add a method to handle this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Support generation of SPI descriptorSimon Glass1-0/+11
Add a function to write a SPI descriptor to the generated ACPI code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17acpi: Support generation of I2C descriptorSimon Glass2-0/+24
Add a function to write a GPIO descriptor to the generated ACPI code. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17gpio: Add a method to convert a GPIO to ACPISimon Glass2-0/+99
When generating ACPI tables we need to convert GPIOs in U-Boot to the ACPI structures required by ACPI. This is a SoC-specific conversion and cannot be handled by generic code, so add a new GPIO method to do the conversion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17irq: Add a method to convert an interrupt to ACPISimon Glass2-2/+32
When generating ACPI tables we need to convert IRQs in U-Boot to the ACPI structures required by ACPI. This is a SoC-specific conversion and cannot be handled by generic code, so add a new IRQ method to do the conversion. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17dm: core: Add an ACPI name for the root nodeSimon Glass1-0/+13
This always has a fixed ACPI name so add it as a driver function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-17drivers: p2sb: replace Primary-to-Sideband Bus with Primary to Sideband BridgeWolfgang Wallner1-6/+6
In Intel's documentation the term P2SB stands for "Primary to Sideband Bridge". Signed-off-by: Wolfgang Wallner <wolfgang.wallner@br-automation.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-07-16watchdog: imx: Support set timeout by wdt commandMo, Yuezhang1-5/+13
After "4b969deac0 watchdog: imx: Add DM support", the imx watchdog can be started by wdt command. But the imx watchdog driver only support start with the default timeout. This commit adds the support for setting the timeout which pass from the wdt command into the imx watchdog. If the timeout out of the valid range(0.5~128s), start the watchdog with a timeout within the valid range and the timeout is the one which closest to the passed timeout. Signed-off-by: Yuezhang.Mo <yuezhang.mo@sony.com> Reviewed-by: Andy.Wu <Andy.Wu@sony.com> Reviewed-by: stefano Babic <sbabic@denx.de>
2020-07-16power: pmic_pca9450: fix PCA9450A I2C addressSébastien Szymanski1-20/+1
Quoting Ye Li from NXP: "We have confirmed with PMIC team, 0x35 is used only on early chips and not used any more. 0x25 is the final address." Fix it by merging power_pca9450a_init and power_pca9450b_init into one function power_pca9450_init. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Ye Li <ye.li@nxp.com>
2020-07-16gpio: mxc_gpio: Improve to use ofdata_to_platdataYe Li1-27/+9
Current mxc_gpio DM driver allocates the platdata in bind function to handle both OF_CONTROL enabled case and disabled case. This implementation puts the devfdt_get_addr in bind, which introduces much overhead especially in board_f phase. Change the driver to a common way for handling the cases by using ofdata_to_platdata and using DM framework to allocate platdata. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-07-16misc: scu_api: Add SCFW API to get the index of boot container setYe Li1-0/+25
Add SCFW API sc_misc_get_boot_container to get current boot container set index. The index value returns 1 for primary container set, 2 for secondary container set. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
2020-07-16spi: fsl_qspi: Support to use full AHB space on i.MXYe Li2-24/+98
i.MX platforms provide large AHB mapped space for QSPI, each controller has 256MB. However, current driver only maps small size (AHB buffer size) of AHB space, this implementation causes i.MX failed to boot M4 with QSPI XIP image. Add config CONFIG_FSL_QSPI_AHB_FULL_MAP (default enabled for i.MX) to address above problem. When the config is set: 1. Full AHB space is divided to each CS. 2. A dedicated LUT entry is used for AHB read only. 3. The MODE instruction in LUT is replaced to standard ADDR instruction 4. The address in spi_mem_op is used to SFAR and AHB read Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
2020-07-16spi: fsl_qspi: Add support for i.MX7ULPYe Li1-6/+16
Add compatible string and driver data for i.MX7ULP. Meanwhile, the address set to SFA1AD/SFA2AD/SFB1AD/SFB2AD should align with 1KB, because the lowest 10 bits are reserved by the registers definition. For i.MX7ULP which has only 128Bytes AHB buffer, must align it when setting the registers and selecting cs. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: Kuldeep Singh <kuldeep.singh@nxp.com>
2020-07-16Merge tag 'mmc-7-24-2020' of https://gitlab.denx.de/u-boot/custodians/u-boot-mmcTom Rini2-8/+49
- Correct mmc_spi check condition - Generate R1/R2/R1b response - Read SSR for SD SPI
2020-07-14mmc_spi: generate R1b response for erase and stop transmission commandPragnesh Patel1-4/+28
As per the SD physical layer specification version 7.10, erase command (CMD38) and stop transmission command (CMD12) will generate R1b response. R1b = R1 + busy signal A non-zero value after the R1 response indicates card is ready for next command. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-14mmc: mmc_spi: Generate R1 response for erase block start and end addressPragnesh Patel1-0/+2
Erase block start address (CMD32) and erase block end address (CMD33) command will generate R1 response for mmc SPI mode. R1 response is 1 byte long for mmc SPI, so assign 1 byte as a response for this commands. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-14mmc: mmc_spi: Read R2 response for send status command - CMD13Pragnesh Patel1-3/+8
Send status command (CMD13) will send R1 response under SD mode but R2 response under SPI mode. R2 response is 2 bytes long, so read 2 bytes for mmc SPI mode Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-14mmc: read ssr for SD spiPragnesh Patel2-0/+6
The content of ssr is useful only for erase operations. This saves erase time. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-14mmc: mmc_spi: generate R1 response for different mmc SPI commandsPragnesh Patel1-0/+2
R1 response is 1 byte long for mmc SPI commands as per the updated physical layer specification version 7.10. So correct the resp and resp_size for existing commands Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-14mmc: mmc_spi: correct the while conditionPragnesh Patel1-1/+3
When variable i will become 0, while(i--) loop breaks but variable i will again decrement to -1 because of i-- and that's why below condition "if (!i && (r != resp_match_value)" will never execute, So doing "i--" inside of while() loop solves this problem. Signed-off-by: Pragnesh Patel <pragnesh.patel@sifive.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com>
2020-07-14clk: imx8m: drop clk settingsPeng Fan2-68/+0
We use non-dm code to configure the clk settings in order to simplify dm clk driver in future, so remove the duplicated code from clk driver Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14clk: imx8mp: Update imx8mp ccf clock driverYe Li1-0/+52
Add clocks for FEC and flexspi, and add set parent clock callback, so DTS can assign clocks Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14clk: imx8mm/8mn: Add USB clocksYe Li2-0/+37
Add USB relevant clocks to support usb clock settings for both DM USB host and gadget drivers Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
2020-07-14clk: clk-imx8mn: Update clock tree and support set parentYe Li1-0/+56
Add set clock parent support. Add ENET and flexspi related clocks to support assigned clocks Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-26 23:38:52 +0300