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2023-09-07common: autoboot: Add auto-fastboot on StarFive SoCXingyu Wu1-0/+1
Add auto-fastboot function before autoboot on StarFive SoC and add a config to enable or disable this. In the auto-fastboot, it check a environment flag of 'fb_sf_completed' first. The flag is NULL and then the fastboot will work. The flag will be set from USB tool to indicate done after flashing the image. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2023-09-07drivers: fastboot: Add logical-block-size in getvar commandXingyu Wu1-0/+1
Add a new parameter to get "logical-block-size" in getvar command. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2023-08-16riscv: starfive: evb: Add EVB_SDK_BOOTENVSamin Guo1-0/+10
Add BOOTENV for jh7110 evb Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-08-16riscv: starfive: jh7110: Add JH7110_XX_BOOTENSamin Guo1-0/+111
Add JH7110_DISTRO_BOOTEN/JH7110_SDK_BOOTEN for debian/sdk boot on JH7110 SOC. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-08-16riscv: starfive: evb: remove unused bootenvSamin Guo1-17/+0
will be replaced by the new bootenv Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-26mmc: starfive: fix mmc device power-up sequenceWilliam Qiu1-0/+9
fix mmc device power-up sequence. Signed-off-by: William Qiu <william.qiu@starfivetech.com>
2023-07-26mmc: starfive: add HS200 supportWilliam Qiu1-0/+1
Add tuning and other related code to the driver to support HS200 mode. Signed-off-by: William Qiu <william.qiu@starfivetech.com>
2023-07-19board: starfive: evb: Add dynamic CMA adjustment schemeSamin Guo1-0/+38
Synchronize from vf2 to the dynamic CMA scheme Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10borad: starfive: evb: Synchronize environment variables from vf2Samin Guo1-0/+4
loadaddr fdtoverlay_addr_r kernel_comp_addr_r/kernel_comp_size Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-07-10borad: starfive: evb: Resize the address spaceSamin Guo1-20/+8
Readjust the address space for 1G DDR Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-06-05board: starfive: jh7110: Add support for 1.25GHz chipsMason Huo1-30/+30
Remove max cpu voltages: 1.12v, 1.10v, 1.08v. Set the cpu max frequency to 1.25G per OTP value. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-05-05uboot: evb support boot from nvme ssdshanlong.li1-0/+16
support boot from nvme ssd Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
2023-04-23board: starfive: copyright: Standardize the copyright formatYanhong Wang4-4/+6
Unify the content format of the copyright section Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
2023-04-07board: starfive: jh7110: Modify cpu voltage set commandsMason Huo1-11/+19
Update the cpu voltage set commands per binning information from OTP. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-03-17Merge branch 'CR_4094_evb_515_uboot_logo_keith.zhao' into 'jh7110-master'andy.hu2-1/+11
CR_4094 display: update uboot logo display function: See merge request sdk/u-boot!42
2023-03-17CR_4094 display: update uboot logo display function:keith.zhao2-1/+11
2023-03-09board: starfive: jh7110: Add 1.1 & 1.02v max cpu voltageMason Huo1-1/+15
Add two more binning IC types, and set add their max cpu voltage accordingly. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-02-28board: starfive: jh7110: Add cpu voltage set commandsmason.huo1-0/+26
Get the binning information from OTP, and set change the cpu max voltage accordingly. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-02-22pci: Add Starfive JH7110 pcie driverMason Huo1-0/+2
Port the JH7110 pcie host driver from linux kernel. Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
2023-02-17board:riscv:jh7110: modify config for starfive JH7110 boardkeith.zhao1-0/+2
add board_late_init to init display memory config the bitmap picture Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
2023-02-17vout:dc8200: add vout mipi driverkeith.zhao1-0/+1
add vout mipi pipeline driver in uboot Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
2023-01-05clk:starfive: Add vout clock driver for StarFive JH7110Yanhong Wang2-66/+57
Add vout clock driver for StarFive JH7110 Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
2022-11-21dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitionsJianlong Huang1-0/+427
Add pinctrl definitions for StarFive JH7110 SoC. Signed-off-by: Kuan Lim Lee <kuanlim.lee@linux.starfivetech.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
2022-11-09borad:jh7110:evb: Modify ramdisk_addr_r/pxefile_addr_r/scriptaddrSamin Guo1-4/+4
The jh7110 ddr starts from 0x40000000. Using 0x80000000 may cause the CMA space to fail Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2022-11-01board:starfive:evb: Support using env to detect board versionSamin Guo1-0/+20
JH7110B need tx_inverted by YT8521 phy, you need to read the chip version to determine whether to use it. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2022-10-18configs: starfive: fix tftpboot file waite a long time for the first timeJianlong Huang2-2/+3
ARP_TIMEOUT is too large, then will waite a long time for the first time Set ARP_TIMEOUT to 500 refer to others Set PHY_ANEG_TIMEOUT needs longer aneg time for the 2nd phy Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
2022-10-18clk:jh7110: update apb_bus clk relationshipyanhong.wang1-25/+26
The previous definition of apb_bus clock relationship is incorrect,so update it. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18configs: starfive_evb_defconfig: Support saveenvJianlong Huang1-3/+0
Add saveenv config to Support saveenv Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
2022-10-18board:starfive: Modify dynamic alloc memory start addr in SPLyanhong.wang1-3/+2
Modify the dynamic alloc memory start address from L2 LIM to DDR. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18board:starfive: add starfive evb board supportyanhong.wang1-0/+145
Add board support for StarFive EVB. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18riscv:dts: update clk&reset propertiesyanhong.wang1-0/+53
Synchronize the kernel dts file Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18net:phy:YUTAI: Add YT8511/yt8521 phy driveryanhong.wang1-0/+1
This adds basic support for YUTAI YT8511/YT8521 phy. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18board:starfive: add starfive visionfive board supportyanhong.wang1-0/+145
Add board support for StarFive VisionFive. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18clk:starfive-jh7110: Add clock driver for JH7110yanhong.wang2-0/+459
Add a clock driver for StarFive JH7110 Soc platform. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18Reset:Starfive-jh7110: Add reset driver for JH7110yanhong.wang1-0/+219
Support for reset controller on starfive JH7110 SoCs. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2021-09-28mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interfacePatrice Chotard1-3/+3
nand_dt_init() is still using fdtdec_xx() interface. If OF_LIVE flag is enabled, dt property can't be get anymore. Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue. For doing this, node parameter type must be ofnode. First idea was to convert "node" parameter to ofnode type inside nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode() is not bijective, in case OF_LIVE flag is enabled, it performs an assert(). So, this leads to update nand_chip struct flash_node field from int to ofnode and to update all nand_dt_init() callers. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-09-28mtd: spi: nor: force mtd name to "nor%d"Patrick Delaunay3-1/+9
Force the mtd name of spi-nor to "nor" + the driver sequence number: "nor0", "nor1"... beginning after the existing nor devices. This patch is coherent with existing "nand" and "spi-nand" mtd device names. When CFI MTD NOR device are supported, the spi-nor index is chosen after the last CFI device defined by CONFIG_SYS_MAX_FLASH_BANKS. When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, this config is replaced by to cfi_flash_num_flash_banks in the include file mtd/cfi_flash.h. This generic name "nor%d" can be use to identify the mtd spi-nor device without knowing the real device name or the DT path of the device, used with API get_mtd_device_nm() and is used in mtdparts command. This patch also avoids issue when the same NOR device is present 2 times, for example on STM32MP15F-EV1: STM32MP> mtd list SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, \ total 64 MiB List of MTD devices: * nand0 - type: NAND flash - block size: 0x40000 bytes - min I/O: 0x1000 bytes - OOB size: 224 bytes - OOB available: 118 bytes - ECC strength: 8 bits - ECC step size: 512 bytes - bitflip threshold: 6 bits - 0x000000000000-0x000040000000 : "nand0" * mx66l51235l - device: mx66l51235l@0 - parent: spi@58003000 - driver: jedec_spi_nor - path: /soc/spi@58003000/mx66l51235l@0 - type: NOR flash - block size: 0x10000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "mx66l51235l" * mx66l51235l - device: mx66l51235l@1 - parent: spi@58003000 - driver: jedec_spi_nor - path: /soc/spi@58003000/mx66l51235l@1 - type: NOR flash - block size: 0x10000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "mx66l51235l" The same mtd name "mx66l51235l" identify the 2 instances mx66l51235l@0 and mx66l51235l@1. This patch fixes a ST32CubeProgrammer / stm32prog command issue with nor0 target on STM32MP157C-EV1 board introduced by commit b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled"). Fixes: b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> [trini: Add <dm/device.h> to <mtd.h> for DM_MAX_SEQ_STR] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-28mtd: cfi_flash: use cfi_flash_num_flash_banks only when supportedPatrick Delaunay1-1/+7
When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, CONFIG_SYS_MAX_FLASH_BANKS is replaced by cfi_flash_num_flash_banks, but this variable is defined in drivers/mtd/cfi_flash.c, which is compiled only when CONFIG_FLASH_CFI_DRIVER is activated, in U-Boot or in SPL when CONFIG_SPL_MTD_SUPPORT is activated. This patch deactivates this feature CONFIG_SYS_MAX_FLASH_BANKS_DETECT when flash cfi driver is not activated to avoid compilation issue in the next patch, when CONFIG_SYS_MAX_FLASH_BANKS is used in spi_nor_scan(). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-09-25efi_loader: Fix spec ID event creationRuchika Gupta1-6/+1
TCG EFI Protocol Specification defines the number_of_algorithms field in spec ID event to be equal to the number of active algorithms supported by the TPM device. In current implementation, this field is populated with the count of all algorithms supported by the TPM which leads to incorrect spec ID event creation. Similarly, the algorithm array in spec ID event should be a variable length array with length being equal to the number_of_algorithms field. In current implementation this is defined as a fixed length array which has been fixed. Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> CC: Masahisa Kojima <masahisa.kojima@linaro.org> CC: Ilias Apalodimas <ilias.apalodimas@linaro.org> CC: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-24mtd: remove SPEAr flash driver st_smiPatrick Delaunay2-101/+0
Remove the driver st_smic.c used in SPEAr products and the associated config CONFIG_ST_SMI; this driver is no more used in U-Boot after the commit 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support"). Fixes: 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-23Merge git://source.denx.de/u-boot-socfpgaTom Rini1-2/+0
Bugfixes for this one socfpga platform
2021-09-22arm: socfpga: vining: Drop meaningless commentMarek Vasut1-2/+0
The comment is no longer meaningful due to DT conversion, drop it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22usb: ehci-mx6: use phy_type from device treeMatthias Schiffer1-0/+1
Allow using different PHY interfaces for multiple USB controllers. When no value is set in DT, we fall back to CONFIG_MXC_USB_PORTSC for now to stay compatible with current board configurations. This also adds support for the HSIC mode of the i.MX7. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22usb: ehci-ci: remove redundant PORTSC flag definitionsMatthias Schiffer1-11/+0
These definitions are unused, all boards that define portsc flags use the equivalent PORT_* definitions instead. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22include/configs: replace MXC_EHCI_MODE_SERIAL with PORT_PTS_SERIALMatthias Schiffer1-1/+1
The MXC_EHCI_MODE_ definitions are redundant. Replace MXC_EHCI_MODE_SERIAL with the equivalent PORT_PTS_SERIAL. Only the zmx25 platform is affected. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22usb: add support for ULPI/SERIAL/HSIC PHY modesMatthias Schiffer1-0/+3
Import usb_phy_interface enum values and DT match strings from the Linux kernel. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22usb: xhci-pci: Move reset logic out of XHCI coreSamuel Holland1-2/+0
Resetting an XHCI controller inside xhci_register undoes any register setup performed by the platform driver. And at least on the Allwinner H6, resetting the XHCI controller also resets the PHY, which prevents the controller from working. That means the controller must be taken out of reset before initializing the PHY, which must be done before calling xhci_register. The logic in the XHCI core was added to support the Raspberry Pi 4 (although this was not mentioned in the commit log!), which uses the xhci-pci platform driver. Move the reset logic to the platform driver, where it belongs, and where it cannot interfere with other platform drivers. This also fixes a failure to call reset_free if xhci_register failed. Fixes: 0b80371b350e ("usb: xhci: Add reset controller support") Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-18Revert "efi_capsule: Move signature from DTB to .rodata"Simon Glass1-2/+0
This was unfortunately applied despite much discussion about it beiong the wrong way to implement this feature. Revert it before too many other things are built on top of it. This reverts commit ddf67daac39de76d2697d587148f4c2cb768f492. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-17clk: ti: k3: Update driver to account for divider flagsSuman Anna1-13/+17
The K3 SoCs have some PLL output clocks (POSTDIV clocks) which in turn serve as inputs to other HSDIV output clocks. These clocks use the actual value to compute the divider clock rate, and need to be registered with the CLK_DIVIDER_ONE_BASED flags. The current k3-clk driver and data lacks the infrastructure to pass in divider flags. Update the driver and data to account for these divider flags. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-09-17firmware: ti_sci: Include linux/err.h in ti_sci_protocol.hSuman Anna1-1/+3
The common TI SCI header file uses some macros from err.h and these get exercised when CONFIG_TI_SCI_PROTOCOL is not defined. Include the linux/err.h header file in this header file directly rather than relying on source files to include it to eliminate any potential build errors. While at this, reorder the existing header file include to the beginning of the file. Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
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