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2022-11-21dt-bindings: pinctrl: Add StarFive JH7110 pinctrl definitionsJianlong Huang1-0/+427
Add pinctrl definitions for StarFive JH7110 SoC. Signed-off-by: Kuan Lim Lee <kuanlim.lee@linux.starfivetech.com> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
2022-11-09borad:jh7110:evb: Modify ramdisk_addr_r/pxefile_addr_r/scriptaddrSamin Guo1-4/+4
The jh7110 ddr starts from 0x40000000. Using 0x80000000 may cause the CMA space to fail Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2022-11-01board:starfive:evb: Support using env to detect board versionSamin Guo1-0/+20
JH7110B need tx_inverted by YT8521 phy, you need to read the chip version to determine whether to use it. Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2022-10-18configs: starfive: fix tftpboot file waite a long time for the first timeJianlong Huang2-2/+3
ARP_TIMEOUT is too large, then will waite a long time for the first time Set ARP_TIMEOUT to 500 refer to others Set PHY_ANEG_TIMEOUT needs longer aneg time for the 2nd phy Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
2022-10-18clk:jh7110: update apb_bus clk relationshipyanhong.wang1-25/+26
The previous definition of apb_bus clock relationship is incorrect,so update it. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18configs: starfive_evb_defconfig: Support saveenvJianlong Huang1-3/+0
Add saveenv config to Support saveenv Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
2022-10-18board:starfive: Modify dynamic alloc memory start addr in SPLyanhong.wang1-3/+2
Modify the dynamic alloc memory start address from L2 LIM to DDR. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18board:starfive: add starfive evb board supportyanhong.wang1-0/+145
Add board support for StarFive EVB. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18riscv:dts: update clk&reset propertiesyanhong.wang1-0/+53
Synchronize the kernel dts file Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18net:phy:YUTAI: Add YT8511/yt8521 phy driveryanhong.wang1-0/+1
This adds basic support for YUTAI YT8511/YT8521 phy. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18board:starfive: add starfive visionfive board supportyanhong.wang1-0/+145
Add board support for StarFive VisionFive. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18clk:starfive-jh7110: Add clock driver for JH7110yanhong.wang2-0/+459
Add a clock driver for StarFive JH7110 Soc platform. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-10-18Reset:Starfive-jh7110: Add reset driver for JH7110yanhong.wang1-0/+219
Support for reset controller on starfive JH7110 SoCs. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2021-09-28mtd: nand: raw: convert nand_dt_init() to ofnode_xx() interfacePatrice Chotard1-3/+3
nand_dt_init() is still using fdtdec_xx() interface. If OF_LIVE flag is enabled, dt property can't be get anymore. Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue. For doing this, node parameter type must be ofnode. First idea was to convert "node" parameter to ofnode type inside nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode() is not bijective, in case OF_LIVE flag is enabled, it performs an assert(). So, this leads to update nand_chip struct flash_node field from int to ofnode and to update all nand_dt_init() callers. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
2021-09-28mtd: spi: nor: force mtd name to "nor%d"Patrick Delaunay3-1/+9
Force the mtd name of spi-nor to "nor" + the driver sequence number: "nor0", "nor1"... beginning after the existing nor devices. This patch is coherent with existing "nand" and "spi-nand" mtd device names. When CFI MTD NOR device are supported, the spi-nor index is chosen after the last CFI device defined by CONFIG_SYS_MAX_FLASH_BANKS. When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, this config is replaced by to cfi_flash_num_flash_banks in the include file mtd/cfi_flash.h. This generic name "nor%d" can be use to identify the mtd spi-nor device without knowing the real device name or the DT path of the device, used with API get_mtd_device_nm() and is used in mtdparts command. This patch also avoids issue when the same NOR device is present 2 times, for example on STM32MP15F-EV1: STM32MP> mtd list SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, \ total 64 MiB List of MTD devices: * nand0 - type: NAND flash - block size: 0x40000 bytes - min I/O: 0x1000 bytes - OOB size: 224 bytes - OOB available: 118 bytes - ECC strength: 8 bits - ECC step size: 512 bytes - bitflip threshold: 6 bits - 0x000000000000-0x000040000000 : "nand0" * mx66l51235l - device: mx66l51235l@0 - parent: spi@58003000 - driver: jedec_spi_nor - path: /soc/spi@58003000/mx66l51235l@0 - type: NOR flash - block size: 0x10000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "mx66l51235l" * mx66l51235l - device: mx66l51235l@1 - parent: spi@58003000 - driver: jedec_spi_nor - path: /soc/spi@58003000/mx66l51235l@1 - type: NOR flash - block size: 0x10000 bytes - min I/O: 0x1 bytes - 0x000000000000-0x000004000000 : "mx66l51235l" The same mtd name "mx66l51235l" identify the 2 instances mx66l51235l@0 and mx66l51235l@1. This patch fixes a ST32CubeProgrammer / stm32prog command issue with nor0 target on STM32MP157C-EV1 board introduced by commit b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled"). Fixes: b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> [trini: Add <dm/device.h> to <mtd.h> for DM_MAX_SEQ_STR] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-28mtd: cfi_flash: use cfi_flash_num_flash_banks only when supportedPatrick Delaunay1-1/+7
When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, CONFIG_SYS_MAX_FLASH_BANKS is replaced by cfi_flash_num_flash_banks, but this variable is defined in drivers/mtd/cfi_flash.c, which is compiled only when CONFIG_FLASH_CFI_DRIVER is activated, in U-Boot or in SPL when CONFIG_SPL_MTD_SUPPORT is activated. This patch deactivates this feature CONFIG_SYS_MAX_FLASH_BANKS_DETECT when flash cfi driver is not activated to avoid compilation issue in the next patch, when CONFIG_SYS_MAX_FLASH_BANKS is used in spi_nor_scan(). Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2021-09-25efi_loader: Fix spec ID event creationRuchika Gupta1-6/+1
TCG EFI Protocol Specification defines the number_of_algorithms field in spec ID event to be equal to the number of active algorithms supported by the TPM device. In current implementation, this field is populated with the count of all algorithms supported by the TPM which leads to incorrect spec ID event creation. Similarly, the algorithm array in spec ID event should be a variable length array with length being equal to the number_of_algorithms field. In current implementation this is defined as a fixed length array which has been fixed. Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org> CC: Masahisa Kojima <masahisa.kojima@linaro.org> CC: Ilias Apalodimas <ilias.apalodimas@linaro.org> CC: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-24mtd: remove SPEAr flash driver st_smiPatrick Delaunay2-101/+0
Remove the driver st_smic.c used in SPEAr products and the associated config CONFIG_ST_SMI; this driver is no more used in U-Boot after the commit 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support"). Fixes: 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support") Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2021-09-23Merge git://source.denx.de/u-boot-socfpgaTom Rini1-2/+0
Bugfixes for this one socfpga platform
2021-09-22arm: socfpga: vining: Drop meaningless commentMarek Vasut1-2/+0
The comment is no longer meaningful due to DT conversion, drop it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com> Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Cc: Tien Fong Chee <tien.fong.chee@intel.com>
2021-09-22usb: ehci-mx6: use phy_type from device treeMatthias Schiffer1-0/+1
Allow using different PHY interfaces for multiple USB controllers. When no value is set in DT, we fall back to CONFIG_MXC_USB_PORTSC for now to stay compatible with current board configurations. This also adds support for the HSIC mode of the i.MX7. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22usb: ehci-ci: remove redundant PORTSC flag definitionsMatthias Schiffer1-11/+0
These definitions are unused, all boards that define portsc flags use the equivalent PORT_* definitions instead. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22include/configs: replace MXC_EHCI_MODE_SERIAL with PORT_PTS_SERIALMatthias Schiffer1-1/+1
The MXC_EHCI_MODE_ definitions are redundant. Replace MXC_EHCI_MODE_SERIAL with the equivalent PORT_PTS_SERIAL. Only the zmx25 platform is affected. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22usb: add support for ULPI/SERIAL/HSIC PHY modesMatthias Schiffer1-0/+3
Import usb_phy_interface enum values and DT match strings from the Linux kernel. Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com> Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
2021-09-22usb: xhci-pci: Move reset logic out of XHCI coreSamuel Holland1-2/+0
Resetting an XHCI controller inside xhci_register undoes any register setup performed by the platform driver. And at least on the Allwinner H6, resetting the XHCI controller also resets the PHY, which prevents the controller from working. That means the controller must be taken out of reset before initializing the PHY, which must be done before calling xhci_register. The logic in the XHCI core was added to support the Raspberry Pi 4 (although this was not mentioned in the commit log!), which uses the xhci-pci platform driver. Move the reset logic to the platform driver, where it belongs, and where it cannot interfere with other platform drivers. This also fixes a failure to call reset_free if xhci_register failed. Fixes: 0b80371b350e ("usb: xhci: Add reset controller support") Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
2021-09-18Revert "efi_capsule: Move signature from DTB to .rodata"Simon Glass1-2/+0
This was unfortunately applied despite much discussion about it beiong the wrong way to implement this feature. Revert it before too many other things are built on top of it. This reverts commit ddf67daac39de76d2697d587148f4c2cb768f492. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-17clk: ti: k3: Update driver to account for divider flagsSuman Anna1-13/+17
The K3 SoCs have some PLL output clocks (POSTDIV clocks) which in turn serve as inputs to other HSDIV output clocks. These clocks use the actual value to compute the divider clock rate, and need to be registered with the CLK_DIVIDER_ONE_BASED flags. The current k3-clk driver and data lacks the infrastructure to pass in divider flags. Update the driver and data to account for these divider flags. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
2021-09-17firmware: ti_sci: Include linux/err.h in ti_sci_protocol.hSuman Anna1-1/+3
The common TI SCI header file uses some macros from err.h and these get exercised when CONFIG_TI_SCI_PROTOCOL is not defined. Include the linux/err.h header file in this header file directly rather than relying on source files to include it to eliminate any potential build errors. While at this, reorder the existing header file include to the beginning of the file. Signed-off-by: Suman Anna <s-anna@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com>
2021-09-14image: rsa: Move padding_algos to linker listsAlexandru Gagniuc1-0/+4
We are not guaranteed to have the padding_pkcs_15_verify symbol since commit 92c960bc1d ("lib: rsa: Remove #ifdefs from rsa.h"), and commit 61416fe9df ("Kconfig: FIT_SIGNATURE should not select RSA_VERIFY") The padding_algos only make sense with RSA verification, which can now be disabled in lieu of ECDSA. In fact this will lead to build failures because of the missing symbol mentioned earlier. To resolve this, move the padding_algos to a linker list, with declarations moved to rsa_verify.c. This is consistent with commit 6909edb4ce ("image: rsa: Move verification algorithm to a linker list") One could argue that the added #ifdef USE_HOSTCC is ugly, and should be hidden within the U_BOOT_PADDING_ALGO() macro. However, this would be inconsistent with the "cryptos" list. This logic for was not previously explored: Without knowledge of the U_BOOT_PADDING_ALGO() macro, its use is similar to something being declared. However, should #ifndef USE_HOSTCC be part of the macro, it would not be obvious that it behaves differently on host code and target code. Having the #ifndef outside the macro makes this obvious. Also, the #ifdef is not always necessary. For example ecda-verify makes use of U_BOOT_CRYPTO_ALGO() without any accompanying #ifdefs. The fundamental issue is a lack of separation of host and target code in rsa_verify. Therefore, the declaration of a padding algo with the external #ifdef is more readable and consistent. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-09-14pci: Drop PCI_INDIRECT_BRIDGESimon Glass6-16/+0
This does not work with driver model so can be removed. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-14pci: acpi: Drop DM_PCI check from ahciSimon Glass1-4/+0
We don't need these checks anymore since when PCI is enabled, driver model is always used. Drop them. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-14pci: Drop old code from header fileSimon Glass1-57/+3
We don't need this code anymore since when PCI is enabled, driver model is always used. Signed-off-by: Simon Glass <sjg@chromium.org>
2021-09-14ppc: Remove UCP1020 boardSimon Glass1-832/+0
This board has not been converted to CONFIG_DM_PCI by the deadline. Remove it. Note that we have to add CONFIG_SPIFLASH to scripts/config_whitelist.txt because it's not really migrated at this point. Acked-by: Michael Durrant <mdurrant@arcturusnetworks.com> Acked-by: Oleksandr Zhadan <oleks@arcturusnetworks.com> Acked-by: Oleksandr Zhadan and Michael Durrant <arcsupport@arcturusnetworks.com> Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Handle CONFIG_SPIFLASH differently and delete Kconfig file] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-13Merge tag 'mmc-2021-9-13' of https://source.denx.de/u-boot/custodians/u-boot-mmcTom Rini1-0/+2
Support using mmc command for enumerating mmc card in a given mode Fix device_remove in mmc Fix switch issue with send_status disabled Drop 1ms delay in fsl_esdhc command sending Revert "mmc: sdhci: set to INT_DATA_END when there are data"
2021-09-13Merge tag 'efi-2021-10-rc4-2' of ↵Tom Rini1-1/+1
https://source.denx.de/u-boot/custodians/u-boot-efi Pull request for efi-2021-10-rc4-2 Documentation: * improve documentation of U-Boot for /config DT node * integrate bloblist documentation UEFI: * correct usage of EFI_CALL() * code tidy up
2021-09-11efi_loader: boot_service_capability_min should be capitalizedMasahisa Kojima1-1/+1
boot_service_capability_min is constant, it should be capitalized. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
2021-09-11configs: j72*_evm: Define the buffer sizes for dfuAswath Govindraju1-2/+0
On J721e R5 SPL, dfu buffer for loading sysfw.itb image gets allocated before DRAM gets initialized. So, the buffer gets allocated in MCU L3 RAM. The current buffer size to be allocated is 256KB and the available total heap memory is 0x70000 (448KB). This leads to NOMEM errors during allocation. In other cases when constraints such as above are not present fix the size of buffers to the sector size in OSPI for proper functioning. Also, if CONFIG_SYS_DFU_DATA_BUF_SIZE is defined and CONFIG_SYS_DFU_MAX_FILE_SIZE is not defined then the max file size for dfu transfer is defined as CONFIG_SYS_DFU_DATA_BUF_SIZE. Fix these by setting appropriate buffer sizes in their respective defconfig files and defining the max file size as 8 MB which is the default dfu buffer size. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-09-11environment: ti: k3_dfu: Increase the size allocated for bootloader images ↵Aswath Govindraju1-2/+2
in dfu_alt_info_ram The size of u-boot.img is above 1MB and that of tispl.bin is close to 1MB, in case of j721e. Therefore, increase the sizes allocated for tispl.bin and u-boot.img to 2 MB and 4 MB respectively, in dfu_alt_info_ram environment variable. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-09-11include: configs: am64x_evm: Add env variables for booting to kernel using ↵Aswath Govindraju1-1/+30
USB MSC device Add env variables for booting to kernel from USB MSC device. The second partition in the USB MSC device needs to formatted as ext4 file system with kernel and dtb images, present in the /boot folder. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-09-11environment: ti: mmc.h: Make the finduuid generic for usage across different ↵Aswath Govindraju1-1/+1
device types Make finduuid generic by making it dependent on the boot variable. For example, this can now be used for finding the uuid of partitions in usb device too. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
2021-09-11ARM: omap3: evm: Enable booting 'fitImage' with DEFAULT_FIT_TI_ARGSDerald D. Woods1-40/+5
This commit uses the existing DEFAULT_MMC_TI_ARGS and DEFAULT_FIT_TI_ARGS defintions to replace the 'mmc*' environment variables in the configuration. The check for the 'boot_fit' is handled like the 'am335x_*' boards with 'CONFIG_BOOTCOMMAND'. Signed-off-by: Derald D. Woods <woods.technical@gmail.com>
2021-09-10mmc: Add support for enumerating MMC card in a given mode using mmc commandAswath Govindraju1-0/+2
Add support for enumerating MMC card in a given mode using mmc rescan and mmc dev commands. The speed mode is provided as the last argument in these commands and is indicated using the index from enum bus_mode in include/mmc.h. A speed mode can be set only if it has already been enabled in the device tree. Signed-off-by: Aswath Govindraju <a-govindraju@ti.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Jaehoon Chung <jh80.chung@samsung.com>
2021-09-10arm: mvebu: a38x: Fix 5200000 baudratePali Rohár1-1/+1
Fix baudrate value 5150000 which was added in commit ead4864fa6cc ("arm: mvebu: a38x: Define supported UART baudrates"). Exact value for divisor 3 with 250 MHz TCLK is 5208333 baudrate. In above commit I incorrectly rounded it to 5150000 value due to testing with USB-UART hw which incorrectly reported exact value and divisor configured on other other end of UART link. Fix this value to 520000 baudrate which is more close to the exact hardware value and also has less fraction parts. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: ead4864fa6cc ("arm: mvebu: a38x: Define supported UART baudrates") Reviewed-by: Stefan Roese <sr@denx.de>
2021-09-08image: Drop IMAGE_ENABLE_{MD5, CRC32} #definesAlexandru Gagniuc1-20/+0
These are no longer used, so drop them. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2021-09-08common: Move MD5 hash to hash_algo[] array.Alexandru Gagniuc2-2/+5
MD5 is being called directly in some places, but it is not available via hash_lookup_algo("md5"). This is inconsistent with other hasing routines. To resolve this, add an "md5" entry to hash_algos[]. The #ifdef clause looks funnier than those for other entries. This is because both MD5 and SPL_MD5 configs exist, whereas the other hashes do not have "SPL_" entries. The long term plan is to get rid of the ifdefs, so those should not be expected to survive much longer. The md5 entry does not have .hash_init/update/finish members. That's okay because hash_progressive_lookup_algo() will catch that, and return -EPROTONOSUPPORT, while hash_lookup_algo() will return the correct pointer. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [trini: Use CONFIG_IS_ENABLED not IS_ENABLED for MD5 check] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-08common/spl: Drop [ST]PL_HASH_SUPPORT in favor of [ST]PL_HASHAlexandru Gagniuc1-1/+1
All of these configs exist. Stick to using CONFIG_[ST]PL_HASH, and drop all references to CONFIG_[ST]PL_HASH_SUPPORT. This means we need for CHAIN_OF_TRUST to select SPL_HASH now. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [trini: Add TPL case, fix CHAIN_OF_TRUST, other tweaks] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-08common: Remove unused CONFIG_FIT_SHAxxx selectorsAlexandru Gagniuc1-3/+0
Originally CONFIG_FIT_SHAxxx enabled specific SHA algos for and only for hash_calculate() in common/image-fit.c. However, since commit 14f061dcb1 ("image: Drop IMAGE_ENABLE_SHAxxx"), the correct selector was changed to CONFIG_SHAxxx. The extra "_FIT_" variants are neither used, nor needed. Remove them. One defconfig disables FIT_SHA256, which is now changed to 'SHA256'. CMD_MVEBU_BUBT needs to select select SHA256 to avoid undefined references to "sha256_*()". bubt.c needs sha256, so this selection is correct. It is not clear why this problem did not manifest before. Note that SHA selection in SPL is broken for this exact reason. There is no corresponding SPL_SHAxxx. Fixing this is is beyond the scope of this change. Also note that we make CONFIG_FIT now imply SHA256, to make up for FIT_SHA256 previously being a default y option. Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> [trini: Add imply SHA256 to FIT] Signed-off-by: Tom Rini <trini@konsulko.com>
2021-09-07riscv: enable booting HiFive Unmatched from SATAHeinrich Schuchardt1-0/+3
On the HiFive Unmatched a PCI to SATA adapter may be used to install a SATA drive. Enable booting from it. Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
2021-09-04efi_loader: fix efi_tcg2_hash_log_extend_event() parameter checkMasahisa Kojima1-0/+2
TCG EFI Protocol Specification defines that PCRIndex parameter passed from caller must be 0 to 23. TPM2_MAX_PCRS is currently used to check the range of PCRIndex, but TPM2_MAX_PCRS is tpm2 device dependent and may have larger value. This commit newly adds EFI_TCG2_MAX_PCR_INDEX macro, it is used to check the range of PCRIndex parameter. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Acked-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2021-09-04efi_loader: fix boot_service_capability_min calculationMasahisa Kojima1-1/+1
TCG EFI Protocol Specification requires to the input ProtocolCapability.Size < size of the EFI_TCG2_BOOT_SERVICE_CAPABILITY up to and including the vendor ID field. Current implementation does different calculation, let's fix it. Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org> Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
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