Age | Commit message (Collapse) | Author | Files | Lines |
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Get the binning information from OTP,
and set change the cpu max voltage accordingly.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
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Get the binning information from OTP,
and set change the cpu max voltage accordingly.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
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Moving forward, partition 2 will not be used as boot partition for Debian
image. Hence, remove the if else structure and only sets partition 3 as
boot partition.
Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
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This reverts commit 5d4dcdb90d7350760f065f7ea8d658080ad898a1, reversing
changes made to da9a5b042e5c3bcfa3acd65d434338f5baae34f8.
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added backslash to prevent extra word to the parameter
Signed-off-by: Clement <clement@starfivetech.com>
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Signed-off-by: Clement <clement@starfivetech.com>
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Port the JH7110 pcie host driver from linux kernel.
Signed-off-by: Mason Huo <mason.huo@starfivetech.com>
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'load_distro_uenv' will now search for uEnv.txt in the boot partition to
determine which rootfs partition to boot (either p3 or p4).
Signed-off-by: Jun Yuan Tan <junyuan.tan@starfivetech.com>
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version JH7110_515_SDK_v4.3.0 for JH7110 EVB board
1. Fix hibernation issue: mmc
2. #3345 uboot: support mipi dsi display logo
3. #3145 linux: pci: Add PHY settings in pcie host driver.
4. #3349 linux: crypto: Remove AES key zeroization
5. #3477 spl_tool add LICENSE file
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add board_late_init to init display memory
config the bitmap picture
Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
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add vout mipi pipeline driver in uboot
Signed-off-by:keith.zhao<keith.zhao@statfivetech.com>
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version JH7110_515_SDK_v4.0.0-rc1 for JH7110 EVB board
1. #2828 support linux perf tool
2. #3049 merge hibernation branch to SDK
3. #2708 uboot support vout clk driver
4. #3006 uboot handle OTP return value
5. #2969, #3039 venc jpu fix futex issue
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Add vout clock driver for StarFive JH7110
Signed-off-by: Yanhong Wang <yanhong.wang@starfivetech.com>
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set memory for both 8G and 4G depending on board information
Signed-off-by: Clement <clement@starfivetech.com>
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Dynamically edit dtb to load correct hardware information and uses sysboot method to boot to distro
Signed-off-by: Clement <clement@starfivetech.com>
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version JH7110_515_SDK_v3.2.0 for JH7110 EVB board
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Add pinctrl definitions for StarFive JH7110 SoC.
Signed-off-by: Kuan Lim Lee <kuanlim.lee@linux.starfivetech.com>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
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version JH7110_515_SDK_v3.0.0-rc3 for JH7110 EVB board
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The jh7110 ddr starts from 0x40000000. Using 0x80000000 may cause the
CMA space to fail
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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The jh7110 ddr starts from 0x40000000. Using 0x80000000 may cause the
CMA space to fail
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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This adds support for new RISCV_EFI_BOOT_PROTOCOL to
communicate the boot hart ID to bootloader/kernel on RISC-V
UEFI platforms.
The specification of the protocol is hosted at:
https://github.com/riscv-non-isa/riscv-uefi
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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0x9 will better match 1.2A gmac0 tx in 1000M
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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Visionfive2 has a 2/4/8G version. You need to read eeprom information in
uboot to obtain the size of mem, and modify the size of mem in linux
dts.
Signed-off-by: Samin Guo <samin.guo@linux.starfivetech.com>
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JH7110A do not need tx_inverted by YT8531 phy, you need to read the chip
version to determine whether to use it.
Signed-off-by: Samin Guo <samin.guo@linux.starfivetech.com>
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Move eeprom macro definition form h file to c.
Signed-off-by: Yanhong Wang <yanhong.wang@linux.starfivetech.com>
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Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
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Get bootmode, if bootmode is flash, then default boot from sd card.
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
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Add saveenv config to Support saveenv
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
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Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
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Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
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JH7110B need tx_inverted by YT8521 phy, you need to read the chip
version to determine whether to use it.
Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
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ARP_TIMEOUT is too large, then will waite a long time for the first time
Set ARP_TIMEOUT to 500 refer to others
Set PHY_ANEG_TIMEOUT needs longer aneg time for the 2nd phy
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
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The previous definition of apb_bus clock relationship is incorrect,so
update it.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
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Add saveenv config to Support saveenv
Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
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Modify the dynamic alloc memory start address from L2 LIM to DDR.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
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Add board support for StarFive EVB.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
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Synchronize the kernel dts file
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
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This adds basic support for YUTAI YT8511/YT8521 phy.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
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Add board support for StarFive VisionFive.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
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Add a clock driver for StarFive JH7110 Soc platform.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
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Support for reset controller on starfive JH7110 SoCs.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
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nand_dt_init() is still using fdtdec_xx() interface.
If OF_LIVE flag is enabled, dt property can't be get anymore.
Updating all fdtdec_xx() interface to ofnode_xx() to solve this issue.
For doing this, node parameter type must be ofnode.
First idea was to convert "node" parameter to ofnode type inside
nand_dt_init() using offset_to_ofnode(node). But offset_to_ofnode()
is not bijective, in case OF_LIVE flag is enabled, it performs an assert().
So, this leads to update nand_chip struct flash_node field from int to
ofnode and to update all nand_dt_init() callers.
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
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Force the mtd name of spi-nor to "nor" + the driver sequence number:
"nor0", "nor1"... beginning after the existing nor devices.
This patch is coherent with existing "nand" and "spi-nand"
mtd device names.
When CFI MTD NOR device are supported, the spi-nor index is chosen after
the last CFI device defined by CONFIG_SYS_MAX_FLASH_BANKS.
When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated, this config
is replaced by to cfi_flash_num_flash_banks in the include file
mtd/cfi_flash.h.
This generic name "nor%d" can be use to identify the mtd spi-nor device
without knowing the real device name or the DT path of the device,
used with API get_mtd_device_nm() and is used in mtdparts command.
This patch also avoids issue when the same NOR device is present 2 times,
for example on STM32MP15F-EV1:
STM32MP> mtd list
SF: Detected mx66l51235l with page size 256 Bytes, erase size 64 KiB, \
total 64 MiB
List of MTD devices:
* nand0
- type: NAND flash
- block size: 0x40000 bytes
- min I/O: 0x1000 bytes
- OOB size: 224 bytes
- OOB available: 118 bytes
- ECC strength: 8 bits
- ECC step size: 512 bytes
- bitflip threshold: 6 bits
- 0x000000000000-0x000040000000 : "nand0"
* mx66l51235l
- device: mx66l51235l@0
- parent: spi@58003000
- driver: jedec_spi_nor
- path: /soc/spi@58003000/mx66l51235l@0
- type: NOR flash
- block size: 0x10000 bytes
- min I/O: 0x1 bytes
- 0x000000000000-0x000004000000 : "mx66l51235l"
* mx66l51235l
- device: mx66l51235l@1
- parent: spi@58003000
- driver: jedec_spi_nor
- path: /soc/spi@58003000/mx66l51235l@1
- type: NOR flash
- block size: 0x10000 bytes
- min I/O: 0x1 bytes
- 0x000000000000-0x000004000000 : "mx66l51235l"
The same mtd name "mx66l51235l" identify the 2 instances
mx66l51235l@0 and mx66l51235l@1.
This patch fixes a ST32CubeProgrammer / stm32prog command issue
with nor0 target on STM32MP157C-EV1 board introduced by
commit b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when
DM is enabled").
Fixes: b7f060565e31 ("mtd: spi-nor: allow registering multiple MTDs when DM is enabled")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
[trini: Add <dm/device.h> to <mtd.h> for DM_MAX_SEQ_STR]
Signed-off-by: Tom Rini <trini@konsulko.com>
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When CONFIG_SYS_MAX_FLASH_BANKS_DETECT is activated,
CONFIG_SYS_MAX_FLASH_BANKS is replaced by cfi_flash_num_flash_banks,
but this variable is defined in drivers/mtd/cfi_flash.c, which is
compiled only when CONFIG_FLASH_CFI_DRIVER is activated, in U-Boot
or in SPL when CONFIG_SPL_MTD_SUPPORT is activated.
This patch deactivates this feature CONFIG_SYS_MAX_FLASH_BANKS_DETECT
when flash cfi driver is not activated to avoid compilation issue in
the next patch, when CONFIG_SYS_MAX_FLASH_BANKS is used in spi_nor_scan().
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
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TCG EFI Protocol Specification defines the number_of_algorithms
field in spec ID event to be equal to the number of active
algorithms supported by the TPM device. In current implementation,
this field is populated with the count of all algorithms supported
by the TPM which leads to incorrect spec ID event creation.
Similarly, the algorithm array in spec ID event should be a variable
length array with length being equal to the number_of_algorithms field.
In current implementation this is defined as a fixed length array
which has been fixed.
Signed-off-by: Ruchika Gupta <ruchika.gupta@linaro.org>
CC: Masahisa Kojima <masahisa.kojima@linaro.org>
CC: Ilias Apalodimas <ilias.apalodimas@linaro.org>
CC: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
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Remove the driver st_smic.c used in SPEAr products and the associated
config CONFIG_ST_SMI; this driver is no more used in U-Boot after the
commit 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr
support").
Fixes: 570c3dcfc153 ("arm: Remove spear600 boards and the rest of SPEAr support")
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
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Bugfixes for this one socfpga platform
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The comment is no longer meaningful due to DT conversion, drop it.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Siew Chin Lim <elly.siew.chin.lim@intel.com>
Cc: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
Cc: Tien Fong Chee <tien.fong.chee@intel.com>
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Allow using different PHY interfaces for multiple USB controllers. When no
value is set in DT, we fall back to CONFIG_MXC_USB_PORTSC for now to stay
compatible with current board configurations.
This also adds support for the HSIC mode of the i.MX7.
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
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These definitions are unused, all boards that define portsc flags use
the equivalent PORT_* definitions instead.
Signed-off-by: Markus Niebel <Markus.Niebel@ew.tq-group.com>
Signed-off-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
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