From daf1312b07208f231a5b27a7edecca5a7d50196b Mon Sep 17 00:00:00 2001 From: Yu Chien Peter Lin Date: Mon, 6 Feb 2023 10:06:29 +0800 Subject: riscv: global_data.h: Correct the comment for PLICSW PLIC is used for external interrupt, while PLICSW is an Andes-specific design for software interrupt. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Rick Chen --- arch/riscv/include/asm/global_data.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/include/asm/global_data.h b/arch/riscv/include/asm/global_data.h index 6fdc86dd8b..31ba72693d 100644 --- a/arch/riscv/include/asm/global_data.h +++ b/arch/riscv/include/asm/global_data.h @@ -22,7 +22,7 @@ struct arch_global_data { void __iomem *clint; /* clint base address */ #endif #ifdef CONFIG_ANDES_PLICSW - void __iomem *plicsw; /* plic base address */ + void __iomem *plicsw; /* andes plicsw base address */ #endif #if CONFIG_IS_ENABLED(SMP) struct ipi_data ipi[CONFIG_NR_CPUS]; -- cgit v1.2.3 From 55ca747f66742d15829f8706a633849d9013bab5 Mon Sep 17 00:00:00 2001 From: Leo Yu-Chi Liang Date: Mon, 6 Feb 2023 16:10:44 +0800 Subject: riscv: Remove redundant Kconfig "RISCV_NDS_CACHE" There is no need for RISCV_NDS_CACHE config to control cache switches. Signed-off-by: Leo Yu-Chi Liang Reviewed-by: Yu Chien Peter Lin Reviewed-by: Rick Chen --- arch/riscv/cpu/ax25/Kconfig | 10 ------ arch/riscv/cpu/ax25/cache.c | 84 ++------------------------------------------- drivers/cache/Kconfig | 1 - 3 files changed, 2 insertions(+), 93 deletions(-) diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/Kconfig index 4a7295d30c..eca68ea2a7 100644 --- a/arch/riscv/cpu/ax25/Kconfig +++ b/arch/riscv/cpu/ax25/Kconfig @@ -12,13 +12,3 @@ config RISCV_NDS help Run U-Boot on AndeStar V5 platforms and use some specific features which are provided by Andes Technology AndeStar V5 families. - -if RISCV_NDS - -config RISCV_NDS_CACHE - bool "AndeStar V5 families specific cache support" - depends on RISCV_MMODE || SPL_RISCV_MMODE - help - Provide Andes Technology AndeStar V5 families specific cache support. - -endif diff --git a/arch/riscv/cpu/ax25/cache.c b/arch/riscv/cpu/ax25/cache.c index 35f23c748d..1c0c3772a1 100644 --- a/arch/riscv/cpu/ax25/cache.c +++ b/arch/riscv/cpu/ax25/cache.c @@ -67,106 +67,26 @@ void invalidate_dcache_range(unsigned long start, unsigned long end) void icache_enable(void) { -#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) -#ifdef CONFIG_RISCV_NDS_CACHE -#if CONFIG_IS_ENABLED(RISCV_MMODE) - asm volatile ( - "csrr t1, mcache_ctl\n\t" - "ori t0, t1, 0x1\n\t" - "csrw mcache_ctl, t0\n\t" - ); -#endif -#endif -#endif } void icache_disable(void) { -#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) -#ifdef CONFIG_RISCV_NDS_CACHE -#if CONFIG_IS_ENABLED(RISCV_MMODE) - asm volatile ( - "fence.i\n\t" - "csrr t1, mcache_ctl\n\t" - "andi t0, t1, ~0x1\n\t" - "csrw mcache_ctl, t0\n\t" - ); -#endif -#endif -#endif } void dcache_enable(void) { -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -#ifdef CONFIG_RISCV_NDS_CACHE -#if CONFIG_IS_ENABLED(RISCV_MMODE) - asm volatile ( - "csrr t1, mcache_ctl\n\t" - "ori t0, t1, 0x2\n\t" - "csrw mcache_ctl, t0\n\t" - ); -#endif -#ifdef CONFIG_V5L2_CACHE - _cache_enable(); -#endif -#endif -#endif } void dcache_disable(void) { -#if !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) -#ifdef CONFIG_RISCV_NDS_CACHE -#if CONFIG_IS_ENABLED(RISCV_MMODE) - csr_write(CCTL_REG_MCCTLCOMMAND_NUM, CCTL_L1D_WBINVAL_ALL); - asm volatile ( - "csrr t1, mcache_ctl\n\t" - "andi t0, t1, ~0x2\n\t" - "csrw mcache_ctl, t0\n\t" - ); -#endif -#ifdef CONFIG_V5L2_CACHE - _cache_disable(); -#endif -#endif -#endif } int icache_status(void) { - int ret = 0; - -#ifdef CONFIG_RISCV_NDS_CACHE -#if CONFIG_IS_ENABLED(RISCV_MMODE) - asm volatile ( - "csrr t1, mcache_ctl\n\t" - "andi %0, t1, 0x01\n\t" - : "=r" (ret) - : - : "memory" - ); -#endif -#endif - - return ret; + return 0; } int dcache_status(void) { - int ret = 0; - -#ifdef CONFIG_RISCV_NDS_CACHE -#if CONFIG_IS_ENABLED(RISCV_MMODE) - asm volatile ( - "csrr t1, mcache_ctl\n\t" - "andi %0, t1, 0x02\n\t" - : "=r" (ret) - : - : "memory" - ); -#endif -#endif - - return ret; + return 0; } diff --git a/drivers/cache/Kconfig b/drivers/cache/Kconfig index 40f41a817c..6cb8c3e980 100644 --- a/drivers/cache/Kconfig +++ b/drivers/cache/Kconfig @@ -25,7 +25,6 @@ config L2X0_CACHE config V5L2_CACHE bool "Andes V5L2 cache driver" select CACHE - depends on RISCV_NDS_CACHE help Support Andes V5L2 cache controller in AE350 platform. It will configure tag and data ram timing control from the -- cgit v1.2.3 From e74e21ceb3fe476e09b4068b4f986aabed2c9463 Mon Sep 17 00:00:00 2001 From: Yu Chien Peter Lin Date: Mon, 6 Feb 2023 16:10:45 +0800 Subject: board: AndesTech: ax25-ae350.c: Enable v5l2-cache in spl_board_init() The L2-cache is not enabled currently, the enbale_caches() will call the v5l2_enable() callback to enable it in SPL. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Rick Chen --- board/AndesTech/ax25-ae350/ax25-ae350.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index 63a966e092..1c2288b6ce 100644 --- a/board/AndesTech/ax25-ae350/ax25-ae350.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -5,6 +5,7 @@ */ #include +#include #include #include #include @@ -72,6 +73,14 @@ void *board_fdt_blob_setup(int *err) return NULL; } +#ifdef CONFIG_SPL_BOARD_INIT +void spl_board_init() +{ + /* enable v5l2 cache */ + enable_caches(); +} +#endif + int smc_init(void) { int node = -1; @@ -96,18 +105,10 @@ int smc_init(void) return 0; } -static void v5l2_init(void) -{ - struct udevice *dev; - - uclass_get_device(UCLASS_CACHE, 0, &dev); -} - #ifdef CONFIG_BOARD_EARLY_INIT_F int board_early_init_f(void) { smc_init(); - v5l2_init(); return 0; } -- cgit v1.2.3 From 51415fa634d2ff0e2d10eeefb739cdb941d19412 Mon Sep 17 00:00:00 2001 From: Yu Chien Peter Lin Date: Mon, 6 Feb 2023 16:10:46 +0800 Subject: driver: cache: cache-v5l2: Update memory-mapped scheme to support Gen2 platform The L2C configuration register has MAP field to indicate its version is v0 (Gen1) or v1 (Gen2) L2-cache. This patch makes the driver compatible with both memory-mapped scheme. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Rick Chen --- drivers/cache/cache-v5l2.c | 32 ++++++++++++++++++++++++-------- 1 file changed, 24 insertions(+), 8 deletions(-) diff --git a/drivers/cache/cache-v5l2.c b/drivers/cache/cache-v5l2.c index bbdb76bd57..e782430c57 100644 --- a/drivers/cache/cache-v5l2.c +++ b/drivers/cache/cache-v5l2.c @@ -34,6 +34,14 @@ struct l2cache { volatile u64 cctl_status; }; +/* Configuration register */ +#define MEM_MAP_OFF 20 +#define MEM_MAP_MSK BIT(MEM_MAP_OFF) +/* offset of v0 memory map (Gen1) */ +static u32 cmd_stride = 0x10; +static u32 status_stride = 0x0; +static u32 status_bit_offset = 0x4; + /* Control Register */ #define L2_ENABLE 0x1 /* prefetch */ @@ -53,14 +61,15 @@ struct l2cache { #define DRAMICTL_MSK BIT(DRAMICTL_OFF) /* CCTL Command Register */ -#define CCTL_CMD_REG(base, hart) ((ulong)(base) + 0x40 + (hart) * 0x10) +#define CCTL_CMD_REG(base, hart) ((ulong)(base) + 0x40 + (hart) * (cmd_stride)) #define L2_WBINVAL_ALL 0x12 /* CCTL Status Register */ -#define CCTL_STATUS_MSK(hart) (0xf << ((hart) * 4)) -#define CCTL_STATUS_IDLE(hart) (0 << ((hart) * 4)) -#define CCTL_STATUS_PROCESS(hart) (1 << ((hart) * 4)) -#define CCTL_STATUS_ILLEGAL(hart) (2 << ((hart) * 4)) +#define CCTL_STATUS_REG(base, hart) ((ulong)(base) + 0x80 + (hart) * (status_stride)) +#define CCTL_STATUS_MSK(hart) (0xf << ((hart) * (status_bit_offset))) +#define CCTL_STATUS_IDLE(hart) (0 << ((hart) * (status_bit_offset))) +#define CCTL_STATUS_PROCESS(hart) (1 << ((hart) * (status_bit_offset))) +#define CCTL_STATUS_ILLEGAL(hart) (2 << ((hart) * (status_bit_offset))) DECLARE_GLOBAL_DATA_PTR; @@ -133,12 +142,19 @@ static int v5l2_probe(struct udevice *dev) { struct v5l2_plat *plat = dev_get_plat(dev); struct l2cache *regs = plat->regs; - u32 ctl_val; + u32 cfg_val, ctl_val; + cfg_val = readl(®s->configure); ctl_val = readl(®s->control); - if (!(ctl_val & L2_ENABLE)) - ctl_val |= L2_ENABLE; + /* If true, v1 memory map (Gen2) */ + if (cfg_val & MEM_MAP_MSK) { + cmd_stride = 0x1000; + status_stride = 0x1000; + status_bit_offset = 0x0; + } + + ctl_val |= L2_ENABLE; if (plat->iprefetch != -EINVAL) { ctl_val &= ~(IPREPETCH_MSK); -- cgit v1.2.3 From d8a146d19b9a39a9b90aa40c8e61c5d0ddfa17e5 Mon Sep 17 00:00:00 2001 From: Yu Chien Peter Lin Date: Mon, 6 Feb 2023 16:10:47 +0800 Subject: riscv: cpu: ax25: Simplify cache enabling logic in harts_early_init() As the OpenSBI v1.2 does not enable the cache [0], we enable the i/d-cache in harts_early_init() and do not disable in cleanup_before_linux(). This patch also simplifies the logic and moves the CSR encoding to include/asm/arch-andes/csr.h. [0] https://github.com/riscv-software-src/opensbi/commit/bd7ef4139829da5c30fa980f7498d385124408fa Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Rick Chen --- arch/riscv/cpu/ax25/cpu.c | 49 ++++++++------------------------- arch/riscv/include/asm/arch-andes/csr.h | 31 +++++++++++++++++++++ 2 files changed, 43 insertions(+), 37 deletions(-) create mode 100644 arch/riscv/include/asm/arch-andes/csr.h diff --git a/arch/riscv/cpu/ax25/cpu.c b/arch/riscv/cpu/ax25/cpu.c index a46674f7c2..06e379bcb1 100644 --- a/arch/riscv/cpu/ax25/cpu.c +++ b/arch/riscv/cpu/ax25/cpu.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Andes Technology Corporation + * Copyright (C) 2023 Andes Technology Corporation * Rick Chen, Andes Technology Corporation */ @@ -10,23 +10,7 @@ #include #include #include - -#define CSR_MCACHE_CTL 0x7ca -#define CSR_MMISC_CTL 0x7d0 -#define CSR_MARCHID 0xf12 - -#define V5_MCACHE_CTL_IC_EN_OFFSET 0 -#define V5_MCACHE_CTL_DC_EN_OFFSET 1 -#define V5_MCACHE_CTL_CCTL_SUEN_OFFSET 8 -#define V5_MCACHE_CTL_DC_COHEN_OFFSET 19 -#define V5_MCACHE_CTL_DC_COHSTA_OFFSET 20 - -#define V5_MCACHE_CTL_IC_EN BIT(V5_MCACHE_CTL_IC_EN_OFFSET) -#define V5_MCACHE_CTL_DC_EN BIT(V5_MCACHE_CTL_DC_EN_OFFSET) -#define V5_MCACHE_CTL_CCTL_SUEN BIT(V5_MCACHE_CTL_CCTL_SUEN_OFFSET) -#define V5_MCACHE_CTL_DC_COHEN_EN BIT(V5_MCACHE_CTL_DC_COHEN_OFFSET) -#define V5_MCACHE_CTL_DC_COHSTA_EN BIT(V5_MCACHE_CTL_DC_COHSTA_OFFSET) - +#include /* * cleanup_before_linux() is called just before we call linux @@ -38,38 +22,29 @@ int cleanup_before_linux(void) { disable_interrupts(); - /* turn off I/D-cache */ cache_flush(); - icache_disable(); - dcache_disable(); return 0; } void harts_early_init(void) { + /* Enable I/D-cache in SPL */ if (CONFIG_IS_ENABLED(RISCV_MMODE)) { - unsigned long long mcache_ctl_val = csr_read(CSR_MCACHE_CTL); + unsigned long mcache_ctl_val = csr_read(CSR_MCACHE_CTL); + + mcache_ctl_val |= (MCACHE_CTL_DC_COHEN | MCACHE_CTL_IC_EN | + MCACHE_CTL_DC_EN | MCACHE_CTL_CCTL_SUEN); - if (!(mcache_ctl_val & V5_MCACHE_CTL_DC_COHEN_EN)) - mcache_ctl_val |= V5_MCACHE_CTL_DC_COHEN_EN; - if (!(mcache_ctl_val & V5_MCACHE_CTL_IC_EN)) - mcache_ctl_val |= V5_MCACHE_CTL_IC_EN; - if (!(mcache_ctl_val & V5_MCACHE_CTL_DC_EN)) - mcache_ctl_val |= V5_MCACHE_CTL_DC_EN; - if (!(mcache_ctl_val & V5_MCACHE_CTL_CCTL_SUEN)) - mcache_ctl_val |= V5_MCACHE_CTL_CCTL_SUEN; csr_write(CSR_MCACHE_CTL, mcache_ctl_val); /* - * Check DC_COHEN_EN, if cannot write to mcache_ctl, - * we assume this bitmap not support L2 CM + * Check mcache_ctl.DC_COHEN, we assume this platform does + * not support CM if the bit is hard-wired to 0. */ - mcache_ctl_val = csr_read(CSR_MCACHE_CTL); - if ((mcache_ctl_val & V5_MCACHE_CTL_DC_COHEN_EN)) { - /* Wait for DC_COHSTA bit be set */ - while (!(mcache_ctl_val & V5_MCACHE_CTL_DC_COHSTA_EN)) - mcache_ctl_val = csr_read(CSR_MCACHE_CTL); + if (csr_read(CSR_MCACHE_CTL) & MCACHE_CTL_DC_COHEN) { + /* Wait for DC_COHSTA bit to be set */ + while (!(csr_read(CSR_MCACHE_CTL) & MCACHE_CTL_DC_COHSTA)); } } } diff --git a/arch/riscv/include/asm/arch-andes/csr.h b/arch/riscv/include/asm/arch-andes/csr.h new file mode 100644 index 0000000000..c7ed920cde --- /dev/null +++ b/arch/riscv/include/asm/arch-andes/csr.h @@ -0,0 +1,31 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Andes Technology Corporation + */ + +#ifndef _ASM_ANDES_CSR_H +#define _ASM_ANDES_CSR_H + +#include +#include + +#define CSR_MCACHE_CTL 0x7ca +#define CSR_MMISC_CTL 0x7d0 +#define CSR_MARCHID 0xf12 +#define CSR_MCCTLCOMMAND 0x7cc + +#define MCACHE_CTL_IC_EN_OFFSET 0 +#define MCACHE_CTL_DC_EN_OFFSET 1 +#define MCACHE_CTL_CCTL_SUEN_OFFSET 8 +#define MCACHE_CTL_DC_COHEN_OFFSET 19 +#define MCACHE_CTL_DC_COHSTA_OFFSET 20 + +#define MCACHE_CTL_IC_EN BIT(MCACHE_CTL_IC_EN_OFFSET) +#define MCACHE_CTL_DC_EN BIT(MCACHE_CTL_DC_EN_OFFSET) +#define MCACHE_CTL_CCTL_SUEN BIT(MCACHE_CTL_CCTL_SUEN_OFFSET) +#define MCACHE_CTL_DC_COHEN BIT(MCACHE_CTL_DC_COHEN_OFFSET) +#define MCACHE_CTL_DC_COHSTA BIT(MCACHE_CTL_DC_COHSTA_OFFSET) + +#define CCTL_L1D_WBINVAL_ALL 6 + +#endif /* _ASM_ANDES_CSR_H */ -- cgit v1.2.3 From c1b88196807e1dd797aea6cc7ddb0dce02b4e898 Mon Sep 17 00:00:00 2001 From: Yu Chien Peter Lin Date: Mon, 6 Feb 2023 16:10:48 +0800 Subject: riscv: ae350: dts: Update L2 cache compatible string Update the compatible string of L2 cache. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Rick Chen --- arch/riscv/dts/ae350_32.dts | 2 +- arch/riscv/dts/ae350_64.dts | 2 +- drivers/cache/cache-v5l2.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/riscv/dts/ae350_32.dts b/arch/riscv/dts/ae350_32.dts index 96ef8bd8dd..61af6d5465 100644 --- a/arch/riscv/dts/ae350_32.dts +++ b/arch/riscv/dts/ae350_32.dts @@ -112,7 +112,7 @@ }; L2: l2-cache@e0500000 { - compatible = "v5l2cache"; + compatible = "cache"; cache-level = <2>; cache-size = <0x40000>; reg = <0xe0500000 0x40000>; diff --git a/arch/riscv/dts/ae350_64.dts b/arch/riscv/dts/ae350_64.dts index cddbaec98a..8c7db29b4f 100644 --- a/arch/riscv/dts/ae350_64.dts +++ b/arch/riscv/dts/ae350_64.dts @@ -112,7 +112,7 @@ }; L2: l2-cache@e0500000 { - compatible = "v5l2cache"; + compatible = "cache"; cache-level = <2>; cache-size = <0x40000>; reg = <0x0 0xe0500000 0x0 0x40000>; diff --git a/drivers/cache/cache-v5l2.c b/drivers/cache/cache-v5l2.c index e782430c57..c6d3a8f893 100644 --- a/drivers/cache/cache-v5l2.c +++ b/drivers/cache/cache-v5l2.c @@ -184,7 +184,7 @@ static int v5l2_probe(struct udevice *dev) } static const struct udevice_id v5l2_cache_ids[] = { - { .compatible = "v5l2cache" }, + { .compatible = "cache" }, {} }; -- cgit v1.2.3 From 600a708c0551cb31a7f4f553ec9347b0280cf21e Mon Sep 17 00:00:00 2001 From: Yu Chien Peter Lin Date: Mon, 6 Feb 2023 16:10:49 +0800 Subject: riscv: ax25: cache.c: Cleanups to L1/L2 cache function used in SPL This patch refines L1 cache enable/disable and v5l2-cache enable functions. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Rick Chen --- arch/riscv/cpu/ax25/cache.c | 98 +++++++++++++++++++++++++++++++-------------- 1 file changed, 68 insertions(+), 30 deletions(-) diff --git a/arch/riscv/cpu/ax25/cache.c b/arch/riscv/cpu/ax25/cache.c index 1c0c3772a1..40d77f671c 100644 --- a/arch/riscv/cpu/ax25/cache.c +++ b/arch/riscv/cpu/ax25/cache.c @@ -1,57 +1,51 @@ // SPDX-License-Identifier: GPL-2.0+ /* - * Copyright (C) 2017 Andes Technology Corporation + * Copyright (C) 2023 Andes Technology Corporation * Rick Chen, Andes Technology Corporation */ +#include +#include #include +#include #include #include -#include #include -#include -#include - -#ifdef CONFIG_RISCV_NDS_CACHE -#if CONFIG_IS_ENABLED(RISCV_MMODE) -/* mcctlcommand */ -#define CCTL_REG_MCCTLCOMMAND_NUM 0x7cc - -/* D-cache operation */ -#define CCTL_L1D_WBINVAL_ALL 6 -#endif -#endif +#include #ifdef CONFIG_V5L2_CACHE -static void _cache_enable(void) +void enable_caches(void) { - struct udevice *dev = NULL; - - uclass_find_first_device(UCLASS_CACHE, &dev); - - if (dev) - cache_enable(dev); + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_CACHE, + DM_DRIVER_GET(v5l2_cache), + &dev); + if (ret) { + log_debug("Cannot enable v5l2 cache\n"); + } else { + ret = cache_enable(dev); + if (ret) + log_debug("v5l2 cache enable failed\n"); + } } -static void _cache_disable(void) +static void cache_ops(int (*ops)(struct udevice *dev)) { struct udevice *dev = NULL; uclass_find_first_device(UCLASS_CACHE, &dev); if (dev) - cache_disable(dev); + ops(dev); } #endif void flush_dcache_all(void) { -#if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF) -#ifdef CONFIG_RISCV_NDS_CACHE #if CONFIG_IS_ENABLED(RISCV_MMODE) - csr_write(CCTL_REG_MCCTLCOMMAND_NUM, CCTL_L1D_WBINVAL_ALL); -#endif -#endif + csr_write(CSR_MCCTLCOMMAND, CCTL_L1D_WBINVAL_ALL); #endif } @@ -67,26 +61,70 @@ void invalidate_dcache_range(unsigned long start, unsigned long end) void icache_enable(void) { +#if CONFIG_IS_ENABLED(RISCV_MMODE) + asm volatile("csrsi %0, 0x1" :: "i"(CSR_MCACHE_CTL)); +#endif } void icache_disable(void) { +#if CONFIG_IS_ENABLED(RISCV_MMODE) + asm volatile("csrci %0, 0x1" :: "i"(CSR_MCACHE_CTL)); +#endif } void dcache_enable(void) { +#if CONFIG_IS_ENABLED(RISCV_MMODE) + asm volatile("csrsi %0, 0x2" :: "i"(CSR_MCACHE_CTL)); +#endif + +#ifdef CONFIG_V5L2_CACHE + cache_ops(cache_enable); +#endif } void dcache_disable(void) { +#if CONFIG_IS_ENABLED(RISCV_MMODE) + asm volatile("csrci %0, 0x2" :: "i"(CSR_MCACHE_CTL)); +#endif + +#ifdef CONFIG_V5L2_CACHE + cache_ops(cache_disable); +#endif } int icache_status(void) { - return 0; + int ret = 0; + +#if CONFIG_IS_ENABLED(RISCV_MMODE) + asm volatile ( + "csrr t1, %1\n\t" + "andi %0, t1, 0x01\n\t" + : "=r" (ret) + : "i"(CSR_MCACHE_CTL) + : "memory" + ); +#endif + + return !!ret; } int dcache_status(void) { - return 0; + int ret = 0; + +#if CONFIG_IS_ENABLED(RISCV_MMODE) + asm volatile ( + "csrr t1, %1\n\t" + "andi %0, t1, 0x02\n\t" + : "=r" (ret) + : "i" (CSR_MCACHE_CTL) + : "memory" + ); +#endif + + return !!ret; } -- cgit v1.2.3 From 487c211ef6720b4226853755322c862be701fd36 Mon Sep 17 00:00:00 2001 From: Yu Chien Peter Lin Date: Mon, 6 Feb 2023 16:10:50 +0800 Subject: configs: ae350: Enable v5l2 cache for AE350 platforms in SPL To reduce the code size, CONFIG_V5L2_CACHE was disabled since commit: ca06444aac2c643db3a3f2eb37afc60fae15177e Turing on does not significantly increase the size of u-boot-spl.bin, so we enable it by default to improve performance. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Rick Chen --- arch/riscv/cpu/ax25/Kconfig | 1 + configs/ae350_rv32_spl_defconfig | 2 ++ configs/ae350_rv32_spl_xip_defconfig | 2 ++ configs/ae350_rv64_spl_defconfig | 2 ++ configs/ae350_rv64_spl_xip_defconfig | 2 ++ 5 files changed, 9 insertions(+) diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/Kconfig index eca68ea2a7..82bb5a2a53 100644 --- a/arch/riscv/cpu/ax25/Kconfig +++ b/arch/riscv/cpu/ax25/Kconfig @@ -6,6 +6,7 @@ config RISCV_NDS imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE) imply ANDES_PLICSW if (RISCV_MMODE || SPL_RISCV_MMODE) imply ANDES_PLMT_TIMER if (RISCV_MMODE || SPL_RISCV_MMODE) + imply V5L2_CACHE imply SPL_CPU imply SPL_OPENSBI imply SPL_LOAD_FIT diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index a66db65621..f5bd7a9a7e 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -22,6 +22,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_CACHE=y CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 606962c0a7..014dcbedf6 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_CACHE=y CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index f235db7990..51d23d050d 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -22,6 +22,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_CACHE=y CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 4cbfd52fb1..c44df4b561 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -23,6 +23,8 @@ CONFIG_BOOTDELAY=3 CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BOARD_INIT=y +CONFIG_SPL_CACHE=y CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x4000000 CONFIG_CMD_IMLS=y -- cgit v1.2.3 From d002b2a187bac1f3da1d0374293a6db8891b7f3b Mon Sep 17 00:00:00 2001 From: Yu Chien Peter Lin Date: Mon, 6 Feb 2023 16:10:51 +0800 Subject: configs: ae350: Increase maximum retry count for AE350 platforms Loading an image via TFTP is often interrupted when retrying more than 10 times, increase the number of retries so that it does not simply stop the transfer. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang --- configs/ae350_rv32_defconfig | 1 + configs/ae350_rv32_spl_defconfig | 1 + configs/ae350_rv32_spl_xip_defconfig | 1 + configs/ae350_rv32_xip_defconfig | 1 + configs/ae350_rv64_defconfig | 1 + configs/ae350_rv64_spl_defconfig | 1 + configs/ae350_rv64_spl_xip_defconfig | 1 + configs/ae350_rv64_xip_defconfig | 1 + 8 files changed, 8 insertions(+) diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index e5c8358e54..a9d158dc8d 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_CACHE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=50 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index f5bd7a9a7e..54587018d5 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RETRY_COUNT=50 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index 014dcbedf6..b626153723 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RETRY_COUNT=50 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC=y diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index 069a9d3982..628522cd4d 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_CACHE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=50 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC=y diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index c373b99b95..c058f76780 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -26,6 +26,7 @@ CONFIG_CMD_CACHE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=50 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 51d23d050d..9664baf705 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -34,6 +34,7 @@ CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RETRY_COUNT=50 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC=y diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index c44df4b561..b754888409 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -35,6 +35,7 @@ CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y +CONFIG_NET_RETRY_COUNT=50 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC=y diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index 4fed2ead1d..380ae096ee 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -27,6 +27,7 @@ CONFIG_CMD_CACHE=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RETRY_COUNT=50 CONFIG_BOOTP_SEND_HOSTNAME=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_MMC=y -- cgit v1.2.3 From f29834d150f9650c7d38dac62f601444e9a31238 Mon Sep 17 00:00:00 2001 From: Yu Chien Peter Lin Date: Mon, 6 Feb 2023 16:10:52 +0800 Subject: configs: ae350: Display CPU and board info for AE350 platforms Display information about CPU and board during start up. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Rick Chen --- configs/ae350_rv32_defconfig | 2 ++ configs/ae350_rv32_spl_defconfig | 2 ++ configs/ae350_rv32_spl_xip_defconfig | 2 ++ configs/ae350_rv32_xip_defconfig | 2 ++ configs/ae350_rv64_defconfig | 2 ++ configs/ae350_rv64_spl_defconfig | 2 ++ configs/ae350_rv64_spl_xip_defconfig | 2 ++ configs/ae350_rv64_xip_defconfig | 2 ++ 8 files changed, 16 insertions(+) diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index a9d158dc8d..fd1bf5fa4f 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -14,6 +14,8 @@ CONFIG_SYS_MONITOR_LEN=786432 CONFIG_FIT=y CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x4000000 diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 54587018d5..4d3623a894 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -19,6 +19,8 @@ CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000 CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index b626153723..a076b77834 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -20,6 +20,8 @@ CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000 CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index 628522cd4d..da1bd2b10b 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -15,6 +15,8 @@ CONFIG_SYS_MONITOR_LEN=786432 CONFIG_FIT=y CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x4000000 diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index c058f76780..959258176a 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -14,6 +14,8 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffd70 CONFIG_FIT=y CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x4000000 diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 9664baf705..0217027e6d 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -19,6 +19,8 @@ CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000 CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index b754888409..5a1fa8b6a1 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -20,6 +20,8 @@ CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000 CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x4000000 diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index 380ae096ee..c3fcbf3d28 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -15,6 +15,8 @@ CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffd70 CONFIG_FIT=y CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SYS_PBSIZE=1050 CONFIG_SYS_BOOTM_LEN=0x4000000 -- cgit v1.2.3 From da24626d147cdd04e84f88c0196a0131fa22cee7 Mon Sep 17 00:00:00 2001 From: Yu Chien Peter Lin Date: Mon, 6 Feb 2023 16:10:53 +0800 Subject: driver: cache-v5l2: Fix type casting warning on RV32 This patch fixes following warning for the riscv32 toolchain. drivers/cache/cache-v5l2.c:122:16: warning: cast to pointer from integer of different size [-Wint-to-pointer-cast] 122 | regs = (struct l2cache *)dev_read_addr(dev); | ^ Signed-off-by: Yu Chien Peter Lin Reviewed-by: Leo Yu-Chi Liang --- drivers/cache/cache-v5l2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/cache/cache-v5l2.c b/drivers/cache/cache-v5l2.c index c6d3a8f893..eda07d3f29 100644 --- a/drivers/cache/cache-v5l2.c +++ b/drivers/cache/cache-v5l2.c @@ -119,7 +119,7 @@ static int v5l2_of_to_plat(struct udevice *dev) struct v5l2_plat *plat = dev_get_plat(dev); struct l2cache *regs; - regs = (struct l2cache *)dev_read_addr(dev); + regs = (struct l2cache *)(uintptr_t)dev_read_addr(dev); plat->regs = regs; plat->iprefetch = -EINVAL; -- cgit v1.2.3 From 8900e2bbecd021b16eee7c344cd6ca0e1ee901f3 Mon Sep 17 00:00:00 2001 From: Leo Yu-Chi Liang Date: Tue, 14 Feb 2023 20:42:49 +0800 Subject: riscv: Rename Andes cpu and board names The current ae350-related defconfigs could also support newer Andes CPU IP, so modify the names of CPU from ax25 to andesv5, and board name from ax25-ae350 to ae350. Signed-off-by: Leo Yu-Chi Liang Reviewed-by: Yu Chien Peter Lin Reviewed-by: Rick Chen --- arch/riscv/Kconfig | 8 +- arch/riscv/cpu/andesv5/Kconfig | 15 + arch/riscv/cpu/andesv5/Makefile | 8 + arch/riscv/cpu/andesv5/cache.c | 130 ++++++++ arch/riscv/cpu/andesv5/cpu.c | 50 +++ arch/riscv/cpu/andesv5/spl.c | 27 ++ arch/riscv/cpu/ax25/Kconfig | 15 - arch/riscv/cpu/ax25/Makefile | 8 - arch/riscv/cpu/ax25/cache.c | 130 -------- arch/riscv/cpu/ax25/cpu.c | 50 --- arch/riscv/cpu/ax25/spl.c | 27 -- arch/riscv/dts/Makefile | 2 +- board/AndesTech/ae350/Kconfig | 44 +++ board/AndesTech/ae350/MAINTAINERS | 13 + board/AndesTech/ae350/Makefile | 6 + board/AndesTech/ae350/ae350.c | 141 +++++++++ board/AndesTech/ax25-ae350/Kconfig | 44 --- board/AndesTech/ax25-ae350/MAINTAINERS | 13 - board/AndesTech/ax25-ae350/Makefile | 6 - board/AndesTech/ax25-ae350/ax25-ae350.c | 141 --------- configs/ae350_rv32_defconfig | 2 +- configs/ae350_rv32_spl_defconfig | 2 +- configs/ae350_rv32_spl_xip_defconfig | 2 +- configs/ae350_rv32_xip_defconfig | 2 +- configs/ae350_rv64_defconfig | 2 +- configs/ae350_rv64_spl_defconfig | 2 +- configs/ae350_rv64_spl_xip_defconfig | 2 +- configs/ae350_rv64_xip_defconfig | 2 +- doc/board/AndesTech/ae350.rst | 524 ++++++++++++++++++++++++++++++++ doc/board/AndesTech/ax25-ae350.rst | 524 -------------------------------- doc/board/AndesTech/index.rst | 2 +- include/configs/ae350.h | 93 ++++++ include/configs/ax25-ae350.h | 93 ------ 33 files changed, 1065 insertions(+), 1065 deletions(-) create mode 100644 arch/riscv/cpu/andesv5/Kconfig create mode 100644 arch/riscv/cpu/andesv5/Makefile create mode 100644 arch/riscv/cpu/andesv5/cache.c create mode 100644 arch/riscv/cpu/andesv5/cpu.c create mode 100644 arch/riscv/cpu/andesv5/spl.c delete mode 100644 arch/riscv/cpu/ax25/Kconfig delete mode 100644 arch/riscv/cpu/ax25/Makefile delete mode 100644 arch/riscv/cpu/ax25/cache.c delete mode 100644 arch/riscv/cpu/ax25/cpu.c delete mode 100644 arch/riscv/cpu/ax25/spl.c create mode 100644 board/AndesTech/ae350/Kconfig create mode 100644 board/AndesTech/ae350/MAINTAINERS create mode 100644 board/AndesTech/ae350/Makefile create mode 100644 board/AndesTech/ae350/ae350.c delete mode 100644 board/AndesTech/ax25-ae350/Kconfig delete mode 100644 board/AndesTech/ax25-ae350/MAINTAINERS delete mode 100644 board/AndesTech/ax25-ae350/Makefile delete mode 100644 board/AndesTech/ax25-ae350/ax25-ae350.c create mode 100644 doc/board/AndesTech/ae350.rst delete mode 100644 doc/board/AndesTech/ax25-ae350.rst create mode 100644 include/configs/ae350.h delete mode 100644 include/configs/ax25-ae350.h diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index ebc4bef220..48ca4ff4c4 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -8,8 +8,8 @@ choice prompt "Target select" optional -config TARGET_AX25_AE350 - bool "Support ax25-ae350" +config TARGET_AE350 + bool "Support ae350" config TARGET_MICROCHIP_ICICLE bool "Support Microchip PolarFire-SoC Icicle Board" @@ -58,7 +58,7 @@ config SPL_SYS_DCACHE_OFF Do not enable data cache in SPL. # board-specific options below -source "board/AndesTech/ax25-ae350/Kconfig" +source "board/AndesTech/ae350/Kconfig" source "board/emulation/qemu-riscv/Kconfig" source "board/microchip/mpfs_icicle/Kconfig" source "board/sifive/unleashed/Kconfig" @@ -67,7 +67,7 @@ source "board/openpiton/riscv64/Kconfig" source "board/sipeed/maix/Kconfig" # platform-specific options below -source "arch/riscv/cpu/ax25/Kconfig" +source "arch/riscv/cpu/andesv5/Kconfig" source "arch/riscv/cpu/fu540/Kconfig" source "arch/riscv/cpu/fu740/Kconfig" source "arch/riscv/cpu/generic/Kconfig" diff --git a/arch/riscv/cpu/andesv5/Kconfig b/arch/riscv/cpu/andesv5/Kconfig new file mode 100644 index 0000000000..82bb5a2a53 --- /dev/null +++ b/arch/riscv/cpu/andesv5/Kconfig @@ -0,0 +1,15 @@ +config RISCV_NDS + bool + select ARCH_EARLY_INIT_R + imply CPU + imply CPU_RISCV + imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE) + imply ANDES_PLICSW if (RISCV_MMODE || SPL_RISCV_MMODE) + imply ANDES_PLMT_TIMER if (RISCV_MMODE || SPL_RISCV_MMODE) + imply V5L2_CACHE + imply SPL_CPU + imply SPL_OPENSBI + imply SPL_LOAD_FIT + help + Run U-Boot on AndeStar V5 platforms and use some specific features + which are provided by Andes Technology AndeStar V5 families. diff --git a/arch/riscv/cpu/andesv5/Makefile b/arch/riscv/cpu/andesv5/Makefile new file mode 100644 index 0000000000..35a1a2fb83 --- /dev/null +++ b/arch/riscv/cpu/andesv5/Makefile @@ -0,0 +1,8 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2017 Andes Technology Corporation +# Rick Chen, Andes Technology Corporation + +obj-y := cpu.o +obj-y += cache.o +obj-y += spl.o diff --git a/arch/riscv/cpu/andesv5/cache.c b/arch/riscv/cpu/andesv5/cache.c new file mode 100644 index 0000000000..40d77f671c --- /dev/null +++ b/arch/riscv/cpu/andesv5/cache.c @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#ifdef CONFIG_V5L2_CACHE +void enable_caches(void) +{ + struct udevice *dev; + int ret; + + ret = uclass_get_device_by_driver(UCLASS_CACHE, + DM_DRIVER_GET(v5l2_cache), + &dev); + if (ret) { + log_debug("Cannot enable v5l2 cache\n"); + } else { + ret = cache_enable(dev); + if (ret) + log_debug("v5l2 cache enable failed\n"); + } +} + +static void cache_ops(int (*ops)(struct udevice *dev)) +{ + struct udevice *dev = NULL; + + uclass_find_first_device(UCLASS_CACHE, &dev); + + if (dev) + ops(dev); +} +#endif + +void flush_dcache_all(void) +{ +#if CONFIG_IS_ENABLED(RISCV_MMODE) + csr_write(CSR_MCCTLCOMMAND, CCTL_L1D_WBINVAL_ALL); +#endif +} + +void flush_dcache_range(unsigned long start, unsigned long end) +{ + flush_dcache_all(); +} + +void invalidate_dcache_range(unsigned long start, unsigned long end) +{ + flush_dcache_all(); +} + +void icache_enable(void) +{ +#if CONFIG_IS_ENABLED(RISCV_MMODE) + asm volatile("csrsi %0, 0x1" :: "i"(CSR_MCACHE_CTL)); +#endif +} + +void icache_disable(void) +{ +#if CONFIG_IS_ENABLED(RISCV_MMODE) + asm volatile("csrci %0, 0x1" :: "i"(CSR_MCACHE_CTL)); +#endif +} + +void dcache_enable(void) +{ +#if CONFIG_IS_ENABLED(RISCV_MMODE) + asm volatile("csrsi %0, 0x2" :: "i"(CSR_MCACHE_CTL)); +#endif + +#ifdef CONFIG_V5L2_CACHE + cache_ops(cache_enable); +#endif +} + +void dcache_disable(void) +{ +#if CONFIG_IS_ENABLED(RISCV_MMODE) + asm volatile("csrci %0, 0x2" :: "i"(CSR_MCACHE_CTL)); +#endif + +#ifdef CONFIG_V5L2_CACHE + cache_ops(cache_disable); +#endif +} + +int icache_status(void) +{ + int ret = 0; + +#if CONFIG_IS_ENABLED(RISCV_MMODE) + asm volatile ( + "csrr t1, %1\n\t" + "andi %0, t1, 0x01\n\t" + : "=r" (ret) + : "i"(CSR_MCACHE_CTL) + : "memory" + ); +#endif + + return !!ret; +} + +int dcache_status(void) +{ + int ret = 0; + +#if CONFIG_IS_ENABLED(RISCV_MMODE) + asm volatile ( + "csrr t1, %1\n\t" + "andi %0, t1, 0x02\n\t" + : "=r" (ret) + : "i" (CSR_MCACHE_CTL) + : "memory" + ); +#endif + + return !!ret; +} diff --git a/arch/riscv/cpu/andesv5/cpu.c b/arch/riscv/cpu/andesv5/cpu.c new file mode 100644 index 0000000000..06e379bcb1 --- /dev/null +++ b/arch/riscv/cpu/andesv5/cpu.c @@ -0,0 +1,50 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation + */ + +/* CPU specific code */ +#include +#include +#include +#include +#include +#include + +/* + * cleanup_before_linux() is called just before we call linux + * it prepares the processor for linux + * + * we disable interrupt and caches. + */ +int cleanup_before_linux(void) +{ + disable_interrupts(); + + cache_flush(); + + return 0; +} + +void harts_early_init(void) +{ + /* Enable I/D-cache in SPL */ + if (CONFIG_IS_ENABLED(RISCV_MMODE)) { + unsigned long mcache_ctl_val = csr_read(CSR_MCACHE_CTL); + + mcache_ctl_val |= (MCACHE_CTL_DC_COHEN | MCACHE_CTL_IC_EN | + MCACHE_CTL_DC_EN | MCACHE_CTL_CCTL_SUEN); + + csr_write(CSR_MCACHE_CTL, mcache_ctl_val); + + /* + * Check mcache_ctl.DC_COHEN, we assume this platform does + * not support CM if the bit is hard-wired to 0. + */ + if (csr_read(CSR_MCACHE_CTL) & MCACHE_CTL_DC_COHEN) { + /* Wait for DC_COHSTA bit to be set */ + while (!(csr_read(CSR_MCACHE_CTL) & MCACHE_CTL_DC_COHSTA)); + } + } +} diff --git a/arch/riscv/cpu/andesv5/spl.c b/arch/riscv/cpu/andesv5/spl.c new file mode 100644 index 0000000000..413849043b --- /dev/null +++ b/arch/riscv/cpu/andesv5/spl.c @@ -0,0 +1,27 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2023 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation + */ +#include +#include +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +#if CONFIG_IS_ENABLED(RAM_SUPPORT) +struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size) +{ + return (void *)(CONFIG_SPL_LOAD_FIT_ADDRESS + offset); +} + +void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len) +{ + return spl_get_load_buffer(0, sectors * bl_len); +} +#endif diff --git a/arch/riscv/cpu/ax25/Kconfig b/arch/riscv/cpu/ax25/Kconfig deleted file mode 100644 index 82bb5a2a53..0000000000 --- a/arch/riscv/cpu/ax25/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -config RISCV_NDS - bool - select ARCH_EARLY_INIT_R - imply CPU - imply CPU_RISCV - imply RISCV_TIMER if (RISCV_SMODE || SPL_RISCV_SMODE) - imply ANDES_PLICSW if (RISCV_MMODE || SPL_RISCV_MMODE) - imply ANDES_PLMT_TIMER if (RISCV_MMODE || SPL_RISCV_MMODE) - imply V5L2_CACHE - imply SPL_CPU - imply SPL_OPENSBI - imply SPL_LOAD_FIT - help - Run U-Boot on AndeStar V5 platforms and use some specific features - which are provided by Andes Technology AndeStar V5 families. diff --git a/arch/riscv/cpu/ax25/Makefile b/arch/riscv/cpu/ax25/Makefile deleted file mode 100644 index 35a1a2fb83..0000000000 --- a/arch/riscv/cpu/ax25/Makefile +++ /dev/null @@ -1,8 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2017 Andes Technology Corporation -# Rick Chen, Andes Technology Corporation - -obj-y := cpu.o -obj-y += cache.o -obj-y += spl.o diff --git a/arch/riscv/cpu/ax25/cache.c b/arch/riscv/cpu/ax25/cache.c deleted file mode 100644 index 40d77f671c..0000000000 --- a/arch/riscv/cpu/ax25/cache.c +++ /dev/null @@ -1,130 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2023 Andes Technology Corporation - * Rick Chen, Andes Technology Corporation - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_V5L2_CACHE -void enable_caches(void) -{ - struct udevice *dev; - int ret; - - ret = uclass_get_device_by_driver(UCLASS_CACHE, - DM_DRIVER_GET(v5l2_cache), - &dev); - if (ret) { - log_debug("Cannot enable v5l2 cache\n"); - } else { - ret = cache_enable(dev); - if (ret) - log_debug("v5l2 cache enable failed\n"); - } -} - -static void cache_ops(int (*ops)(struct udevice *dev)) -{ - struct udevice *dev = NULL; - - uclass_find_first_device(UCLASS_CACHE, &dev); - - if (dev) - ops(dev); -} -#endif - -void flush_dcache_all(void) -{ -#if CONFIG_IS_ENABLED(RISCV_MMODE) - csr_write(CSR_MCCTLCOMMAND, CCTL_L1D_WBINVAL_ALL); -#endif -} - -void flush_dcache_range(unsigned long start, unsigned long end) -{ - flush_dcache_all(); -} - -void invalidate_dcache_range(unsigned long start, unsigned long end) -{ - flush_dcache_all(); -} - -void icache_enable(void) -{ -#if CONFIG_IS_ENABLED(RISCV_MMODE) - asm volatile("csrsi %0, 0x1" :: "i"(CSR_MCACHE_CTL)); -#endif -} - -void icache_disable(void) -{ -#if CONFIG_IS_ENABLED(RISCV_MMODE) - asm volatile("csrci %0, 0x1" :: "i"(CSR_MCACHE_CTL)); -#endif -} - -void dcache_enable(void) -{ -#if CONFIG_IS_ENABLED(RISCV_MMODE) - asm volatile("csrsi %0, 0x2" :: "i"(CSR_MCACHE_CTL)); -#endif - -#ifdef CONFIG_V5L2_CACHE - cache_ops(cache_enable); -#endif -} - -void dcache_disable(void) -{ -#if CONFIG_IS_ENABLED(RISCV_MMODE) - asm volatile("csrci %0, 0x2" :: "i"(CSR_MCACHE_CTL)); -#endif - -#ifdef CONFIG_V5L2_CACHE - cache_ops(cache_disable); -#endif -} - -int icache_status(void) -{ - int ret = 0; - -#if CONFIG_IS_ENABLED(RISCV_MMODE) - asm volatile ( - "csrr t1, %1\n\t" - "andi %0, t1, 0x01\n\t" - : "=r" (ret) - : "i"(CSR_MCACHE_CTL) - : "memory" - ); -#endif - - return !!ret; -} - -int dcache_status(void) -{ - int ret = 0; - -#if CONFIG_IS_ENABLED(RISCV_MMODE) - asm volatile ( - "csrr t1, %1\n\t" - "andi %0, t1, 0x02\n\t" - : "=r" (ret) - : "i" (CSR_MCACHE_CTL) - : "memory" - ); -#endif - - return !!ret; -} diff --git a/arch/riscv/cpu/ax25/cpu.c b/arch/riscv/cpu/ax25/cpu.c deleted file mode 100644 index 06e379bcb1..0000000000 --- a/arch/riscv/cpu/ax25/cpu.c +++ /dev/null @@ -1,50 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2023 Andes Technology Corporation - * Rick Chen, Andes Technology Corporation - */ - -/* CPU specific code */ -#include -#include -#include -#include -#include -#include - -/* - * cleanup_before_linux() is called just before we call linux - * it prepares the processor for linux - * - * we disable interrupt and caches. - */ -int cleanup_before_linux(void) -{ - disable_interrupts(); - - cache_flush(); - - return 0; -} - -void harts_early_init(void) -{ - /* Enable I/D-cache in SPL */ - if (CONFIG_IS_ENABLED(RISCV_MMODE)) { - unsigned long mcache_ctl_val = csr_read(CSR_MCACHE_CTL); - - mcache_ctl_val |= (MCACHE_CTL_DC_COHEN | MCACHE_CTL_IC_EN | - MCACHE_CTL_DC_EN | MCACHE_CTL_CCTL_SUEN); - - csr_write(CSR_MCACHE_CTL, mcache_ctl_val); - - /* - * Check mcache_ctl.DC_COHEN, we assume this platform does - * not support CM if the bit is hard-wired to 0. - */ - if (csr_read(CSR_MCACHE_CTL) & MCACHE_CTL_DC_COHEN) { - /* Wait for DC_COHSTA bit to be set */ - while (!(csr_read(CSR_MCACHE_CTL) & MCACHE_CTL_DC_COHSTA)); - } - } -} diff --git a/arch/riscv/cpu/ax25/spl.c b/arch/riscv/cpu/ax25/spl.c deleted file mode 100644 index 413849043b..0000000000 --- a/arch/riscv/cpu/ax25/spl.c +++ /dev/null @@ -1,27 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2023 Andes Technology Corporation - * Rick Chen, Andes Technology Corporation - */ -#include -#include -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -#if CONFIG_IS_ENABLED(RAM_SUPPORT) -struct legacy_img_hdr *spl_get_load_buffer(ssize_t offset, size_t size) -{ - return (void *)(CONFIG_SPL_LOAD_FIT_ADDRESS + offset); -} - -void *board_spl_fit_buffer_addr(ulong fit_size, int sectors, int bl_len) -{ - return spl_get_load_buffer(0, sectors * bl_len); -} -#endif diff --git a/arch/riscv/dts/Makefile b/arch/riscv/dts/Makefile index 5c15a0f303..c576c55767 100644 --- a/arch/riscv/dts/Makefile +++ b/arch/riscv/dts/Makefile @@ -1,6 +1,6 @@ # SPDX-License-Identifier: GPL-2.0+ -dtb-$(CONFIG_TARGET_AX25_AE350) += ae350_32.dtb ae350_64.dtb +dtb-$(CONFIG_TARGET_AE350) += ae350_32.dtb ae350_64.dtb dtb-$(CONFIG_TARGET_MICROCHIP_ICICLE) += microchip-mpfs-icicle-kit.dtb dtb-$(CONFIG_TARGET_QEMU_VIRT) += qemu-virt32.dtb qemu-virt64.dtb dtb-$(CONFIG_TARGET_OPENPITON_RISCV64) += openpiton-riscv64.dtb diff --git a/board/AndesTech/ae350/Kconfig b/board/AndesTech/ae350/Kconfig new file mode 100644 index 0000000000..75815bf99a --- /dev/null +++ b/board/AndesTech/ae350/Kconfig @@ -0,0 +1,44 @@ +if TARGET_AE350 + +config SYS_CPU + default "andesv5" + +config SYS_BOARD + default "ae350" + +config SYS_VENDOR + default "AndesTech" + +config SYS_SOC + default "ae350" + +config SYS_CONFIG_NAME + default "ae350" + +config ENV_SIZE + default 0x2000 if ENV_IS_IN_SPI_FLASH + +config ENV_OFFSET + default 0x140000 if ENV_IS_IN_SPI_FLASH + +config SPL_TEXT_BASE + default 0x800000 + +config SPL_OPENSBI_LOAD_ADDR + default 0x00000000 + +config SYS_FDT_BASE + hex + default 0x800f0000 if OF_SEPARATE + +config BOARD_SPECIFIC_OPTIONS # dummy + def_bool y + select RISCV_NDS + select SUPPORT_SPL + select BINMAN if SPL + imply SMP + imply SPL_RAM_SUPPORT + imply SPL_RAM_DEVICE + imply OF_HAS_PRIOR_STAGE + +endif diff --git a/board/AndesTech/ae350/MAINTAINERS b/board/AndesTech/ae350/MAINTAINERS new file mode 100644 index 0000000000..ead8e0e2af --- /dev/null +++ b/board/AndesTech/ae350/MAINTAINERS @@ -0,0 +1,13 @@ +AE350 BOARD +M: Rick Chen +S: Maintained +F: board/AndesTech/ae350/ +F: include/configs/ae350.h +F: configs/ae350_rv32_defconfig +F: configs/ae350_rv64_defconfig +F: configs/ae350_rv32_xip_defconfig +F: configs/ae350_rv64_xip_defconfig +F: configs/ae350_rv32_spl_defconfig +F: configs/ae350_rv64_spl_defconfig +F: configs/ae350_rv32_spl_xip_defconfig +F: configs/ae350_rv64_spl_xip_defconfig diff --git a/board/AndesTech/ae350/Makefile b/board/AndesTech/ae350/Makefile new file mode 100644 index 0000000000..705ae43af5 --- /dev/null +++ b/board/AndesTech/ae350/Makefile @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0+ +# +# Copyright (C) 2017 Andes Technology Corporation. +# Rick Chen, Andes Technology Corporation + +obj-y := ae350.o diff --git a/board/AndesTech/ae350/ae350.c b/board/AndesTech/ae350/ae350.c new file mode 100644 index 0000000000..1c2288b6ce --- /dev/null +++ b/board/AndesTech/ae350/ae350.c @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation + */ + +#include +#include +#include +#include +#include +#include +#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) +#include +#endif +#include +#include +#include +#include +#include +#include + +DECLARE_GLOBAL_DATA_PTR; + +/* + * Miscellaneous platform dependent initializations + */ + +int board_init(void) +{ + gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; + + return 0; +} + +int dram_init(void) +{ + return fdtdec_setup_mem_size_base(); +} + +int dram_init_banksize(void) +{ + return fdtdec_setup_memory_banksize(); +} + +#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) +int board_eth_init(struct bd_info *bd) +{ + return ftmac100_initialize(bd); +} +#endif + +ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) +{ + return 0; +} + +#define ANDES_HW_DTB_ADDRESS 0xF2000000 +void *board_fdt_blob_setup(int *err) +{ + *err = 0; + + if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) { + if (fdt_magic((uintptr_t)gd->arch.firmware_fdt_addr) == FDT_MAGIC) + return (void *)(ulong)gd->arch.firmware_fdt_addr; + } + + if (fdt_magic(CONFIG_SYS_FDT_BASE) == FDT_MAGIC) + return (void *)CONFIG_SYS_FDT_BASE; + return (void *)ANDES_HW_DTB_ADDRESS; + + *err = -EINVAL; + return NULL; +} + +#ifdef CONFIG_SPL_BOARD_INIT +void spl_board_init() +{ + /* enable v5l2 cache */ + enable_caches(); +} +#endif + +int smc_init(void) +{ + int node = -1; + const char *compat = "andestech,atfsmc020"; + void *blob = (void *)gd->fdt_blob; + fdt_addr_t addr; + struct ftsmc020_bank *regs; + + node = fdt_node_offset_by_compatible(blob, -1, compat); + if (node < 0) + return -FDT_ERR_NOTFOUND; + + addr = fdtdec_get_addr_size_auto_noparent(blob, node, + "reg", 0, NULL, false); + + if (addr == FDT_ADDR_T_NONE) + return -EINVAL; + + regs = (struct ftsmc020_bank *)(uintptr_t)addr; + regs->cr &= ~FTSMC020_BANK_WPROT; + + return 0; +} + +#ifdef CONFIG_BOARD_EARLY_INIT_F +int board_early_init_f(void) +{ + smc_init(); + + return 0; +} +#endif + +#ifdef CONFIG_SPL +void board_boot_order(u32 *spl_boot_list) +{ + u8 i; + u32 boot_devices[] = { +#ifdef CONFIG_SPL_RAM_SUPPORT + BOOT_DEVICE_RAM, +#endif +#ifdef CONFIG_SPL_MMC + BOOT_DEVICE_MMC1, +#endif + }; + + for (i = 0; i < ARRAY_SIZE(boot_devices); i++) + spl_boot_list[i] = boot_devices[i]; +} +#endif + +#ifdef CONFIG_SPL_LOAD_FIT +int board_fit_config_name_match(const char *name) +{ + /* boot using first FIT config */ + return 0; +} +#endif diff --git a/board/AndesTech/ax25-ae350/Kconfig b/board/AndesTech/ax25-ae350/Kconfig deleted file mode 100644 index 4bb33b0793..0000000000 --- a/board/AndesTech/ax25-ae350/Kconfig +++ /dev/null @@ -1,44 +0,0 @@ -if TARGET_AX25_AE350 - -config SYS_CPU - default "ax25" - -config SYS_BOARD - default "ax25-ae350" - -config SYS_VENDOR - default "AndesTech" - -config SYS_SOC - default "ae350" - -config SYS_CONFIG_NAME - default "ax25-ae350" - -config ENV_SIZE - default 0x2000 if ENV_IS_IN_SPI_FLASH - -config ENV_OFFSET - default 0x140000 if ENV_IS_IN_SPI_FLASH - -config SPL_TEXT_BASE - default 0x800000 - -config SPL_OPENSBI_LOAD_ADDR - default 0x00000000 - -config SYS_FDT_BASE - hex - default 0x800f0000 if OF_SEPARATE - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select RISCV_NDS - select SUPPORT_SPL - select BINMAN if SPL - imply SMP - imply SPL_RAM_SUPPORT - imply SPL_RAM_DEVICE - imply OF_HAS_PRIOR_STAGE - -endif diff --git a/board/AndesTech/ax25-ae350/MAINTAINERS b/board/AndesTech/ax25-ae350/MAINTAINERS deleted file mode 100644 index eebee167c3..0000000000 --- a/board/AndesTech/ax25-ae350/MAINTAINERS +++ /dev/null @@ -1,13 +0,0 @@ -AX25-AE350 BOARD -M: Rick Chen -S: Maintained -F: board/AndesTech/ax25-ae350/ -F: include/configs/ax25-ae350.h -F: configs/ae350_rv32_defconfig -F: configs/ae350_rv64_defconfig -F: configs/ae350_rv32_xip_defconfig -F: configs/ae350_rv64_xip_defconfig -F: configs/ae350_rv32_spl_defconfig -F: configs/ae350_rv64_spl_defconfig -F: configs/ae350_rv32_spl_xip_defconfig -F: configs/ae350_rv64_spl_xip_defconfig diff --git a/board/AndesTech/ax25-ae350/Makefile b/board/AndesTech/ax25-ae350/Makefile deleted file mode 100644 index 0e4ba8d702..0000000000 --- a/board/AndesTech/ax25-ae350/Makefile +++ /dev/null @@ -1,6 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# Copyright (C) 2017 Andes Technology Corporation. -# Rick Chen, Andes Technology Corporation - -obj-y := ax25-ae350.o diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c deleted file mode 100644 index 1c2288b6ce..0000000000 --- a/board/AndesTech/ax25-ae350/ax25-ae350.c +++ /dev/null @@ -1,141 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2017 Andes Technology Corporation - * Rick Chen, Andes Technology Corporation - */ - -#include -#include -#include -#include -#include -#include -#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) -#include -#endif -#include -#include -#include -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* - * Miscellaneous platform dependent initializations - */ - -int board_init(void) -{ - gd->bd->bi_boot_params = PHYS_SDRAM_0 + 0x400; - - return 0; -} - -int dram_init(void) -{ - return fdtdec_setup_mem_size_base(); -} - -int dram_init_banksize(void) -{ - return fdtdec_setup_memory_banksize(); -} - -#if defined(CONFIG_FTMAC100) && !defined(CONFIG_DM_ETH) -int board_eth_init(struct bd_info *bd) -{ - return ftmac100_initialize(bd); -} -#endif - -ulong board_flash_get_legacy(ulong base, int banknum, flash_info_t *info) -{ - return 0; -} - -#define ANDES_HW_DTB_ADDRESS 0xF2000000 -void *board_fdt_blob_setup(int *err) -{ - *err = 0; - - if (IS_ENABLED(CONFIG_OF_SEPARATE) || IS_ENABLED(CONFIG_OF_BOARD)) { - if (fdt_magic((uintptr_t)gd->arch.firmware_fdt_addr) == FDT_MAGIC) - return (void *)(ulong)gd->arch.firmware_fdt_addr; - } - - if (fdt_magic(CONFIG_SYS_FDT_BASE) == FDT_MAGIC) - return (void *)CONFIG_SYS_FDT_BASE; - return (void *)ANDES_HW_DTB_ADDRESS; - - *err = -EINVAL; - return NULL; -} - -#ifdef CONFIG_SPL_BOARD_INIT -void spl_board_init() -{ - /* enable v5l2 cache */ - enable_caches(); -} -#endif - -int smc_init(void) -{ - int node = -1; - const char *compat = "andestech,atfsmc020"; - void *blob = (void *)gd->fdt_blob; - fdt_addr_t addr; - struct ftsmc020_bank *regs; - - node = fdt_node_offset_by_compatible(blob, -1, compat); - if (node < 0) - return -FDT_ERR_NOTFOUND; - - addr = fdtdec_get_addr_size_auto_noparent(blob, node, - "reg", 0, NULL, false); - - if (addr == FDT_ADDR_T_NONE) - return -EINVAL; - - regs = (struct ftsmc020_bank *)(uintptr_t)addr; - regs->cr &= ~FTSMC020_BANK_WPROT; - - return 0; -} - -#ifdef CONFIG_BOARD_EARLY_INIT_F -int board_early_init_f(void) -{ - smc_init(); - - return 0; -} -#endif - -#ifdef CONFIG_SPL -void board_boot_order(u32 *spl_boot_list) -{ - u8 i; - u32 boot_devices[] = { -#ifdef CONFIG_SPL_RAM_SUPPORT - BOOT_DEVICE_RAM, -#endif -#ifdef CONFIG_SPL_MMC - BOOT_DEVICE_MMC1, -#endif - }; - - for (i = 0; i < ARRAY_SIZE(boot_devices); i++) - spl_boot_list[i] = boot_devices[i]; -} -#endif - -#ifdef CONFIG_SPL_LOAD_FIT -int board_fit_config_name_match(const char *name) -{ - /* boot using first FIT config */ - return 0; -} -#endif diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index fd1bf5fa4f..953cd0700b 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -6,7 +6,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_LOAD_ADDR=0x100000 -CONFIG_TARGET_AX25_AE350=y +CONFIG_TARGET_AE350=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe80 diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 4d3623a894..d61f7f5d1d 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -8,7 +8,7 @@ CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 -CONFIG_TARGET_AX25_AE350=y +CONFIG_TARGET_AE350=y CONFIG_RISCV_SMODE=y # CONFIG_AVAILABLE_HARTS is not set CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index a076b77834..e59ba0c38a 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -9,7 +9,7 @@ CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 -CONFIG_TARGET_AX25_AE350=y +CONFIG_TARGET_AE350=y CONFIG_RISCV_SMODE=y CONFIG_SPL_XIP=y CONFIG_DISTRO_DEFAULTS=y diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index da1bd2b10b..926632137d 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -6,7 +6,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_LOAD_ADDR=0x100000 -CONFIG_TARGET_AX25_AE350=y +CONFIG_TARGET_AE350=y CONFIG_XIP=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 959258176a..3c18562ad4 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -6,7 +6,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_LOAD_ADDR=0x100000 -CONFIG_TARGET_AX25_AE350=y +CONFIG_TARGET_AE350=y CONFIG_ARCH_RV64I=y CONFIG_DISTRO_DEFAULTS=y CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 0217027e6d..cb69514a7e 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -8,7 +8,7 @@ CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 -CONFIG_TARGET_AX25_AE350=y +CONFIG_TARGET_AE350=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y # CONFIG_AVAILABLE_HARTS is not set diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index 5a1fa8b6a1..e0773fa0aa 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -9,7 +9,7 @@ CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x100000 -CONFIG_TARGET_AX25_AE350=y +CONFIG_TARGET_AE350=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_SPL_XIP=y diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index c3fcbf3d28..0d467b9836 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -6,7 +6,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_LOAD_ADDR=0x100000 -CONFIG_TARGET_AX25_AE350=y +CONFIG_TARGET_AE350=y CONFIG_ARCH_RV64I=y CONFIG_XIP=y CONFIG_DISTRO_DEFAULTS=y diff --git a/doc/board/AndesTech/ae350.rst b/doc/board/AndesTech/ae350.rst new file mode 100644 index 0000000000..42a2b4d0b5 --- /dev/null +++ b/doc/board/AndesTech/ae350.rst @@ -0,0 +1,524 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +AE350 +====== + +AE350 is the mainline SoC produced by Andes Technology using AndesV5 CPU core +based on RISC-V architecture. + +AE350 has integrated both AHB and APB bus and many periphals for application +and product development. + +AndesV5 is Andes CPU IP family that adopts RISC-V architecture. + +AndesV5 family includes 25, 27, 45 series. + +25-Series Features +------------------ + +CPU Core + - 5-stage in-order execution pipeline + - Hardware Multiplier + - radix-2/radix-4/radix-16/radix-256/fast + - Hardware Divider + - Optional branch prediction + - Machine mode and optional user mode + - Optional performance monitoring + +ISA + - RV64I base integer instructions + - RVC for 16-bit compressed instructions + - RVM for multiplication and division instructions + +Memory subsystem + - I & D local memory + - Size: 4KB to 16MB + - Memory subsyetem soft-error protection + - Protection scheme: parity-checking or error-checking-and-correction (ECC) + - Automatic hardware error correction + +Bus + - Interface Protocol + - Synchronous AHB (32-bit/64-bit data-width), or + - Synchronous AXI4 (64-bit data-width) + +Power management + - Wait for interrupt (WFI) mode + +Debug + - Configurable number of breakpoints: 2/4/8 + - External Debug Module + - AHB slave port + - External JTAG debug transport module + +Platform Level Interrupt Controller (PLIC) + - AHB slave port + - Configurable number of interrupts: 1-1023 + - Configurable number of interrupt priorities: 3/7/15/63/127/255 + - Configurable number of targets: 1-16 + - Preempted interrupt priority stack + +Build and boot steps +-------------------- + +Build: + +1. Prepare the toolchains and make sure the $PATH to toolchains is correct. +2. Use `make ae350_rv[32|64]_defconfig` in u-boot root to build the image for + 32 or 64 bit. + +Verification: + +1. startup +2. relocation +3. timer driver +4. uart driver +5. mac driver +6. mmc driver +7. spi driver + +Steps +----- + +1. Ping a server by mac driver +2. Scan sd card and copy u-boot image which is booted from flash to ram by sd driver +3. Burn this u-boot image to spi rom by spi driver +4. Re-boot u-boot from spi flash with power off and power on + +Messages of U-Boot boot on AE350 board +-------------------------------------- + +.. code-block:: none + + U-Boot 2018.01-rc2-00033-g824f89a (Dec 21 2017 - 16:51:26 +0800) + + DRAM: 1 GiB + MMC: mmc@f0e00000: 0 + SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB + In: serial@f0300000 + Out: serial@f0300000 + Err: serial@f0300000 + Net: + Warning: mac@e0100000 (eth0) using random MAC address - be:dd:d7:e4:e8:10 + eth0: mac@e0100000 + + RISC-V # version + U-Boot 2018.01-rc2-00033-gb265b91-dirty (Dec 22 2017 - 13:54:21 +0800) + + riscv32-unknown-linux-gnu-gcc (GCC) 7.2.0 + GNU ld (GNU Binutils) 2.29 + + RISC-V # setenv ipaddr 10.0.4.200 ; + RISC-V # setenv serverip 10.0.4.97 ; + RISC-V # ping 10.0.4.97 ; + Using mac@e0100000 device + host 10.0.4.97 is alive + + RISC-V # mmc rescan + RISC-V # fatls mmc 0:1 + 318907 u-boot-ae350-64.bin + 1252 hello_world_ae350_32.bin + 328787 u-boot-ae350-32.bin + + 3 file(s), 0 dir(s) + + RISC-V # sf probe 0:0 50000000 0 + SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB + + RISC-V # sf test 0x100000 0x1000 + SPI flash test: + 0 erase: 36 ticks, 111 KiB/s 0.888 Mbps + 1 check: 29 ticks, 137 KiB/s 1.096 Mbps + 2 write: 40 ticks, 100 KiB/s 0.800 Mbps + 3 read: 20 ticks, 200 KiB/s 1.600 Mbps + Test passed + 0 erase: 36 ticks, 111 KiB/s 0.888 Mbps + 1 check: 29 ticks, 137 KiB/s 1.096 Mbps + 2 write: 40 ticks, 100 KiB/s 0.800 Mbps + 3 read: 20 ticks, 200 KiB/s 1.600 Mbps + + RISC-V # fatload mmc 0:1 0x600000 u-boot-ae350-32.bin + reading u-boot-ae350-32.bin + 328787 bytes read in 324 ms (990.2 KiB/s) + + RISC-V # sf erase 0x0 0x51000 + SF: 331776 bytes @ 0x0 Erased: OK + + RISC-V # sf write 0x600000 0x0 0x50453 + device 0 offset 0x0, size 0x50453 + SF: 328787 bytes @ 0x0 Written: OK + + RISC-V # crc32 0x600000 0x50453 + crc32 for 00600000 ... 00650452 ==> 692dc44a + + RISC-V # crc32 0x80000000 0x50453 + crc32 for 80000000 ... 80050452 ==> 692dc44a + RISC-V # + + *** power-off and power-on, this U-Boot is booted from spi flash *** + + U-Boot 2018.01-rc2-00032-gf67dd47-dirty (Dec 21 2017 - 13:56:03 +0800) + + DRAM: 1 GiB + MMC: mmc@f0e00000: 0 + SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB + In: serial@f0300000 + Out: serial@f0300000 + Err: serial@f0300000 + Net: + Warning: mac@e0100000 (eth0) using random MAC address - ee:4c:58:29:32:f5 + eth0: mac@e0100000 + RISC-V # + + +Boot bbl and riscv-linux via U-Boot on QEMU +------------------------------------------- + +1. Build riscv-linux +2. Build bbl and riscv-linux with --with-payload +3. Prepare ae350.dtb +4. Creating OS-kernel images + +.. code-block:: none + + ./mkimage -A riscv -O linux -T kernel -C none -a 0x0000 -e 0x0000 -d bbl.bin bootmImage-bbl.bin + Image Name: + Created: Tue Mar 13 10:06:42 2018 + Image Type: RISC-V Linux Kernel Image (uncompressed) + Data Size: 17901204 Bytes = 17481.64 KiB = 17.07 MiB + Load Address: 00000000 + Entry Point: 00000000 + +5. Copy bootmImage-bbl.bin and ae350.dtb to qemu sd card image +6. Message of booting riscv-linux from bbl via u-boot on qemu + +.. code-block:: none + + U-Boot 2018.03-rc4-00031-g2631273 (Mar 13 2018 - 15:02:55 +0800) + + DRAM: 1 GiB + main-loop: WARNING: I/O thread spun for 1000 iterations + MMC: mmc@f0e00000: 0 + Loading Environment from SPI Flash... *** Warning - spi_flash_probe_bus_cs() failed, using default environment + + Failed (-22) + In: serial@f0300000 + Out: serial@f0300000 + Err: serial@f0300000 + Net: + Warning: mac@e0100000 (eth0) using random MAC address - 02:00:00:00:00:00 + eth0: mac@e0100000 + RISC-V # mmc rescan + RISC-V # mmc part + + Partition Map for MMC device 0 -- Partition Type: DOS + + Part Start Sector Num Sectors UUID Type + RISC-V # fatls mmc 0:0 + 17901268 bootmImage-bbl.bin + 1954 ae2xx.dtb + + 2 file(s), 0 dir(s) + + RISC-V # fatload mmc 0:0 0x00600000 bootmImage-bbl.bin + 17901268 bytes read in 4642 ms (3.7 MiB/s) + RISC-V # fatload mmc 0:0 0x2000000 ae350.dtb + 1954 bytes read in 1 ms (1.9 MiB/s) + RISC-V # setenv bootm_size 0x2000000 + RISC-V # setenv fdt_high 0x1f00000 + RISC-V # bootm 0x00600000 - 0x2000000 + ## Booting kernel from Legacy Image at 00600000 ... + Image Name: + Image Type: RISC-V Linux Kernel Image (uncompressed) + Data Size: 17901204 Bytes = 17.1 MiB + Load Address: 00000000 + Entry Point: 00000000 + Verifying Checksum ... OK + ## Flattened Device Tree blob at 02000000 + Booting using the fdt blob at 0x2000000 + Loading Kernel Image ... OK + Loading Device Tree to 0000000001efc000, end 0000000001eff7a1 ... OK + [ 0.000000] OF: fdt: Ignoring memory range 0x0 - 0x200000 + [ 0.000000] Linux version 4.14.0-00046-gf3e439f-dirty (rick@atcsqa06) (gcc version 7.1.1 20170509 (GCC)) #1 Tue Jan 9 16:34:25 CST 2018 + [ 0.000000] bootconsole [early0] enabled + [ 0.000000] Initial ramdisk at: 0xffffffe000016a98 (12267008 bytes) + [ 0.000000] Zone ranges: + [ 0.000000] DMA [mem 0x0000000000200000-0x000000007fffffff] + [ 0.000000] Normal empty + [ 0.000000] Movable zone start for each node + [ 0.000000] Early memory node ranges + [ 0.000000] node 0: [mem 0x0000000000200000-0x000000007fffffff] + [ 0.000000] Initmem setup node 0 [mem 0x0000000000200000-0x000000007fffffff] + [ 0.000000] elf_hwcap is 0x112d + [ 0.000000] random: fast init done + [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 516615 + [ 0.000000] Kernel command line: console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7 + [ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes) + [ 0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes) + [ 0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes) + [ 0.000000] Sorting __ex_table... + [ 0.000000] Memory: 2047832K/2095104K available (1856K kernel code, 204K rwdata, 532K rodata, 12076K init, 756K bss, 47272K reserved, 0K cma-reserved) + [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 + [ 0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0 + [ 0.000000] riscv,cpu_intc,0: 64 local interrupts mapped + [ 0.000000] riscv,plic0,e4000000: mapped 31 interrupts to 1/2 handlers + [ 0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x24e6a1710, max_idle_ns: 440795202120 ns + [ 0.000000] Calibrating delay loop (skipped), value calculated using timer frequency.. 20.00 BogoMIPS (lpj=40000) + [ 0.000000] pid_max: default: 32768 minimum: 301 + [ 0.004000] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes) + [ 0.004000] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes) + [ 0.056000] devtmpfs: initialized + [ 0.060000] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns + [ 0.064000] futex hash table entries: 256 (order: 0, 6144 bytes) + [ 0.068000] NET: Registered protocol family 16 + [ 0.080000] vgaarb: loaded + [ 0.084000] clocksource: Switched to clocksource riscv_clocksource + [ 0.088000] NET: Registered protocol family 2 + [ 0.092000] TCP established hash table entries: 16384 (order: 5, 131072 bytes) + [ 0.096000] TCP bind hash table entries: 16384 (order: 5, 131072 bytes) + [ 0.096000] TCP: Hash tables configured (established 16384 bind 16384) + [ 0.100000] UDP hash table entries: 1024 (order: 3, 32768 bytes) + [ 0.100000] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes) + [ 0.104000] NET: Registered protocol family 1 + [ 0.616000] Unpacking initramfs... + [ 1.220000] workingset: timestamp_bits=62 max_order=19 bucket_order=0 + [ 1.244000] io scheduler noop registered + [ 1.244000] io scheduler cfq registered (default) + [ 1.244000] io scheduler mq-deadline registered + [ 1.248000] io scheduler kyber registered + [ 1.360000] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled + [ 1.368000] console [ttyS0] disabled + [ 1.372000] f0300000.serial: ttyS0 at MMIO 0xf0300020 (irq = 10, base_baud = 1228800) is a 16550A + [ 1.392000] console [ttyS0] enabled + [ 1.392000] ftmac100: Loading version 0.2 ... + [ 1.396000] ftmac100 e0100000.mac eth0: irq 8, mapped at ffffffd002005000 + [ 1.400000] ftmac100 e0100000.mac eth0: generated random MAC address 6e:ac:c3:92:36:c0 + [ 1.404000] IR NEC protocol handler initialized + [ 1.404000] IR RC5(x/sz) protocol handler initialized + [ 1.404000] IR RC6 protocol handler initialized + [ 1.404000] IR JVC protocol handler initialized + [ 1.408000] IR Sony protocol handler initialized + [ 1.408000] IR SANYO protocol handler initialized + [ 1.408000] IR Sharp protocol handler initialized + [ 1.408000] IR MCE Keyboard/mouse protocol handler initialized + [ 1.412000] IR XMP protocol handler initialized + [ 1.456000] ftsdc010 f0e00000.mmc: mmc0 - using hw SDIO IRQ + [ 1.464000] bootconsole [early0] uses init memory and must be disabled even before the real one is ready + [ 1.464000] bootconsole [early0] disabled + [ 1.508000] Freeing unused kernel memory: 12076K + [ 1.512000] This architecture does not have kernel memory protection. + [ 1.520000] mmc0: new SD card at address 4567 + [ 1.524000] mmcblk0: mmc0:4567 QEMU! 20.0 MiB + [ 1.844000] mmcblk0: + Wed Dec 1 10:00:00 CST 2010 + / # + + +Running U-Boot SPL +------------------ +The U-Boot SPL will boot in M mode and load the FIT image which include +OpenSBI and U-Boot proper images. After loading progress, it will jump +to OpenSBI first and then U-Boot proper which will run in S mode. + + +How to build U-Boot SPL +----------------------- +Before building U-Boot SPL, OpenSBI must be build first. OpenSBI can be +cloned and build for AE350 as below: + +.. code-block:: none + + git clone https://github.com/riscv/opensbi.git + cd opensbi + make PLATFORM=andes/ae350 + +Copy OpenSBI FW_DYNAMIC image (build/platform/andes/ae350/firmware/fw_dynamic.bin) +into U-Boot root directory + + +How to build U-Boot SPL booting from RAM +---------------------------------------- +With ae350_rv[32|64]_spl_defconfigs: + +U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode +and then load FIT image from RAM device on AE350. + + +How to build U-Boot SPL booting from ROM +---------------------------------------- +With ae350_rv[32|64]_spl_xip_defconfigs: + +U-Boot SPL can be burned into SPI flash and run in flash in machine mode +and then load FIT image from SPI flash or MMC device on AE350. + + +Messages of U-Boot SPL boots Kernel on AE350 board +-------------------------------------------------- + +.. code-block:: none + + U-Boot SPL 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800) + Trying to boot from RAM + + OpenSBI v0.5-1-gdd8ef28 (Nov 14 2019 11:08:39) + ____ _____ ____ _____ + / __ \ / ____| _ \_ _| + | | | |_ __ ___ _ __ | (___ | |_) || | + | | | | '_ \ / _ \ '_ \ \___ \| _ < | | + | |__| | |_) | __/ | | |____) | |_) || |_ + \____/| .__/ \___|_| |_|_____/|____/_____| + | | + |_| + + Platform Name : Andes AE350 + Platform HART Features : RV64ACIMSUX + Platform Max HARTs : 4 + Current Hart : 0 + Firmware Base : 0x0 + Firmware Size : 84 KB + Runtime SBI Version : 0.2 + + PMP0: 0x0000000000000000-0x000000000001ffff (A) + PMP1: 0x0000000000000000-0x00000001ffffffff (A,R,W,X) + + + U-Boot 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800) + + DRAM: 1 GiB + Flash: 64 MiB + MMC: mmc@f0e00000: 0 + Loading Environment from SPI Flash... SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB + OK + In: serial@f0300000 + Out: serial@f0300000 + Err: serial@f0300000 + Net: no alias for ethernet0 + + Warning: mac@e0100000 (eth0) using random MAC address - a2:ae:93:7b:cc:8f + eth0: mac@e0100000 + Hit any key to stop autoboot: 0 + 6455 bytes read in 31 ms (203.1 KiB/s) + 20421684 bytes read in 8647 ms (2.3 MiB/s) + ## Booting kernel from Legacy Image at 00600000 ... + Image Name: + Image Type: RISC-V Linux Kernel Image (uncompressed) + Data Size: 20421620 Bytes = 19.5 MiB + Load Address: 00200000 + Entry Point: 00200000 + Verifying Checksum ... OK + ## Flattened Device Tree blob at 20000000 + Booting using the fdt blob at 0x20000000 + Loading Kernel Image + Loading Device Tree to 000000001effb000, end 000000001efff936 ... OK + + Starting kernel ... + + OF: fdt: Ignoring memory range 0x0 - 0x200000 + Linux version 4.17.0-00253-g49136e10bcb2 (sqa@atcsqa07) (gcc version 7.3.0 (2019-04-06_nds64le-linux-glibc-v5_experimental)) #1 SMP PREEMPT Sat Apr 6 23:41:49 CST 2019 + bootconsole [early0] enabled + Initial ramdisk at: 0x (ptrval) (13665712 bytes) + Zone ranges: + DMA32 [mem 0x0000000000200000-0x000000003fffffff] + Normal empty + Movable zone start for each node + Early memory node ranges + node 0: [mem 0x0000000000200000-0x000000003fffffff] + Initmem setup node 0 [mem 0x0000000000200000-0x000000003fffffff] + software IO TLB [mem 0x3b1f8000-0x3f1f8000] (64MB) mapped at [ (ptrval)- (ptrval)] + elf_platform is rv64i2p0m2p0a2p0c2p0xv5-0p0 + compatible privileged spec version 1.10 + percpu: Embedded 16 pages/cpu @ (ptrval) s28184 r8192 d29160 u65536 + Built 1 zonelists, mobility grouping on. Total pages: 258055 + Kernel command line: console=ttyS0,38400n8 debug loglevel=7 + log_buf_len individual max cpu contribution: 4096 bytes + log_buf_len total cpu_extra contributions: 12288 bytes + log_buf_len min size: 16384 bytes + log_buf_len: 32768 bytes + early log buf free: 14608(89%) + Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes) + Inode-cache hash table entries: 65536 (order: 7, 524288 bytes) + Sorting __ex_table... + Memory: 944428K/1046528K available (3979K kernel code, 246K rwdata, 1490K rodata, 13523K init, 688K bss, 102100K reserved, 0K cma-reserved) + SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 + Preemptible hierarchical RCU implementation. + Tasks RCU enabled. + NR_IRQS: 72, nr_irqs: 72, preallocated irqs: 0 + riscv,cpu_intc,0: 64 local interrupts mapped + riscv,cpu_intc,1: 64 local interrupts mapped + riscv,cpu_intc,2: 64 local interrupts mapped + riscv,cpu_intc,3: 64 local interrupts mapped + riscv,plic0,e4000000: mapped 71 interrupts to 8/8 handlers + clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1bacf917bf, max_idle_ns: 881590412290 ns + sched_clock: 64 bits at 60MHz, resolution 16ns, wraps every 4398046511098ns + Console: colour dummy device 40x30 + Calibrating delay loop (skipped), value calculated using timer frequency.. 120.00 BogoMIPS (lpj=600000) + pid_max: default: 32768 minimum: 301 + Mount-cache hash table entries: 2048 (order: 2, 16384 bytes) + Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes) + Hierarchical SRCU implementation. + smp: Bringing up secondary CPUs ... + CPU0: online + CPU2: online + CPU3: online + smp: Brought up 1 node, 4 CPUs + devtmpfs: initialized + random: get_random_u32 called from bucket_table_alloc+0x198/0x1d8 with crng_init=0 + clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns + futex hash table entries: 1024 (order: 4, 65536 bytes) + NET: Registered protocol family 16 + Advanced Linux Sound Architecture Driver Initialized. + clocksource: Switched to clocksource riscv_clocksource + NET: Registered protocol family 2 + tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes) + TCP established hash table entries: 8192 (order: 4, 65536 bytes) + TCP bind hash table entries: 8192 (order: 5, 131072 bytes) + TCP: Hash tables configured (established 8192 bind 8192) + UDP hash table entries: 512 (order: 2, 16384 bytes) + UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) + NET: Registered protocol family 1 + RPC: Registered named UNIX socket transport module. + RPC: Registered udp transport module. + RPC: Registered tcp transport module. + RPC: Registered tcp NFSv4.1 backchannel transport module. + Unpacking initramfs... + workingset: timestamp_bits=62 max_order=18 bucket_order=0 + NFS: Registering the id_resolver key type + Key type id_resolver registered + Key type id_legacy registered + nfs4filelayout_init: NFSv4 File Layout Driver Registering... + io scheduler noop registered + io scheduler cfq registered (default) + io scheduler mq-deadline registered + io scheduler kyber registered + Console: switching to colour frame buffer device 40x30 + Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled + console [ttyS0] disabled + f0300000.serial: ttyS0 at MMIO 0xf0300020 (irq = 20, base_baud = 1228800) is a 16550A + console [ttyS0] enabled + console [ttyS0] enabled + bootconsole [early0] disabled + bootconsole [early0] disabled + loop: module loaded + tun: Universal TUN/TAP device driver, 1.6 + ftmac100: Loading version 0.2 ... + ftmac100 e0100000.mac eth0: irq 21, mapped at (ptrval) + ftmac100 e0100000.mac eth0: generated random MAC address 4e:fd:bd:f3:04:fc + ftsdc010 f0e00000.mmc: mmc0 - using hw SDIO IRQ + mmc0: new SDHC card at address d555 + ftssp010 card registered! + mmcblk0: mmc0:d555 SD04G 3.79 GiB + NET: Registered protocol family 10 + mmcblk0: p1 + Segment Routing with IPv6 + sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver + NET: Registered protocol family 17 + NET: Registered protocol family 15 + ALSA device list: + #0: ftssp_ac97 controller + Freeing unused kernel memory: 13520K + This architecture does not have kernel memory protection. + Sysinit starting + Sat Apr 6 23:33:53 CST 2019 + nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... + + ~ # diff --git a/doc/board/AndesTech/ax25-ae350.rst b/doc/board/AndesTech/ax25-ae350.rst deleted file mode 100644 index b46f427f4b..0000000000 --- a/doc/board/AndesTech/ax25-ae350.rst +++ /dev/null @@ -1,524 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0+ - -AX25-AE350 -========== - -AE350 is the mainline SoC produced by Andes Technology using AX25 CPU core -base on RISC-V architecture. - -AE350 has integrated both AHB and APB bus and many periphals for application -and product development. - -AX25-AE350 is the SoC with AE350 hardcore CPU. - -AX25 is Andes CPU IP to adopt RISC-V architecture. - -AX25 Features -------------- - -CPU Core - - 5-stage in-order execution pipeline - - Hardware Multiplier - - radix-2/radix-4/radix-16/radix-256/fast - - Hardware Divider - - Optional branch prediction - - Machine mode and optional user mode - - Optional performance monitoring - -ISA - - RV64I base integer instructions - - RVC for 16-bit compressed instructions - - RVM for multiplication and division instructions - -Memory subsystem - - I & D local memory - - Size: 4KB to 16MB - - Memory subsyetem soft-error protection - - Protection scheme: parity-checking or error-checking-and-correction (ECC) - - Automatic hardware error correction - -Bus - - Interface Protocol - - Synchronous AHB (32-bit/64-bit data-width), or - - Synchronous AXI4 (64-bit data-width) - -Power management - - Wait for interrupt (WFI) mode - -Debug - - Configurable number of breakpoints: 2/4/8 - - External Debug Module - - AHB slave port - - External JTAG debug transport module - -Platform Level Interrupt Controller (PLIC) - - AHB slave port - - Configurable number of interrupts: 1-1023 - - Configurable number of interrupt priorities: 3/7/15/63/127/255 - - Configurable number of targets: 1-16 - - Preempted interrupt priority stack - -Build and boot steps --------------------- - -Build: - -1. Prepare the toolchains and make sure the $PATH to toolchains is correct. -2. Use `make ae350_rv[32|64]_defconfig` in u-boot root to build the image for - 32 or 64 bit. - -Verification: - -1. startup -2. relocation -3. timer driver -4. uart driver -5. mac driver -6. mmc driver -7. spi driver - -Steps ------ - -1. Ping a server by mac driver -2. Scan sd card and copy u-boot image which is booted from flash to ram by sd driver -3. Burn this u-boot image to spi rom by spi driver -4. Re-boot u-boot from spi flash with power off and power on - -Messages of U-Boot boot on AE350 board --------------------------------------- - -.. code-block:: none - - U-Boot 2018.01-rc2-00033-g824f89a (Dec 21 2017 - 16:51:26 +0800) - - DRAM: 1 GiB - MMC: mmc@f0e00000: 0 - SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB - In: serial@f0300000 - Out: serial@f0300000 - Err: serial@f0300000 - Net: - Warning: mac@e0100000 (eth0) using random MAC address - be:dd:d7:e4:e8:10 - eth0: mac@e0100000 - - RISC-V # version - U-Boot 2018.01-rc2-00033-gb265b91-dirty (Dec 22 2017 - 13:54:21 +0800) - - riscv32-unknown-linux-gnu-gcc (GCC) 7.2.0 - GNU ld (GNU Binutils) 2.29 - - RISC-V # setenv ipaddr 10.0.4.200 ; - RISC-V # setenv serverip 10.0.4.97 ; - RISC-V # ping 10.0.4.97 ; - Using mac@e0100000 device - host 10.0.4.97 is alive - - RISC-V # mmc rescan - RISC-V # fatls mmc 0:1 - 318907 u-boot-ae350-64.bin - 1252 hello_world_ae350_32.bin - 328787 u-boot-ae350-32.bin - - 3 file(s), 0 dir(s) - - RISC-V # sf probe 0:0 50000000 0 - SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB - - RISC-V # sf test 0x100000 0x1000 - SPI flash test: - 0 erase: 36 ticks, 111 KiB/s 0.888 Mbps - 1 check: 29 ticks, 137 KiB/s 1.096 Mbps - 2 write: 40 ticks, 100 KiB/s 0.800 Mbps - 3 read: 20 ticks, 200 KiB/s 1.600 Mbps - Test passed - 0 erase: 36 ticks, 111 KiB/s 0.888 Mbps - 1 check: 29 ticks, 137 KiB/s 1.096 Mbps - 2 write: 40 ticks, 100 KiB/s 0.800 Mbps - 3 read: 20 ticks, 200 KiB/s 1.600 Mbps - - RISC-V # fatload mmc 0:1 0x600000 u-boot-ae350-32.bin - reading u-boot-ae350-32.bin - 328787 bytes read in 324 ms (990.2 KiB/s) - - RISC-V # sf erase 0x0 0x51000 - SF: 331776 bytes @ 0x0 Erased: OK - - RISC-V # sf write 0x600000 0x0 0x50453 - device 0 offset 0x0, size 0x50453 - SF: 328787 bytes @ 0x0 Written: OK - - RISC-V # crc32 0x600000 0x50453 - crc32 for 00600000 ... 00650452 ==> 692dc44a - - RISC-V # crc32 0x80000000 0x50453 - crc32 for 80000000 ... 80050452 ==> 692dc44a - RISC-V # - - *** power-off and power-on, this U-Boot is booted from spi flash *** - - U-Boot 2018.01-rc2-00032-gf67dd47-dirty (Dec 21 2017 - 13:56:03 +0800) - - DRAM: 1 GiB - MMC: mmc@f0e00000: 0 - SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB - In: serial@f0300000 - Out: serial@f0300000 - Err: serial@f0300000 - Net: - Warning: mac@e0100000 (eth0) using random MAC address - ee:4c:58:29:32:f5 - eth0: mac@e0100000 - RISC-V # - - -Boot bbl and riscv-linux via U-Boot on QEMU -------------------------------------------- - -1. Build riscv-linux -2. Build bbl and riscv-linux with --with-payload -3. Prepare ae350.dtb -4. Creating OS-kernel images - -.. code-block:: none - - ./mkimage -A riscv -O linux -T kernel -C none -a 0x0000 -e 0x0000 -d bbl.bin bootmImage-bbl.bin - Image Name: - Created: Tue Mar 13 10:06:42 2018 - Image Type: RISC-V Linux Kernel Image (uncompressed) - Data Size: 17901204 Bytes = 17481.64 KiB = 17.07 MiB - Load Address: 00000000 - Entry Point: 00000000 - -5. Copy bootmImage-bbl.bin and ae350.dtb to qemu sd card image -6. Message of booting riscv-linux from bbl via u-boot on qemu - -.. code-block:: none - - U-Boot 2018.03-rc4-00031-g2631273 (Mar 13 2018 - 15:02:55 +0800) - - DRAM: 1 GiB - main-loop: WARNING: I/O thread spun for 1000 iterations - MMC: mmc@f0e00000: 0 - Loading Environment from SPI Flash... *** Warning - spi_flash_probe_bus_cs() failed, using default environment - - Failed (-22) - In: serial@f0300000 - Out: serial@f0300000 - Err: serial@f0300000 - Net: - Warning: mac@e0100000 (eth0) using random MAC address - 02:00:00:00:00:00 - eth0: mac@e0100000 - RISC-V # mmc rescan - RISC-V # mmc part - - Partition Map for MMC device 0 -- Partition Type: DOS - - Part Start Sector Num Sectors UUID Type - RISC-V # fatls mmc 0:0 - 17901268 bootmImage-bbl.bin - 1954 ae2xx.dtb - - 2 file(s), 0 dir(s) - - RISC-V # fatload mmc 0:0 0x00600000 bootmImage-bbl.bin - 17901268 bytes read in 4642 ms (3.7 MiB/s) - RISC-V # fatload mmc 0:0 0x2000000 ae350.dtb - 1954 bytes read in 1 ms (1.9 MiB/s) - RISC-V # setenv bootm_size 0x2000000 - RISC-V # setenv fdt_high 0x1f00000 - RISC-V # bootm 0x00600000 - 0x2000000 - ## Booting kernel from Legacy Image at 00600000 ... - Image Name: - Image Type: RISC-V Linux Kernel Image (uncompressed) - Data Size: 17901204 Bytes = 17.1 MiB - Load Address: 00000000 - Entry Point: 00000000 - Verifying Checksum ... OK - ## Flattened Device Tree blob at 02000000 - Booting using the fdt blob at 0x2000000 - Loading Kernel Image ... OK - Loading Device Tree to 0000000001efc000, end 0000000001eff7a1 ... OK - [ 0.000000] OF: fdt: Ignoring memory range 0x0 - 0x200000 - [ 0.000000] Linux version 4.14.0-00046-gf3e439f-dirty (rick@atcsqa06) (gcc version 7.1.1 20170509 (GCC)) #1 Tue Jan 9 16:34:25 CST 2018 - [ 0.000000] bootconsole [early0] enabled - [ 0.000000] Initial ramdisk at: 0xffffffe000016a98 (12267008 bytes) - [ 0.000000] Zone ranges: - [ 0.000000] DMA [mem 0x0000000000200000-0x000000007fffffff] - [ 0.000000] Normal empty - [ 0.000000] Movable zone start for each node - [ 0.000000] Early memory node ranges - [ 0.000000] node 0: [mem 0x0000000000200000-0x000000007fffffff] - [ 0.000000] Initmem setup node 0 [mem 0x0000000000200000-0x000000007fffffff] - [ 0.000000] elf_hwcap is 0x112d - [ 0.000000] random: fast init done - [ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 516615 - [ 0.000000] Kernel command line: console=ttyS0,38400n8 earlyprintk=uart8250-32bit,0xf0300000 debug loglevel=7 - [ 0.000000] PID hash table entries: 4096 (order: 3, 32768 bytes) - [ 0.000000] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes) - [ 0.000000] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes) - [ 0.000000] Sorting __ex_table... - [ 0.000000] Memory: 2047832K/2095104K available (1856K kernel code, 204K rwdata, 532K rodata, 12076K init, 756K bss, 47272K reserved, 0K cma-reserved) - [ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=1, Nodes=1 - [ 0.000000] NR_IRQS: 0, nr_irqs: 0, preallocated irqs: 0 - [ 0.000000] riscv,cpu_intc,0: 64 local interrupts mapped - [ 0.000000] riscv,plic0,e4000000: mapped 31 interrupts to 1/2 handlers - [ 0.000000] clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x24e6a1710, max_idle_ns: 440795202120 ns - [ 0.000000] Calibrating delay loop (skipped), value calculated using timer frequency.. 20.00 BogoMIPS (lpj=40000) - [ 0.000000] pid_max: default: 32768 minimum: 301 - [ 0.004000] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes) - [ 0.004000] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes) - [ 0.056000] devtmpfs: initialized - [ 0.060000] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns - [ 0.064000] futex hash table entries: 256 (order: 0, 6144 bytes) - [ 0.068000] NET: Registered protocol family 16 - [ 0.080000] vgaarb: loaded - [ 0.084000] clocksource: Switched to clocksource riscv_clocksource - [ 0.088000] NET: Registered protocol family 2 - [ 0.092000] TCP established hash table entries: 16384 (order: 5, 131072 bytes) - [ 0.096000] TCP bind hash table entries: 16384 (order: 5, 131072 bytes) - [ 0.096000] TCP: Hash tables configured (established 16384 bind 16384) - [ 0.100000] UDP hash table entries: 1024 (order: 3, 32768 bytes) - [ 0.100000] UDP-Lite hash table entries: 1024 (order: 3, 32768 bytes) - [ 0.104000] NET: Registered protocol family 1 - [ 0.616000] Unpacking initramfs... - [ 1.220000] workingset: timestamp_bits=62 max_order=19 bucket_order=0 - [ 1.244000] io scheduler noop registered - [ 1.244000] io scheduler cfq registered (default) - [ 1.244000] io scheduler mq-deadline registered - [ 1.248000] io scheduler kyber registered - [ 1.360000] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled - [ 1.368000] console [ttyS0] disabled - [ 1.372000] f0300000.serial: ttyS0 at MMIO 0xf0300020 (irq = 10, base_baud = 1228800) is a 16550A - [ 1.392000] console [ttyS0] enabled - [ 1.392000] ftmac100: Loading version 0.2 ... - [ 1.396000] ftmac100 e0100000.mac eth0: irq 8, mapped at ffffffd002005000 - [ 1.400000] ftmac100 e0100000.mac eth0: generated random MAC address 6e:ac:c3:92:36:c0 - [ 1.404000] IR NEC protocol handler initialized - [ 1.404000] IR RC5(x/sz) protocol handler initialized - [ 1.404000] IR RC6 protocol handler initialized - [ 1.404000] IR JVC protocol handler initialized - [ 1.408000] IR Sony protocol handler initialized - [ 1.408000] IR SANYO protocol handler initialized - [ 1.408000] IR Sharp protocol handler initialized - [ 1.408000] IR MCE Keyboard/mouse protocol handler initialized - [ 1.412000] IR XMP protocol handler initialized - [ 1.456000] ftsdc010 f0e00000.mmc: mmc0 - using hw SDIO IRQ - [ 1.464000] bootconsole [early0] uses init memory and must be disabled even before the real one is ready - [ 1.464000] bootconsole [early0] disabled - [ 1.508000] Freeing unused kernel memory: 12076K - [ 1.512000] This architecture does not have kernel memory protection. - [ 1.520000] mmc0: new SD card at address 4567 - [ 1.524000] mmcblk0: mmc0:4567 QEMU! 20.0 MiB - [ 1.844000] mmcblk0: - Wed Dec 1 10:00:00 CST 2010 - / # - - -Running U-Boot SPL ------------------- -The U-Boot SPL will boot in M mode and load the FIT image which include -OpenSBI and U-Boot proper images. After loading progress, it will jump -to OpenSBI first and then U-Boot proper which will run in S mode. - - -How to build U-Boot SPL ------------------------ -Before building U-Boot SPL, OpenSBI must be build first. OpenSBI can be -cloned and build for AE350 as below: - -.. code-block:: none - - git clone https://github.com/riscv/opensbi.git - cd opensbi - make PLATFORM=andes/ae350 - -Copy OpenSBI FW_DYNAMIC image (build/platform/andes/ae350/firmware/fw_dynamic.bin) -into U-Boot root directory - - -How to build U-Boot SPL booting from RAM ----------------------------------------- -With ae350_rv[32|64]_spl_defconfigs: - -U-Boot SPL will be loaded by gdb or FSBL and runs in RAM in machine mode -and then load FIT image from RAM device on AE350. - - -How to build U-Boot SPL booting from ROM ----------------------------------------- -With ae350_rv[32|64]_spl_xip_defconfigs: - -U-Boot SPL can be burned into SPI flash and run in flash in machine mode -and then load FIT image from SPI flash or MMC device on AE350. - - -Messages of U-Boot SPL boots Kernel on AE350 board --------------------------------------------------- - -.. code-block:: none - - U-Boot SPL 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800) - Trying to boot from RAM - - OpenSBI v0.5-1-gdd8ef28 (Nov 14 2019 11:08:39) - ____ _____ ____ _____ - / __ \ / ____| _ \_ _| - | | | |_ __ ___ _ __ | (___ | |_) || | - | | | | '_ \ / _ \ '_ \ \___ \| _ < | | - | |__| | |_) | __/ | | |____) | |_) || |_ - \____/| .__/ \___|_| |_|_____/|____/_____| - | | - |_| - - Platform Name : Andes AE350 - Platform HART Features : RV64ACIMSUX - Platform Max HARTs : 4 - Current Hart : 0 - Firmware Base : 0x0 - Firmware Size : 84 KB - Runtime SBI Version : 0.2 - - PMP0: 0x0000000000000000-0x000000000001ffff (A) - PMP1: 0x0000000000000000-0x00000001ffffffff (A,R,W,X) - - - U-Boot 2020.01-rc1-00292-g67a3313-dirty (Nov 14 2019 - 11:26:21 +0800) - - DRAM: 1 GiB - Flash: 64 MiB - MMC: mmc@f0e00000: 0 - Loading Environment from SPI Flash... SF: Detected mx25u1635e with page size 256 Bytes, erase size 4 KiB, total 2 MiB - OK - In: serial@f0300000 - Out: serial@f0300000 - Err: serial@f0300000 - Net: no alias for ethernet0 - - Warning: mac@e0100000 (eth0) using random MAC address - a2:ae:93:7b:cc:8f - eth0: mac@e0100000 - Hit any key to stop autoboot: 0 - 6455 bytes read in 31 ms (203.1 KiB/s) - 20421684 bytes read in 8647 ms (2.3 MiB/s) - ## Booting kernel from Legacy Image at 00600000 ... - Image Name: - Image Type: RISC-V Linux Kernel Image (uncompressed) - Data Size: 20421620 Bytes = 19.5 MiB - Load Address: 00200000 - Entry Point: 00200000 - Verifying Checksum ... OK - ## Flattened Device Tree blob at 20000000 - Booting using the fdt blob at 0x20000000 - Loading Kernel Image - Loading Device Tree to 000000001effb000, end 000000001efff936 ... OK - - Starting kernel ... - - OF: fdt: Ignoring memory range 0x0 - 0x200000 - Linux version 4.17.0-00253-g49136e10bcb2 (sqa@atcsqa07) (gcc version 7.3.0 (2019-04-06_nds64le-linux-glibc-v5_experimental)) #1 SMP PREEMPT Sat Apr 6 23:41:49 CST 2019 - bootconsole [early0] enabled - Initial ramdisk at: 0x (ptrval) (13665712 bytes) - Zone ranges: - DMA32 [mem 0x0000000000200000-0x000000003fffffff] - Normal empty - Movable zone start for each node - Early memory node ranges - node 0: [mem 0x0000000000200000-0x000000003fffffff] - Initmem setup node 0 [mem 0x0000000000200000-0x000000003fffffff] - software IO TLB [mem 0x3b1f8000-0x3f1f8000] (64MB) mapped at [ (ptrval)- (ptrval)] - elf_platform is rv64i2p0m2p0a2p0c2p0xv5-0p0 - compatible privileged spec version 1.10 - percpu: Embedded 16 pages/cpu @ (ptrval) s28184 r8192 d29160 u65536 - Built 1 zonelists, mobility grouping on. Total pages: 258055 - Kernel command line: console=ttyS0,38400n8 debug loglevel=7 - log_buf_len individual max cpu contribution: 4096 bytes - log_buf_len total cpu_extra contributions: 12288 bytes - log_buf_len min size: 16384 bytes - log_buf_len: 32768 bytes - early log buf free: 14608(89%) - Dentry cache hash table entries: 131072 (order: 8, 1048576 bytes) - Inode-cache hash table entries: 65536 (order: 7, 524288 bytes) - Sorting __ex_table... - Memory: 944428K/1046528K available (3979K kernel code, 246K rwdata, 1490K rodata, 13523K init, 688K bss, 102100K reserved, 0K cma-reserved) - SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1 - Preemptible hierarchical RCU implementation. - Tasks RCU enabled. - NR_IRQS: 72, nr_irqs: 72, preallocated irqs: 0 - riscv,cpu_intc,0: 64 local interrupts mapped - riscv,cpu_intc,1: 64 local interrupts mapped - riscv,cpu_intc,2: 64 local interrupts mapped - riscv,cpu_intc,3: 64 local interrupts mapped - riscv,plic0,e4000000: mapped 71 interrupts to 8/8 handlers - clocksource: riscv_clocksource: mask: 0xffffffffffffffff max_cycles: 0x1bacf917bf, max_idle_ns: 881590412290 ns - sched_clock: 64 bits at 60MHz, resolution 16ns, wraps every 4398046511098ns - Console: colour dummy device 40x30 - Calibrating delay loop (skipped), value calculated using timer frequency.. 120.00 BogoMIPS (lpj=600000) - pid_max: default: 32768 minimum: 301 - Mount-cache hash table entries: 2048 (order: 2, 16384 bytes) - Mountpoint-cache hash table entries: 2048 (order: 2, 16384 bytes) - Hierarchical SRCU implementation. - smp: Bringing up secondary CPUs ... - CPU0: online - CPU2: online - CPU3: online - smp: Brought up 1 node, 4 CPUs - devtmpfs: initialized - random: get_random_u32 called from bucket_table_alloc+0x198/0x1d8 with crng_init=0 - clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns - futex hash table entries: 1024 (order: 4, 65536 bytes) - NET: Registered protocol family 16 - Advanced Linux Sound Architecture Driver Initialized. - clocksource: Switched to clocksource riscv_clocksource - NET: Registered protocol family 2 - tcp_listen_portaddr_hash hash table entries: 512 (order: 1, 8192 bytes) - TCP established hash table entries: 8192 (order: 4, 65536 bytes) - TCP bind hash table entries: 8192 (order: 5, 131072 bytes) - TCP: Hash tables configured (established 8192 bind 8192) - UDP hash table entries: 512 (order: 2, 16384 bytes) - UDP-Lite hash table entries: 512 (order: 2, 16384 bytes) - NET: Registered protocol family 1 - RPC: Registered named UNIX socket transport module. - RPC: Registered udp transport module. - RPC: Registered tcp transport module. - RPC: Registered tcp NFSv4.1 backchannel transport module. - Unpacking initramfs... - workingset: timestamp_bits=62 max_order=18 bucket_order=0 - NFS: Registering the id_resolver key type - Key type id_resolver registered - Key type id_legacy registered - nfs4filelayout_init: NFSv4 File Layout Driver Registering... - io scheduler noop registered - io scheduler cfq registered (default) - io scheduler mq-deadline registered - io scheduler kyber registered - Console: switching to colour frame buffer device 40x30 - Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled - console [ttyS0] disabled - f0300000.serial: ttyS0 at MMIO 0xf0300020 (irq = 20, base_baud = 1228800) is a 16550A - console [ttyS0] enabled - console [ttyS0] enabled - bootconsole [early0] disabled - bootconsole [early0] disabled - loop: module loaded - tun: Universal TUN/TAP device driver, 1.6 - ftmac100: Loading version 0.2 ... - ftmac100 e0100000.mac eth0: irq 21, mapped at (ptrval) - ftmac100 e0100000.mac eth0: generated random MAC address 4e:fd:bd:f3:04:fc - ftsdc010 f0e00000.mmc: mmc0 - using hw SDIO IRQ - mmc0: new SDHC card at address d555 - ftssp010 card registered! - mmcblk0: mmc0:d555 SD04G 3.79 GiB - NET: Registered protocol family 10 - mmcblk0: p1 - Segment Routing with IPv6 - sit: IPv6, IPv4 and MPLS over IPv4 tunneling driver - NET: Registered protocol family 17 - NET: Registered protocol family 15 - ALSA device list: - #0: ftssp_ac97 controller - Freeing unused kernel memory: 13520K - This architecture does not have kernel memory protection. - Sysinit starting - Sat Apr 6 23:33:53 CST 2019 - nfs4flexfilelayout_init: NFSv4 Flexfile Layout Driver Registering... - - ~ # diff --git a/doc/board/AndesTech/index.rst b/doc/board/AndesTech/index.rst index d8f7d155fc..cacc5791a9 100644 --- a/doc/board/AndesTech/index.rst +++ b/doc/board/AndesTech/index.rst @@ -7,4 +7,4 @@ Andes Tech :maxdepth: 2 adp-ag101p - ax25-ae350 + ae350 diff --git a/include/configs/ae350.h b/include/configs/ae350.h new file mode 100644 index 0000000000..b566ecf296 --- /dev/null +++ b/include/configs/ae350.h @@ -0,0 +1,93 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2017 Andes Technology Corporation + * Rick Chen, Andes Technology Corporation + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +#define RISCV_MMODE_TIMERBASE 0xe6000000 +#define RISCV_MMODE_TIMER_FREQ 60000000 + +#define RISCV_SMODE_TIMER_FREQ 60000000 + +/* + * CPU and Board Configuration Options + */ + +/* + * Miscellaneous configurable options + */ + +/* + * Physical Memory Map + */ +#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ +#define PHYS_SDRAM_1 \ + (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ +#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ +#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_0 + +/* + * Serial console configuration + */ +#define CFG_SYS_NS16550_CLK 19660800 + +/* Init Stack Pointer */ + +/* support JEDEC */ +#define PHYS_FLASH_1 0x88000000 /* BANK 0 */ +#define CFG_SYS_FLASH_BASE PHYS_FLASH_1 +#define CFG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } + +/* max number of memory banks */ +/* + * There are 4 banks supported for this Controller, + * but we have only 1 bank connected to flash on board +*/ +#define CFG_SYS_FLASH_BANKS_SIZES {0x4000000} + +/* environments */ + +/* SPI FLASH */ + +/* + * For booting Linux, the board info and command line data + * have to be in the first 16 MB of memory, since this is + * the maximum mapped by the Linux kernel during initialization. + */ + +/* Initial Memory map for Linux*/ +#define CFG_SYS_BOOTMAPSZ (64 << 20) +/* Increase max gunzip size */ + +/* Support autoboot from RAM (kernel image is loaded via debug port) */ +#define KERNEL_IMAGE_ADDR "0x2000000 " +#define BOOTENV_DEV_NAME_RAM(devtypeu, devtypel, instance) \ + "ram " +#define BOOTENV_DEV_RAM(devtypeu, devtypel, instance) \ + "bootcmd_ram=" \ + "booti " \ + KERNEL_IMAGE_ADDR \ + "- $fdtcontroladdr\0" + +/* When we use RAM as ENV */ + +/* Enable distro boot */ +#define BOOT_TARGET_DEVICES(func) \ + func(MMC, mmc, 0) \ + func(DHCP, dhcp, na) \ + func(RAM, ram, na) +#include + +#define CFG_EXTRA_ENV_SETTINGS \ + "kernel_addr_r=0x00080000\0" \ + "pxefile_addr_r=0x01f00000\0" \ + "scriptaddr=0x01f00000\0" \ + "fdt_addr_r=0x02000000\0" \ + "ramdisk_addr_r=0x02800000\0" \ + BOOTENV + +#endif /* __CONFIG_H */ diff --git a/include/configs/ax25-ae350.h b/include/configs/ax25-ae350.h deleted file mode 100644 index b566ecf296..0000000000 --- a/include/configs/ax25-ae350.h +++ /dev/null @@ -1,93 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2017 Andes Technology Corporation - * Rick Chen, Andes Technology Corporation - */ - -#ifndef __CONFIG_H -#define __CONFIG_H - -#define RISCV_MMODE_TIMERBASE 0xe6000000 -#define RISCV_MMODE_TIMER_FREQ 60000000 - -#define RISCV_SMODE_TIMER_FREQ 60000000 - -/* - * CPU and Board Configuration Options - */ - -/* - * Miscellaneous configurable options - */ - -/* - * Physical Memory Map - */ -#define PHYS_SDRAM_0 0x00000000 /* SDRAM Bank #1 */ -#define PHYS_SDRAM_1 \ - (PHYS_SDRAM_0 + PHYS_SDRAM_0_SIZE) /* SDRAM Bank #2 */ -#define PHYS_SDRAM_0_SIZE 0x20000000 /* 512 MB */ -#define PHYS_SDRAM_1_SIZE 0x20000000 /* 512 MB */ -#define CFG_SYS_SDRAM_BASE PHYS_SDRAM_0 - -/* - * Serial console configuration - */ -#define CFG_SYS_NS16550_CLK 19660800 - -/* Init Stack Pointer */ - -/* support JEDEC */ -#define PHYS_FLASH_1 0x88000000 /* BANK 0 */ -#define CFG_SYS_FLASH_BASE PHYS_FLASH_1 -#define CFG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, } - -/* max number of memory banks */ -/* - * There are 4 banks supported for this Controller, - * but we have only 1 bank connected to flash on board -*/ -#define CFG_SYS_FLASH_BANKS_SIZES {0x4000000} - -/* environments */ - -/* SPI FLASH */ - -/* - * For booting Linux, the board info and command line data - * have to be in the first 16 MB of memory, since this is - * the maximum mapped by the Linux kernel during initialization. - */ - -/* Initial Memory map for Linux*/ -#define CFG_SYS_BOOTMAPSZ (64 << 20) -/* Increase max gunzip size */ - -/* Support autoboot from RAM (kernel image is loaded via debug port) */ -#define KERNEL_IMAGE_ADDR "0x2000000 " -#define BOOTENV_DEV_NAME_RAM(devtypeu, devtypel, instance) \ - "ram " -#define BOOTENV_DEV_RAM(devtypeu, devtypel, instance) \ - "bootcmd_ram=" \ - "booti " \ - KERNEL_IMAGE_ADDR \ - "- $fdtcontroladdr\0" - -/* When we use RAM as ENV */ - -/* Enable distro boot */ -#define BOOT_TARGET_DEVICES(func) \ - func(MMC, mmc, 0) \ - func(DHCP, dhcp, na) \ - func(RAM, ram, na) -#include - -#define CFG_EXTRA_ENV_SETTINGS \ - "kernel_addr_r=0x00080000\0" \ - "pxefile_addr_r=0x01f00000\0" \ - "scriptaddr=0x01f00000\0" \ - "fdt_addr_r=0x02000000\0" \ - "ramdisk_addr_r=0x02800000\0" \ - BOOTENV - -#endif /* __CONFIG_H */ -- cgit v1.2.3 From 68bda014812562de1d8ce0485ffe9fdea62fe9dd Mon Sep 17 00:00:00 2001 From: Leo Yu-Chi Liang Date: Tue, 14 Feb 2023 20:42:50 +0800 Subject: riscv: ae350: Adjust the memory layout of ae350 Adjust the initial stack pointer address to 0x10000000(256M) Signed-off-by: Leo Yu-Chi Liang Reviewed-by: Yu Chien Peter Lin Reviewed-by: Rick Chen --- configs/ae350_rv32_spl_defconfig | 6 +++--- configs/ae350_rv32_spl_xip_defconfig | 6 +++--- configs/ae350_rv64_spl_defconfig | 6 +++--- configs/ae350_rv64_spl_xip_defconfig | 6 +++--- 4 files changed, 12 insertions(+), 12 deletions(-) diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index d61f7f5d1d..61475d199d 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -1,7 +1,9 @@ CONFIG_RISCV=y -CONFIG_TEXT_BASE=0x01200000 +CONFIG_TEXT_BASE=0x01800000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SYS_PROMPT="RISC-V # " @@ -12,8 +14,6 @@ CONFIG_TARGET_AE350=y CONFIG_RISCV_SMODE=y # CONFIG_AVAILABLE_HARTS is not set CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffff00 CONFIG_SYS_MONITOR_LEN=786432 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000 diff --git a/configs/ae350_rv32_spl_xip_defconfig b/configs/ae350_rv32_spl_xip_defconfig index e59ba0c38a..b505cec9f8 100644 --- a/configs/ae350_rv32_spl_xip_defconfig +++ b/configs/ae350_rv32_spl_xip_defconfig @@ -1,7 +1,9 @@ CONFIG_RISCV=y -CONFIG_TEXT_BASE=0x01200000 +CONFIG_TEXT_BASE=0x01800000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SPL_TEXT_BASE=0x80000000 @@ -13,8 +15,6 @@ CONFIG_TARGET_AE350=y CONFIG_RISCV_SMODE=y CONFIG_SPL_XIP=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffff00 CONFIG_SYS_MONITOR_LEN=786432 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000 diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index cb69514a7e..36a6d04ef3 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -1,7 +1,9 @@ CONFIG_RISCV=y -CONFIG_TEXT_BASE=0x01200000 +CONFIG_TEXT_BASE=0x01800000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SYS_PROMPT="RISC-V # " @@ -13,8 +15,6 @@ CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y # CONFIG_AVAILABLE_HARTS is not set CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe70 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x00200000 CONFIG_SYS_MONITOR_BASE=0x88000000 diff --git a/configs/ae350_rv64_spl_xip_defconfig b/configs/ae350_rv64_spl_xip_defconfig index e0773fa0aa..0b70e85c18 100644 --- a/configs/ae350_rv64_spl_xip_defconfig +++ b/configs/ae350_rv64_spl_xip_defconfig @@ -1,7 +1,9 @@ CONFIG_RISCV=y -CONFIG_TEXT_BASE=0x01200000 +CONFIG_TEXT_BASE=0x01800000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SPL_TEXT_BASE=0x80000000 @@ -14,8 +16,6 @@ CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_SPL_XIP=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe70 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80010000 CONFIG_SYS_MONITOR_BASE=0x88000000 -- cgit v1.2.3 From 7574b6476afc1fd76816be6567458f6ca4f44234 Mon Sep 17 00:00:00 2001 From: Rick Chen Date: Fri, 17 Feb 2023 16:57:01 +0800 Subject: riscv: binman: Add help message for missing blobs Add the 'missing-msg' for more detailed output on missing system firmware. Signed-off-by: Rick Chen Reviewed-by: Leo Yu-Chi Liang Reviewed-by: Yu Chien Peter Lin --- arch/riscv/dts/binman.dtsi | 1 + tools/binman/missing-blob-help | 6 ++++++ 2 files changed, 7 insertions(+) diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi index b8fc8f7f35..156cb00971 100644 --- a/arch/riscv/dts/binman.dtsi +++ b/arch/riscv/dts/binman.dtsi @@ -45,6 +45,7 @@ opensbi_blob: opensbi { filename = "fw_dynamic.bin"; + missing-msg = "opensbi"; }; }; diff --git a/tools/binman/missing-blob-help b/tools/binman/missing-blob-help index c61ca02a35..4448ac9311 100644 --- a/tools/binman/missing-blob-help +++ b/tools/binman/missing-blob-help @@ -37,3 +37,9 @@ https://github.com/siemens/k3-rti-wdt. tee-os: See the documentation for your board. You may need to build Open Portable Trusted Execution Environment (OP-TEE) with TEE=/path/to/tee.bin + +opensbi: +See the documentation for your board. The OpenSBI git repo is at +https://github.com/riscv/opensbi.git +You may need to build fw_dynamic.bin first and re-build u-boot with +OPENSBI=/path/to/fw_dynamic.bin -- cgit v1.2.3 From fcb5117da8876fc5b2bf941528301218d1be7b1c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 17 Feb 2023 09:58:06 -0500 Subject: configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini --- configs/LicheePi_Zero_defconfig | 1 - configs/SBx81LIFKW_defconfig | 3 +- configs/SBx81LIFXCAT_defconfig | 3 +- configs/a3y17lte_defconfig | 4 +-- configs/a5y17lte_defconfig | 4 +-- configs/a7y17lte_defconfig | 4 +-- configs/ae350_rv32_defconfig | 4 +-- configs/ae350_rv32_xip_defconfig | 4 +-- configs/ae350_rv64_defconfig | 4 +-- configs/ae350_rv64_xip_defconfig | 4 +-- configs/alt_defconfig | 6 ++-- configs/am335x_baltos_defconfig | 4 +-- configs/am335x_boneblack_vboot_defconfig | 4 +-- configs/am335x_evm_spiboot_defconfig | 4 +-- configs/am335x_guardian_defconfig | 4 +-- configs/am335x_hs_evm_defconfig | 5 ++-- configs/am335x_hs_evm_uart_defconfig | 5 ++-- configs/am335x_igep003x_defconfig | 4 +-- configs/am335x_pdu001_defconfig | 4 +-- configs/am335x_shc_defconfig | 4 +-- configs/am335x_shc_ict_defconfig | 4 +-- configs/am335x_shc_netboot_defconfig | 4 +-- configs/am335x_shc_sdboot_defconfig | 4 +-- configs/am335x_sl50_defconfig | 4 +-- configs/am3517_evm_defconfig | 4 +-- configs/am43xx_evm_defconfig | 5 ++-- configs/am43xx_evm_qspiboot_defconfig | 4 +-- configs/am43xx_evm_rtconly_defconfig | 5 ++-- configs/am43xx_evm_usbhost_boot_defconfig | 5 ++-- configs/am43xx_hs_evm_defconfig | 5 ++-- configs/am43xx_hs_evm_qspi_defconfig | 4 +-- configs/am57xx_evm_defconfig | 5 ++-- configs/am57xx_hs_evm_defconfig | 5 ++-- configs/am57xx_hs_evm_usb_defconfig | 5 ++-- configs/am62ax_evm_a53_defconfig | 6 ++-- configs/am62ax_evm_r5_defconfig | 6 ++-- configs/am62x_evm_a53_defconfig | 6 ++-- configs/am62x_evm_r5_defconfig | 6 ++-- configs/am64x_evm_a53_defconfig | 6 ++-- configs/am64x_evm_r5_defconfig | 6 ++-- configs/am65x_evm_a53_defconfig | 7 ++--- configs/am65x_evm_r5_defconfig | 7 ++--- configs/am65x_evm_r5_usbdfu_defconfig | 6 ++-- configs/am65x_evm_r5_usbmsc_defconfig | 6 ++-- configs/am65x_hs_evm_a53_defconfig | 7 ++--- configs/am65x_hs_evm_r5_defconfig | 7 ++--- configs/ap121_defconfig | 4 +-- configs/ap143_defconfig | 4 +-- configs/ap152_defconfig | 4 +-- configs/apalis-imx8_defconfig | 8 +++--- configs/apalis-tk1_defconfig | 2 +- configs/apalis_t30_defconfig | 2 +- configs/arbel_evb_defconfig | 32 +++++++++------------- configs/aristainetos2c_defconfig | 1 - configs/aristainetos2ccslb_defconfig | 1 - configs/arndale_defconfig | 4 +-- configs/at91sam9m10g45ek_mmc_defconfig | 4 +-- configs/at91sam9m10g45ek_nandflash_defconfig | 4 +-- configs/at91sam9n12ek_mmc_defconfig | 4 +-- configs/at91sam9n12ek_nandflash_defconfig | 4 +-- configs/at91sam9n12ek_spiflash_defconfig | 4 +-- configs/at91sam9x5ek_dataflash_defconfig | 4 +-- configs/at91sam9x5ek_mmc_defconfig | 4 +-- configs/at91sam9x5ek_nandflash_defconfig | 4 +-- configs/at91sam9x5ek_spiflash_defconfig | 4 +-- configs/axm_defconfig | 2 +- configs/axs101_defconfig | 4 +-- configs/axs103_defconfig | 4 +-- configs/bananapi-m5_defconfig | 6 ++-- configs/bcm947622_defconfig | 4 +-- configs/bcm94908_defconfig | 4 +-- configs/bcm94912_defconfig | 4 +-- configs/bcm963138_defconfig | 4 +-- configs/bcm963146_defconfig | 4 +-- configs/bcm963148_defconfig | 4 +-- configs/bcm963158_defconfig | 4 +-- configs/bcm963178_defconfig | 4 +-- configs/bcm96756_defconfig | 4 +-- configs/bcm96813_defconfig | 4 +-- configs/bcm968380gerg_ram_defconfig | 2 +- configs/bcm96846_defconfig | 4 +-- configs/bcm96855_defconfig | 4 +-- configs/bcm96856_defconfig | 4 +-- configs/bcm96858_defconfig | 4 +-- configs/bcm96878_defconfig | 4 +-- configs/bcm_ns3_defconfig | 4 +-- configs/beaver_defconfig | 2 +- configs/beelink-gsking-x_defconfig | 6 ++-- configs/beelink-gtking_defconfig | 6 ++-- configs/beelink-gtkingpro_defconfig | 6 ++-- configs/bitmain_antminer_s9_defconfig | 2 +- configs/blanche_defconfig | 4 +-- configs/brppt1_mmc_defconfig | 4 +-- configs/brsmarc1_defconfig | 4 +-- configs/brxre1_defconfig | 4 +-- configs/bubblegum_96_defconfig | 4 +-- configs/cardhu_defconfig | 2 +- configs/cei-tk1-som_defconfig | 2 +- configs/cgtqmx8_defconfig | 7 ++--- configs/chiliboard_defconfig | 4 +-- configs/chromebit_mickey_defconfig | 6 ++-- configs/chromebook_bob_defconfig | 8 +++--- configs/chromebook_jerry_defconfig | 8 +++--- configs/chromebook_kevin_defconfig | 8 +++--- configs/chromebook_link64_defconfig | 1 - configs/chromebook_minnie_defconfig | 6 ++-- configs/chromebook_speedy_defconfig | 6 ++-- configs/ci20_mmc_defconfig | 2 +- configs/clearfog_defconfig | 6 ++-- configs/clearfog_gt_8k_defconfig | 4 +-- configs/cm_t43_defconfig | 4 +-- configs/colibri-imx8x_defconfig | 4 +-- configs/colibri_t20_defconfig | 2 +- configs/colibri_t30_defconfig | 2 +- configs/comtrend_ar5315u_ram_defconfig | 2 +- configs/comtrend_ar5387un_ram_defconfig | 2 +- configs/comtrend_ct5361_ram_defconfig | 2 +- configs/comtrend_vr3032u_ram_defconfig | 2 +- configs/comtrend_wap5813n_ram_defconfig | 2 +- configs/controlcenterdc_defconfig | 6 ++-- configs/corstone1000_defconfig | 4 +-- configs/cortina_presidio-asic-base_defconfig | 4 +-- configs/cortina_presidio-asic-emmc_defconfig | 4 +-- configs/cortina_presidio-asic-pnand_defconfig | 4 +-- configs/corvus_defconfig | 6 ++-- configs/crs305-1g-4s-bit_defconfig | 5 ++-- configs/crs305-1g-4s_defconfig | 5 ++-- configs/crs326-24g-2s-bit_defconfig | 5 ++-- configs/crs326-24g-2s_defconfig | 5 ++-- configs/crs328-4c-20s-4s-bit_defconfig | 5 ++-- configs/crs328-4c-20s-4s_defconfig | 5 ++-- configs/cubieboard7_defconfig | 4 +-- configs/d2net_v2_defconfig | 3 +- configs/da850evm_defconfig | 6 ++-- configs/da850evm_direct_nor_defconfig | 4 +-- configs/da850evm_nand_defconfig | 8 +++--- configs/dalmore_defconfig | 2 +- configs/db-88f6720_defconfig | 6 ++-- configs/db-88f6820-amc_defconfig | 6 ++-- configs/db-88f6820-gp_defconfig | 6 ++-- configs/db-mv784mp-gp_defconfig | 6 ++-- configs/db-xc3-24g4xg_defconfig | 5 ++-- configs/deneb_defconfig | 7 ++--- configs/devkit3250_defconfig | 6 ++-- configs/devkit8000_defconfig | 4 +-- configs/dh_imx6_defconfig | 1 - configs/display5_defconfig | 1 - configs/display5_factory_defconfig | 1 - configs/dns325_defconfig | 3 +- configs/dockstar_defconfig | 2 -- configs/dra7xx_evm_defconfig | 5 ++-- configs/dra7xx_hs_evm_defconfig | 5 ++-- configs/dra7xx_hs_evm_usb_defconfig | 5 ++-- configs/draco_defconfig | 4 +-- configs/dragonboard410c_defconfig | 4 +-- configs/dragonboard820c_defconfig | 4 +-- configs/dreamplug_defconfig | 2 -- configs/ds109_defconfig | 3 +- configs/ds116_defconfig | 6 ++-- configs/ds414_defconfig | 6 ++-- configs/durian_defconfig | 4 +-- configs/eDPU_defconfig | 4 +-- configs/ea-lpc3250devkitv2_defconfig | 4 +-- configs/eaidk-610-rk3399_defconfig | 6 ++-- configs/elgin-rv1108_defconfig | 4 +-- configs/emsdp_defconfig | 4 +-- configs/espresso7420_defconfig | 4 +-- configs/etamin_defconfig | 4 +-- configs/evb-ast2500_defconfig | 2 +- configs/evb-ast2600_defconfig | 3 +- configs/evb-px30_defconfig | 10 +++---- configs/evb-px5_defconfig | 8 +++--- configs/evb-rk3036_defconfig | 4 +-- configs/evb-rk3128_defconfig | 6 ++-- configs/evb-rk3229_defconfig | 5 ++-- configs/evb-rk3288_defconfig | 9 +++--- configs/evb-rk3308_defconfig | 8 +++--- configs/evb-rk3328_defconfig | 8 +++--- configs/evb-rk3399_defconfig | 8 +++--- configs/evb-rk3568_defconfig | 8 +++--- configs/evb-rv1108_defconfig | 4 +-- configs/ficus-rk3399_defconfig | 6 ++-- configs/firefly-px30_defconfig | 10 +++---- configs/firefly-rk3288_defconfig | 8 +++--- configs/firefly-rk3399_defconfig | 8 +++--- configs/gardena-smart-gateway-at91sam_defconfig | 6 ++-- configs/gazerbeam_defconfig | 2 +- configs/geekbox_defconfig | 4 +-- configs/giedi_defconfig | 7 ++--- configs/goflexhome_defconfig | 2 -- configs/gose_defconfig | 6 ++-- configs/grpeach_defconfig | 4 +-- configs/guruplug_defconfig | 3 +- configs/gwventana_emmc_defconfig | 1 - configs/gwventana_gw5904_defconfig | 1 - configs/gwventana_nand_defconfig | 1 - configs/gxp_defconfig | 4 +-- configs/harmony_defconfig | 2 +- configs/helios4_defconfig | 6 ++-- configs/highbank_defconfig | 4 +-- configs/hikey960_defconfig | 4 +-- configs/hikey_defconfig | 4 +-- configs/hsdk_4xd_defconfig | 6 ++-- configs/hsdk_defconfig | 6 ++-- configs/huawei_hg556a_ram_defconfig | 2 +- configs/ib62x0_defconfig | 3 +- configs/iconnect_defconfig | 2 -- configs/igep00x0_defconfig | 4 +-- configs/imgtec_xilfpga_defconfig | 4 +-- configs/imx28_xea_defconfig | 2 +- configs/imx6q_bosch_acc_defconfig | 1 - configs/imx6qdl_icore_mipi_defconfig | 1 - configs/imx6qdl_icore_mmc_defconfig | 1 - configs/imx6qdl_icore_rqs_defconfig | 1 - configs/imx8mm-cl-iot-gate-optee_defconfig | 3 +- configs/imx8mm-cl-iot-gate_defconfig | 3 +- configs/imx8mm-icore-mx8mm-ctouch2_defconfig | 3 +- configs/imx8mm-icore-mx8mm-edimm2.2_defconfig | 3 +- configs/imx8mm-mx8menlo_defconfig | 3 +- configs/imx8mm_beacon_defconfig | 3 +- configs/imx8mm_data_modul_edm_sbc_defconfig | 5 ++-- configs/imx8mm_evk_defconfig | 3 +- configs/imx8mm_evk_fspi_defconfig | 3 +- configs/imx8mm_phg_defconfig | 3 +- configs/imx8mm_venice_defconfig | 3 +- configs/imx8mn_beacon_2g_defconfig | 6 ++-- configs/imx8mn_beacon_defconfig | 6 ++-- configs/imx8mn_beacon_fspi_defconfig | 6 ++-- configs/imx8mn_bsh_smm_s2_defconfig | 3 +- configs/imx8mn_bsh_smm_s2pro_defconfig | 3 +- configs/imx8mn_ddr4_evk_defconfig | 3 +- configs/imx8mn_evk_defconfig | 3 +- configs/imx8mn_var_som_defconfig | 3 +- configs/imx8mn_venice_defconfig | 3 +- configs/imx8mp-icore-mx8mp-edimm2.2_defconfig | 3 +- configs/imx8mp_dhcom_pdk2_defconfig | 5 ++-- configs/imx8mp_evk_defconfig | 3 +- configs/imx8mp_rsb3720a1_4G_defconfig | 3 +- configs/imx8mp_rsb3720a1_6G_defconfig | 3 +- configs/imx8mp_venice_defconfig | 3 +- configs/imx8mq_cm_defconfig | 3 +- configs/imx8mq_evk_defconfig | 5 ++-- configs/imx8mq_phanbell_defconfig | 5 ++-- configs/imx8qm_mek_defconfig | 6 ++-- configs/imx8qm_rom7720_a1_4G_defconfig | 5 ++-- configs/imx8qxp_mek_defconfig | 6 ++-- configs/imx8ulp_evk_defconfig | 2 +- configs/imx93_11x11_evk_defconfig | 2 +- configs/imxrt1020-evk_defconfig | 4 +-- configs/imxrt1050-evk_defconfig | 4 +-- configs/imxrt1170-evk_defconfig | 4 +-- configs/inetspace_v2_defconfig | 3 +- configs/integratorap_cm720t_defconfig | 4 +-- configs/integratorap_cm920t_defconfig | 4 +-- configs/integratorap_cm926ejs_defconfig | 4 +-- configs/integratorap_cm946es_defconfig | 4 +-- configs/integratorcp_cm1136_defconfig | 4 +-- configs/integratorcp_cm920t_defconfig | 4 +-- configs/integratorcp_cm926ejs_defconfig | 4 +-- configs/integratorcp_cm946es_defconfig | 4 +-- configs/iot2050_defconfig | 7 ++--- configs/iot_devkit_defconfig | 4 +-- configs/j7200_evm_a72_defconfig | 7 ++--- configs/j7200_evm_r5_defconfig | 7 ++--- configs/j7200_hs_evm_a72_defconfig | 7 ++--- configs/j7200_hs_evm_r5_defconfig | 7 ++--- configs/j721e_evm_a72_defconfig | 7 ++--- configs/j721e_evm_r5_defconfig | 7 ++--- configs/j721e_hs_evm_a72_defconfig | 7 ++--- configs/j721e_hs_evm_r5_defconfig | 7 ++--- configs/j721s2_evm_a72_defconfig | 13 ++++----- configs/j721s2_evm_r5_defconfig | 9 +++--- configs/j721s2_hs_evm_a72_defconfig | 7 ++--- configs/j721s2_hs_evm_r5_defconfig | 7 ++--- configs/jethub_j100_defconfig | 6 ++-- configs/jethub_j80_defconfig | 6 ++-- configs/jetson-tk1_defconfig | 2 +- configs/k2e_evm_defconfig | 6 ++-- configs/k2e_hs_evm_defconfig | 4 +-- configs/k2g_evm_defconfig | 6 ++-- configs/k2g_hs_evm_defconfig | 4 +-- configs/k2hk_evm_defconfig | 6 ++-- configs/k2hk_hs_evm_defconfig | 4 +-- configs/k2l_evm_defconfig | 6 ++-- configs/k2l_hs_evm_defconfig | 4 +-- configs/khadas-edge-captain-rk3399_defconfig | 6 ++-- configs/khadas-edge-rk3399_defconfig | 6 ++-- configs/khadas-edge-v-rk3399_defconfig | 6 ++-- configs/khadas-vim2_defconfig | 6 ++-- configs/khadas-vim3_android_ab_defconfig | 6 ++-- configs/khadas-vim3_android_defconfig | 6 ++-- configs/khadas-vim3_defconfig | 6 ++-- configs/khadas-vim3l_android_ab_defconfig | 6 ++-- configs/khadas-vim3l_android_defconfig | 6 ++-- configs/khadas-vim3l_defconfig | 6 ++-- configs/khadas-vim_defconfig | 6 ++-- configs/kmcent2_defconfig | 1 - configs/koelsch_defconfig | 6 ++-- configs/kontron-sl-mx6ul_defconfig | 1 - configs/kontron-sl-mx8mm_defconfig | 3 +- configs/kontron_pitx_imx8m_defconfig | 5 ++-- configs/kontron_sl28_defconfig | 7 ++--- configs/kylin-rk3036_defconfig | 4 +-- configs/lager_defconfig | 6 ++-- configs/leez-rk3399_defconfig | 6 ++-- configs/legoev3_defconfig | 4 +-- configs/librem5_defconfig | 5 ++-- configs/libretech-ac_defconfig | 6 ++-- configs/libretech-cc_defconfig | 6 ++-- configs/libretech-cc_v2_defconfig | 6 ++-- configs/libretech-s905d-pc_defconfig | 6 ++-- configs/libretech-s912-pc_defconfig | 6 ++-- configs/lion-rk3368_defconfig | 6 ++-- configs/ls1012a2g5rdb_qspi_defconfig | 4 +-- configs/ls1012afrdm_qspi_defconfig | 4 +-- configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig | 4 +-- configs/ls1012afrwy_qspi_defconfig | 4 +-- configs/ls1012aqds_qspi_defconfig | 4 +-- configs/ls1012ardb_qspi_SECURE_BOOT_defconfig | 4 +-- configs/ls1012ardb_qspi_defconfig | 4 +-- configs/ls1021aiot_sdcard_defconfig | 2 +- configs/ls1021aqds_nand_defconfig | 2 +- configs/ls1021aqds_sdcard_ifc_defconfig | 2 +- configs/ls1021aqds_sdcard_qspi_defconfig | 2 +- configs/ls1021atsn_sdcard_defconfig | 2 +- .../ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig | 2 +- configs/ls1021atwr_sdcard_ifc_defconfig | 2 +- configs/ls1021atwr_sdcard_qspi_defconfig | 2 +- configs/ls1043aqds_defconfig | 4 +-- configs/ls1043aqds_lpuart_defconfig | 4 +-- configs/ls1043aqds_nand_defconfig | 6 ++-- configs/ls1043aqds_nor_ddr3_defconfig | 4 +-- configs/ls1043aqds_qspi_defconfig | 4 +-- configs/ls1043aqds_sdcard_ifc_defconfig | 6 ++-- configs/ls1043aqds_sdcard_qspi_defconfig | 6 ++-- configs/ls1043ardb_SECURE_BOOT_defconfig | 4 +-- configs/ls1043ardb_defconfig | 4 +-- configs/ls1043ardb_nand_SECURE_BOOT_defconfig | 6 ++-- configs/ls1043ardb_nand_defconfig | 6 ++-- configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig | 6 ++-- configs/ls1043ardb_sdcard_defconfig | 6 ++-- configs/ls1046aqds_SECURE_BOOT_defconfig | 4 +-- configs/ls1046aqds_defconfig | 4 +-- configs/ls1046aqds_lpuart_defconfig | 4 +-- configs/ls1046aqds_nand_defconfig | 6 ++-- configs/ls1046aqds_qspi_defconfig | 4 +-- configs/ls1046aqds_sdcard_ifc_defconfig | 6 ++-- configs/ls1046aqds_sdcard_qspi_defconfig | 6 ++-- configs/ls1046ardb_emmc_defconfig | 6 ++-- configs/ls1046ardb_qspi_SECURE_BOOT_defconfig | 4 +-- configs/ls1046ardb_qspi_defconfig | 4 +-- configs/ls1046ardb_qspi_spl_defconfig | 7 ++--- configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig | 6 ++-- configs/ls1046ardb_sdcard_defconfig | 6 ++-- configs/ls1088aqds_defconfig | 4 +-- configs/ls1088aqds_qspi_SECURE_BOOT_defconfig | 4 +-- configs/ls1088aqds_qspi_defconfig | 4 +-- configs/ls1088aqds_sdcard_ifc_defconfig | 6 ++-- configs/ls1088aqds_sdcard_qspi_defconfig | 6 ++-- configs/ls1088ardb_qspi_SECURE_BOOT_defconfig | 4 +-- configs/ls1088ardb_qspi_defconfig | 4 +-- .../ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig | 6 ++-- configs/ls1088ardb_sdcard_qspi_defconfig | 6 ++-- configs/ls2080aqds_SECURE_BOOT_defconfig | 4 +-- configs/ls2080aqds_defconfig | 4 +-- configs/ls2080aqds_nand_defconfig | 6 ++-- configs/ls2080aqds_qspi_defconfig | 4 +-- configs/ls2080aqds_sdcard_defconfig | 6 ++-- configs/ls2080ardb_SECURE_BOOT_defconfig | 4 +-- configs/ls2080ardb_defconfig | 4 +-- configs/ls2080ardb_nand_defconfig | 6 ++-- configs/ls2081ardb_defconfig | 4 +-- configs/ls2088ardb_qspi_SECURE_BOOT_defconfig | 4 +-- configs/ls2088ardb_qspi_defconfig | 4 +-- configs/lschlv2_defconfig | 4 --- configs/lsxhl_defconfig | 4 --- configs/m53menlo_defconfig | 2 +- configs/maxbcm_defconfig | 6 ++-- configs/mccmon6_nor_defconfig | 1 - configs/mccmon6_sd_defconfig | 1 - configs/medcom-wide_defconfig | 2 +- configs/microblaze-generic_defconfig | 2 +- configs/microchip_mpfs_icicle_defconfig | 4 +-- configs/miqi-rk3288_defconfig | 8 +++--- configs/mk808_defconfig | 8 +++--- configs/msc_sm2s_imx8mp_defconfig | 3 +- configs/mt7621_rfb_defconfig | 2 +- configs/mt7623a_unielec_u7623_02_defconfig | 4 +-- configs/mt7623n_bpir2_defconfig | 4 +-- configs/mt7629_rfb_defconfig | 6 ++-- configs/mvebu_ac5_rd_defconfig | 4 +-- configs/mvebu_crb_cn9130_defconfig | 4 +-- configs/mvebu_db-88f3720_defconfig | 4 +-- configs/mvebu_db_armada8k_defconfig | 4 +-- configs/mvebu_db_cn9130_defconfig | 4 +-- configs/mvebu_espressobin-88f3720_defconfig | 4 +-- configs/mvebu_mcbin-88f8040_defconfig | 4 +-- configs/mvebu_puzzle-m801-88f8040_defconfig | 4 +-- configs/mx6sabreauto_defconfig | 1 - configs/mx6sabresd_defconfig | 1 - configs/mx6ull_14x14_evk_defconfig | 8 +++--- configs/mx6ull_14x14_evk_plugin_defconfig | 8 +++--- configs/nanopc-t4-rk3399_defconfig | 8 +++--- configs/nanopi-k2_defconfig | 6 ++-- configs/nanopi-m4-2gb-rk3399_defconfig | 6 ++-- configs/nanopi-m4-rk3399_defconfig | 6 ++-- configs/nanopi-m4b-rk3399_defconfig | 6 ++-- configs/nanopi-neo4-rk3399_defconfig | 6 ++-- configs/nanopi-r2s-rk3328_defconfig | 10 +++---- configs/nanopi-r4s-rk3399_defconfig | 6 ++-- configs/nas220_defconfig | 3 +- configs/net2big_v2_defconfig | 3 +- configs/netgear_cg3100d_ram_defconfig | 2 +- configs/netgear_dgnd3700v2_ram_defconfig | 2 +- configs/netspace_lite_v2_defconfig | 3 +- configs/netspace_max_v2_defconfig | 3 +- configs/netspace_mini_v2_defconfig | 3 +- configs/netspace_v2_defconfig | 3 +- configs/nsa310s_defconfig | 2 -- configs/nsim_700_defconfig | 4 +-- configs/nsim_700be_defconfig | 4 +-- configs/nsim_hs38_defconfig | 4 +-- configs/nsim_hs38be_defconfig | 4 +-- configs/nyan-big_defconfig | 2 +- configs/octeontx2_95xx_defconfig | 4 +-- configs/octeontx2_96xx_defconfig | 4 +-- configs/octeontx_81xx_defconfig | 4 +-- configs/octeontx_83xx_defconfig | 4 +-- configs/odroid-c2_defconfig | 6 ++-- configs/odroid-c4_defconfig | 6 ++-- configs/odroid-go-ultra_defconfig | 6 ++-- configs/odroid-go2_defconfig | 10 +++---- configs/odroid-hc4_defconfig | 6 ++-- configs/odroid-n2_defconfig | 6 ++-- configs/odroid-n2l_defconfig | 6 ++-- configs/odroid-xu3_defconfig | 4 +-- configs/odroid_defconfig | 4 +-- configs/omap35_logic_defconfig | 4 +-- configs/omap35_logic_somlv_defconfig | 4 +-- configs/omap3_beagle_defconfig | 4 +-- configs/omap3_evm_defconfig | 4 +-- configs/omap3_logic_defconfig | 4 +-- configs/omap3_logic_somlv_defconfig | 4 +-- configs/omap4_panda_defconfig | 4 +-- configs/omap4_sdp4430_defconfig | 4 +-- configs/omap5_uevm_defconfig | 4 +-- configs/omapl138_lcdk_defconfig | 8 +++--- configs/openpiton_riscv64_defconfig | 4 +-- configs/openpiton_riscv64_spl_defconfig | 6 ++-- configs/openrd_base_defconfig | 3 +- configs/openrd_client_defconfig | 3 +- configs/openrd_ultimate_defconfig | 3 +- configs/orangepi-rk3399_defconfig | 6 ++-- configs/origen_defconfig | 4 +-- configs/p200_defconfig | 6 ++-- configs/p201_defconfig | 6 ++-- configs/p212_defconfig | 6 ++-- configs/paz00_defconfig | 2 +- configs/pcm051_rev3_defconfig | 4 +-- configs/peach-pi_defconfig | 4 +-- configs/peach-pit_defconfig | 4 +-- configs/pg_wcom_expu1_defconfig | 2 +- configs/pg_wcom_expu1_update_defconfig | 2 +- configs/pg_wcom_seli8_defconfig | 2 +- configs/pg_wcom_seli8_update_defconfig | 2 +- configs/phycore-am335x-r2-regor_defconfig | 4 +-- configs/phycore-am335x-r2-wega_defconfig | 4 +-- configs/phycore-imx8mm_defconfig | 3 +- configs/phycore-imx8mp_defconfig | 3 +- configs/phycore-rk3288_defconfig | 6 ++-- configs/pic32mzdask_defconfig | 4 +-- configs/pico-dwarf-imx7d_defconfig | 1 - configs/pico-hobbit-imx7d_defconfig | 2 -- configs/pico-imx6_defconfig | 1 - configs/pico-imx7d_bl33_defconfig | 2 -- configs/pico-imx7d_defconfig | 1 - configs/pico-imx8mq_defconfig | 5 ++-- configs/pico-nymph-imx7d_defconfig | 1 - configs/pico-pi-imx7d_defconfig | 1 - configs/pinebook-pro-rk3399_defconfig | 8 +++--- configs/pinephone-pro-rk3399_defconfig | 13 ++++----- configs/plutux_defconfig | 2 +- configs/pm9261_defconfig | 4 +-- configs/pm9263_defconfig | 4 +-- configs/pm9g45_defconfig | 4 +-- configs/pogo_e02_defconfig | 2 -- configs/pogo_v4_defconfig | 2 -- configs/poleg_evb_defconfig | 13 ++++----- configs/pomelo_defconfig | 4 +-- configs/poplar_defconfig | 4 +-- configs/popmetal-rk3288_defconfig | 6 ++-- configs/porter_defconfig | 6 ++-- configs/puma-rk3399_defconfig | 8 +++--- configs/px30-core-ctouch2-of10-px30_defconfig | 10 +++---- configs/px30-core-ctouch2-px30_defconfig | 10 +++---- configs/px30-core-edimm2.2-px30_defconfig | 10 +++---- configs/pxm2_defconfig | 4 +-- configs/qcs404evb_defconfig | 4 +-- configs/qemu-riscv32_defconfig | 4 +-- configs/qemu-riscv32_smode_defconfig | 4 +-- configs/qemu-riscv32_spl_defconfig | 4 +-- configs/qemu-riscv64_defconfig | 4 +-- configs/qemu-riscv64_smode_defconfig | 4 +-- configs/qemu-riscv64_spl_defconfig | 4 +-- configs/qemu-x86_64_defconfig | 1 - configs/qemu_arm64_defconfig | 6 ++-- configs/qemu_arm_defconfig | 6 ++-- configs/r8a77970_eagle_defconfig | 2 +- configs/r8a77980_condor_defconfig | 4 +-- configs/r8a77990_ebisu_defconfig | 4 +-- configs/r8a77995_draak_defconfig | 3 +- configs/r8a779a0_falcon_defconfig | 2 +- configs/radxa-zero_defconfig | 6 ++-- configs/rastaban_defconfig | 4 +-- configs/rcar3_salvator-x_defconfig | 3 +- configs/rcar3_ulcb_defconfig | 5 +--- configs/ringneck-px30_defconfig | 11 ++++---- configs/roc-cc-rk3308_defconfig | 8 +++--- configs/roc-cc-rk3328_defconfig | 10 +++---- configs/roc-pc-mezzanine-rk3399_defconfig | 8 +++--- configs/roc-pc-rk3399_defconfig | 8 +++--- configs/rock-pi-4-rk3399_defconfig | 8 +++--- configs/rock-pi-4c-rk3399_defconfig | 8 +++--- configs/rock-pi-e-rk3328_defconfig | 10 +++---- configs/rock-pi-n10-rk3399pro_defconfig | 8 +++--- configs/rock-pi-n8-rk3288_defconfig | 8 +++--- configs/rock2_defconfig | 6 ++-- configs/rock64-rk3328_defconfig | 10 +++---- configs/rock960-rk3399_defconfig | 8 +++--- configs/rock_defconfig | 6 ++-- configs/rockpro64-rk3399_defconfig | 8 +++--- configs/rpi_0_w_defconfig | 4 +-- configs/rpi_2_defconfig | 4 +-- configs/rpi_3_32b_defconfig | 4 +-- configs/rpi_3_b_plus_defconfig | 4 +-- configs/rpi_3_defconfig | 4 +-- configs/rpi_4_32b_defconfig | 6 ++-- configs/rpi_4_defconfig | 6 ++-- configs/rpi_arm64_defconfig | 6 ++-- configs/rpi_defconfig | 4 +-- configs/rut_defconfig | 4 +-- configs/s400_defconfig | 6 ++-- configs/s5p4418_nanopi2_defconfig | 4 +-- configs/s5p_goni_defconfig | 4 +-- configs/s5pc210_universal_defconfig | 4 +-- configs/sagem_f@st1704_ram_defconfig | 2 +- configs/sam9x60_curiosity_mmc1_defconfig | 5 ++-- configs/sam9x60_curiosity_mmc_defconfig | 4 +-- configs/sam9x60ek_mmc_defconfig | 4 +-- configs/sam9x60ek_nandflash_defconfig | 4 +-- configs/sam9x60ek_qspiflash_defconfig | 4 +-- configs/sama5d27_giantboard_defconfig | 6 ++-- configs/sama5d27_som1_ek_mmc1_defconfig | 6 ++-- configs/sama5d27_som1_ek_mmc_defconfig | 6 ++-- configs/sama5d27_som1_ek_qspiflash_defconfig | 6 ++-- configs/sama5d27_wlsom1_ek_mmc_defconfig | 6 ++-- configs/sama5d27_wlsom1_ek_qspiflash_defconfig | 6 ++-- configs/sama5d2_icp_mmc_defconfig | 6 ++-- configs/sama5d2_icp_qspiflash_defconfig | 4 +-- configs/sama5d2_ptc_ek_mmc_defconfig | 4 +-- configs/sama5d2_ptc_ek_nandflash_defconfig | 4 +-- configs/sama5d2_xplained_emmc_defconfig | 6 ++-- configs/sama5d2_xplained_mmc_defconfig | 6 ++-- configs/sama5d2_xplained_qspiflash_defconfig | 6 ++-- configs/sama5d2_xplained_spiflash_defconfig | 6 ++-- configs/sama5d36ek_cmp_mmc_defconfig | 4 +-- configs/sama5d36ek_cmp_nandflash_defconfig | 4 +-- configs/sama5d36ek_cmp_spiflash_defconfig | 4 +-- configs/sama5d3_xplained_mmc_defconfig | 6 ++-- configs/sama5d3_xplained_nandflash_defconfig | 6 ++-- configs/sama5d3xek_mmc_defconfig | 6 ++-- configs/sama5d3xek_nandflash_defconfig | 6 ++-- configs/sama5d3xek_spiflash_defconfig | 6 ++-- configs/sama5d4_xplained_mmc_defconfig | 6 ++-- configs/sama5d4_xplained_nandflash_defconfig | 6 ++-- configs/sama5d4_xplained_spiflash_defconfig | 6 ++-- configs/sama5d4ek_mmc_defconfig | 6 ++-- configs/sama5d4ek_nandflash_defconfig | 6 ++-- configs/sama5d4ek_spiflash_defconfig | 6 ++-- configs/sama7g5ek_mmc1_defconfig | 4 +-- configs/sama7g5ek_mmc_defconfig | 4 +-- configs/sandbox64_defconfig | 2 +- configs/sandbox_defconfig | 4 +-- configs/sandbox_flattree_defconfig | 2 +- configs/sandbox_noinst_defconfig | 3 +- configs/sandbox_spl_defconfig | 3 +- configs/sandbox_vpl_defconfig | 3 +- configs/seaboard_defconfig | 2 +- configs/sei510_defconfig | 6 ++-- configs/sei610_defconfig | 6 ++-- configs/sfr_nb4-ser_ram_defconfig | 2 +- configs/sheep-rk3368_defconfig | 4 +-- configs/sheevaplug_defconfig | 2 -- configs/sifive_unleashed_defconfig | 8 +++--- configs/sifive_unmatched_defconfig | 8 +++--- configs/silinux_ek874_defconfig | 2 +- configs/silk_defconfig | 6 ++-- configs/sipeed_maix_bitm_defconfig | 4 +-- configs/sipeed_maix_smode_defconfig | 4 +-- configs/smartweb_defconfig | 2 +- configs/smdk5250_defconfig | 4 +-- configs/smdk5420_defconfig | 4 +-- configs/smdkc100_defconfig | 4 +-- configs/smdkv310_defconfig | 4 +-- configs/sniper_defconfig | 6 ++-- configs/snow_defconfig | 4 +-- configs/socfpga_agilex_atf_defconfig | 9 +++--- configs/socfpga_agilex_defconfig | 8 +++--- configs/socfpga_agilex_vab_defconfig | 9 +++--- configs/socfpga_arria10_defconfig | 7 ++--- configs/socfpga_arria5_defconfig | 8 +++--- configs/socfpga_chameleonv3_defconfig | 1 - configs/socfpga_cyclone5_defconfig | 8 +++--- configs/socfpga_dbm_soc1_defconfig | 8 +++--- configs/socfpga_de0_nano_soc_defconfig | 8 +++--- configs/socfpga_de10_nano_defconfig | 8 +++--- configs/socfpga_de10_standard_defconfig | 8 +++--- configs/socfpga_de1_soc_defconfig | 8 +++--- configs/socfpga_is1_defconfig | 8 +++--- configs/socfpga_mcvevk_defconfig | 8 +++--- configs/socfpga_n5x_atf_defconfig | 9 +++--- configs/socfpga_n5x_defconfig | 8 +++--- configs/socfpga_n5x_vab_defconfig | 9 +++--- configs/socfpga_secu1_defconfig | 8 +++--- configs/socfpga_sockit_defconfig | 8 +++--- configs/socfpga_socrates_defconfig | 8 +++--- configs/socfpga_sr1500_defconfig | 8 +++--- configs/socfpga_stratix10_atf_defconfig | 9 +++--- configs/socfpga_stratix10_defconfig | 8 +++--- configs/socfpga_vining_fpga_defconfig | 8 +++--- configs/socrates_defconfig | 2 -- configs/spring_defconfig | 4 +-- configs/starqltechn_defconfig | 1 - configs/stemmy_defconfig | 4 +-- configs/stih410-b2260_defconfig | 4 +-- configs/stm32746g-eval_defconfig | 4 +-- configs/stm32746g-eval_spl_defconfig | 4 +-- configs/stm32f429-discovery_defconfig | 4 +-- configs/stm32f429-evaluation_defconfig | 4 +-- configs/stm32f469-discovery_defconfig | 4 +-- configs/stm32f746-disco_defconfig | 4 +-- configs/stm32f746-disco_spl_defconfig | 4 +-- configs/stm32f769-disco_defconfig | 4 +-- configs/stm32f769-disco_spl_defconfig | 4 +-- configs/stm32h743-disco_defconfig | 4 +-- configs/stm32h743-eval_defconfig | 4 +-- configs/stm32h750-art-pi_defconfig | 4 +-- configs/stm32mp13_defconfig | 2 +- configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig | 6 ++-- .../stm32mp15-icore-stm32mp1-edimm2.2_defconfig | 6 ++-- ...2mp15-microgea-stm32mp1-microdev2-of7_defconfig | 6 ++-- ...stm32mp15-microgea-stm32mp1-microdev2_defconfig | 6 ++-- configs/stm32mp15_basic_defconfig | 6 ++-- configs/stm32mp15_defconfig | 2 +- configs/stm32mp15_dhcom_basic_defconfig | 7 ++--- configs/stm32mp15_dhcor_basic_defconfig | 7 ++--- configs/stm32mp15_trusted_defconfig | 2 +- configs/stout_defconfig | 6 ++-- configs/synquacer_developerbox_defconfig | 4 +-- configs/syzygy_hub_defconfig | 2 +- configs/taurus_defconfig | 2 +- configs/tb100_defconfig | 4 +-- configs/tbs2910_defconfig | 1 - configs/tec-ng_defconfig | 2 +- configs/tec_defconfig | 2 +- configs/theadorable_debug_defconfig | 6 ++-- configs/thuban_defconfig | 4 +-- configs/thunderx_88xx_defconfig | 4 +-- configs/ti816x_evm_defconfig | 4 +-- configs/tinker-rk3288_defconfig | 8 +++--- configs/tinker-s-rk3288_defconfig | 8 +++--- configs/tools-only_defconfig | 1 - configs/topic_miami_defconfig | 2 +- configs/topic_miamilite_defconfig | 2 +- configs/topic_miamiplus_defconfig | 2 +- configs/total_compute_defconfig | 4 +-- configs/tplink_wdr4300_defconfig | 4 +-- configs/trats2_defconfig | 4 +-- configs/trats_defconfig | 4 +-- configs/trimslice_defconfig | 2 +- configs/turris_mox_defconfig | 4 +-- configs/turris_omnia_defconfig | 6 ++-- configs/u200_defconfig | 6 ++-- configs/uDPU_defconfig | 4 +-- configs/udoo_neo_defconfig | 4 +-- configs/uniphier_ld4_sld8_defconfig | 10 +++---- configs/uniphier_v7_defconfig | 10 +++---- configs/venice2_defconfig | 2 +- configs/ventana_defconfig | 2 +- configs/verdin-imx8mm_defconfig | 3 +- configs/verdin-imx8mp_defconfig | 3 +- configs/vexpress_aemv8a_juno_defconfig | 4 +-- configs/vexpress_ca9x4_defconfig | 4 +-- configs/vinco_defconfig | 4 +-- configs/vyasa-rk3288_defconfig | 8 +++--- configs/wandboard_defconfig | 1 - configs/wetek-core2_defconfig | 6 ++-- configs/work_92105_defconfig | 6 ++-- configs/x530_defconfig | 6 ++-- configs/xilinx_versal_mini_defconfig | 4 +-- configs/xilinx_versal_mini_emmc0_defconfig | 4 +-- configs/xilinx_versal_mini_emmc1_defconfig | 4 +-- configs/xilinx_versal_mini_ospi_defconfig | 4 +-- configs/xilinx_versal_mini_qspi_defconfig | 4 +-- configs/xilinx_versal_net_mini_defconfig | 4 +-- configs/xilinx_versal_net_virt_defconfig | 2 +- configs/xilinx_versal_virt_defconfig | 2 +- configs/xilinx_zynq_virt_defconfig | 3 +- configs/xilinx_zynqmp_mini_defconfig | 4 +-- configs/xilinx_zynqmp_mini_emmc0_defconfig | 6 ++-- configs/xilinx_zynqmp_mini_emmc1_defconfig | 6 ++-- configs/xilinx_zynqmp_mini_nand_defconfig | 4 +-- configs/xilinx_zynqmp_mini_nand_single_defconfig | 4 +-- configs/xilinx_zynqmp_mini_qspi_defconfig | 6 ++-- configs/xilinx_zynqmp_virt_defconfig | 4 +-- configs/zynq_cse_nand_defconfig | 2 +- configs/zynq_cse_nor_defconfig | 2 +- configs/zynq_cse_qspi_defconfig | 2 +- 718 files changed, 1572 insertions(+), 1775 deletions(-) diff --git a/configs/LicheePi_Zero_defconfig b/configs/LicheePi_Zero_defconfig index 027edde6a5..009384eaf1 100644 --- a/configs/LicheePi_Zero_defconfig +++ b/configs/LicheePi_Zero_defconfig @@ -5,5 +5,4 @@ CONFIG_SPL=y CONFIG_MACH_SUN8I_V3S=y CONFIG_DRAM_CLK=360 # CONFIG_HAS_ARMV7_SECURE_BASE is not set -CONFIG_SYS_MONITOR_LEN=786432 # CONFIG_NET is not set diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig index e53f2489c5..e6ff4ee494 100644 --- a/configs/SBx81LIFKW_defconfig +++ b/configs/SBx81LIFKW_defconfig @@ -5,6 +5,7 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/alliedtelesis/SBx81LIFKW/kwbimage.cfg" CONFIG_TEXT_BASE=0x00600000 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_SBx81LIFKW=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 @@ -13,8 +14,6 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifkw" CONFIG_IDENT_STRING="\nSBx81LIFKW" CONFIG_SYS_LOAD_ADDR=0x1000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_MONITOR_LEN=262144 CONFIG_BOOTDELAY=3 diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig index 80dbbb11c9..27fddc1354 100644 --- a/configs/SBx81LIFXCAT_defconfig +++ b/configs/SBx81LIFXCAT_defconfig @@ -5,6 +5,7 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/alliedtelesis/SBx81LIFXCAT/kwbimage.cfg" CONFIG_TEXT_BASE=0x00600000 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_SBx81LIFXCAT=y CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xC0000 @@ -13,8 +14,6 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="kirkwood-atl-sbx81lifxcat" CONFIG_IDENT_STRING="\nSBx81LIFXCAT" CONFIG_SYS_LOAD_ADDR=0x1000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_SYS_MONITOR_LEN=262144 CONFIG_BOOTDELAY=3 diff --git a/configs/a3y17lte_defconfig b/configs/a3y17lte_defconfig index 124fb8d476..42fcd2a3d3 100644 --- a/configs/a3y17lte_defconfig +++ b/configs/a3y17lte_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS7=y CONFIG_TARGET_A3Y17LTE=y CONFIG_NR_DRAM_BANKS=8 -CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" -CONFIG_SYS_LOAD_ADDR=0x40001000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200e50 +CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" +CONFIG_SYS_LOAD_ADDR=0x40001000 CONFIG_FIT=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" diff --git a/configs/a5y17lte_defconfig b/configs/a5y17lte_defconfig index ffb0b3f474..3b80536c12 100644 --- a/configs/a5y17lte_defconfig +++ b/configs/a5y17lte_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS7=y CONFIG_TARGET_A5Y17LTE=y CONFIG_NR_DRAM_BANKS=12 -CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" -CONFIG_SYS_LOAD_ADDR=0x40001000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200e50 +CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" +CONFIG_SYS_LOAD_ADDR=0x40001000 CONFIG_FIT=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" diff --git a/configs/a7y17lte_defconfig b/configs/a7y17lte_defconfig index 8c1229d8d5..9390e35057 100644 --- a/configs/a7y17lte_defconfig +++ b/configs/a7y17lte_defconfig @@ -8,10 +8,10 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS7=y CONFIG_TARGET_A7Y17LTE=y CONFIG_NR_DRAM_BANKS=12 -CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" -CONFIG_SYS_LOAD_ADDR=0x40001000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200e50 +CONFIG_DEFAULT_DEVICE_TREE="exynos78x0-axy17lte" +CONFIG_SYS_LOAD_ADDR=0x40001000 CONFIG_FIT=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="echo Read pressed buttons status;KEY_VOLUMEUP=gpa20;KEY_HOME=gpa17;KEY_VOLUMEDOWN=gpa21;KEY_POWER=gpa00;PRESSED=0;RELEASED=1;if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; else setenv VOLUME_UP $RELEASED; fi;if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; else setenv VOLUME_DOWN $RELEASED; fi;if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;" diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index 953cd0700b..5346ba4e42 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -2,14 +2,14 @@ CONFIG_RISCV=y CONFIG_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe80 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SYS_PROMPT="RISC-V # " CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_AE350=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe80 CONFIG_SYS_MONITOR_LEN=786432 CONFIG_FIT=y CONFIG_SYS_MONITOR_BASE=0x88000000 diff --git a/configs/ae350_rv32_xip_defconfig b/configs/ae350_rv32_xip_defconfig index 926632137d..4c0fd164f1 100644 --- a/configs/ae350_rv32_xip_defconfig +++ b/configs/ae350_rv32_xip_defconfig @@ -2,6 +2,8 @@ CONFIG_RISCV=y CONFIG_TEXT_BASE=0x80000000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe80 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_32" CONFIG_SYS_PROMPT="RISC-V # " @@ -9,8 +11,6 @@ CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_AE350=y CONFIG_XIP=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe80 CONFIG_SYS_MONITOR_LEN=786432 CONFIG_FIT=y CONFIG_SYS_MONITOR_BASE=0x88000000 diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 3c18562ad4..f92587883a 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -2,6 +2,8 @@ CONFIG_RISCV=y CONFIG_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffd70 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SYS_PROMPT="RISC-V # " @@ -9,8 +11,6 @@ CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_TARGET_AE350=y CONFIG_ARCH_RV64I=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffd70 CONFIG_FIT=y CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 diff --git a/configs/ae350_rv64_xip_defconfig b/configs/ae350_rv64_xip_defconfig index 0d467b9836..49c4f80ba9 100644 --- a/configs/ae350_rv64_xip_defconfig +++ b/configs/ae350_rv64_xip_defconfig @@ -2,6 +2,8 @@ CONFIG_RISCV=y CONFIG_TEXT_BASE=0x80000000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffd70 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="ae350_64" CONFIG_SYS_PROMPT="RISC-V # " @@ -10,8 +12,6 @@ CONFIG_TARGET_AE350=y CONFIG_ARCH_RV64I=y CONFIG_XIP=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffd70 CONFIG_FIT=y CONFIG_SYS_MONITOR_BASE=0x88000000 CONFIG_BOOTDELAY=3 diff --git a/configs/alt_defconfig b/configs/alt_defconfig index d28cdf4b36..5852a34fc1 100644 --- a/configs/alt_defconfig +++ b/configs/alt_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -20,14 +22,13 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Alt" CONFIG_R8A7794=y CONFIG_TARGET_ALT=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_FIT=y CONFIG_BOOTDELAY=3 @@ -36,7 +37,6 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/am335x_baltos_defconfig b/configs/am335x_baltos_defconfig index 9976cee81f..4fe899b894 100644 --- a/configs/am335x_baltos_defconfig +++ b/configs/am335x_baltos_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_DEFAULT_DEVICE_TREE="am335x-baltos" CONFIG_AM33XX=y CONFIG_TARGET_AM335X_BALTOS=y @@ -12,8 +14,6 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run usbboot;run mmcboot;setenv mmcdev 1; setenv bootpart 1:2; run mmcboot;run nandboot;" diff --git a/configs/am335x_boneblack_vboot_defconfig b/configs/am335x_boneblack_vboot_defconfig index 442783a9d0..3ce633ab33 100644 --- a/configs/am335x_boneblack_vboot_defconfig +++ b/configs/am335x_boneblack_vboot_defconfig @@ -4,14 +4,14 @@ CONFIG_ARCH_CPU_INIT=y # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_DEFAULT_DEVICE_TREE="am335x-boneblack" CONFIG_AM33XX=y CONFIG_CLOCK_SYNTHESIZER=y CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/am335x_evm_spiboot_defconfig b/configs/am335x_evm_spiboot_defconfig index 335a43d87b..9a9f2be5ea 100644 --- a/configs/am335x_evm_spiboot_defconfig +++ b/configs/am335x_evm_spiboot_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" @@ -12,8 +14,6 @@ CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SPL_LOAD_FIT=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/am335x_guardian_defconfig b/configs/am335x_guardian_defconfig index 0feac53c35..d463fb9e81 100644 --- a/configs/am335x_guardian_defconfig +++ b/configs/am335x_guardian_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030fef0 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x500000 CONFIG_DEFAULT_DEVICE_TREE="am335x-guardian" @@ -21,8 +23,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x81000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030fef0 CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=0 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_hs_evm_defconfig b/configs/am335x_hs_evm_defconfig index 5dc9ba98fd..9c0d45fb65 100644 --- a/configs/am335x_hs_evm_defconfig +++ b/configs/am335x_hs_evm_defconfig @@ -3,17 +3,16 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_SPL_TEXT_BASE=0x40300350 CONFIG_AM33XX=y CONFIG_CLOCK_SYNTHESIZER=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_bootcmd" CONFIG_LOGLEVEL=3 diff --git a/configs/am335x_hs_evm_uart_defconfig b/configs/am335x_hs_evm_uart_defconfig index 68513c1b6a..de2af4e0be 100644 --- a/configs/am335x_hs_evm_uart_defconfig +++ b/configs/am335x_hs_evm_uart_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_DEFAULT_DEVICE_TREE="am335x-evm" CONFIG_SPL_TEXT_BASE=0x40301950 CONFIG_AM33XX=y @@ -12,11 +14,8 @@ CONFIG_SPL=y # CONFIG_SPL_FS_FAT is not set # CONFIG_SPL_LIBDISK_SUPPORT is not set CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run init_console; run finduuid; run distro_bootcmd" CONFIG_LOGLEVEL=3 diff --git a/configs/am335x_igep003x_defconfig b/configs/am335x_igep003x_defconfig index 6da31d9e7f..a65edb5a0e 100644 --- a/configs/am335x_igep003x_defconfig +++ b/configs/am335x_igep003x_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x18000 CONFIG_DEFAULT_DEVICE_TREE="am335x-base0033" CONFIG_AM33XX=y @@ -14,8 +16,6 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt;run mmcboot;run nandboot;run netboot;" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/am335x_pdu001_defconfig b/configs/am335x_pdu001_defconfig index 9757057b85..e68efde33b 100644 --- a/configs/am335x_pdu001_defconfig +++ b/configs/am335x_pdu001_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x1200 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="am335x-pdu001" @@ -16,8 +18,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_LOCALVERSION="-EETS-1.0.0" CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=1 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" diff --git a/configs/am335x_shc_defconfig b/configs/am335x_shc_defconfig index 5a6db3ce6a..7831c6589b 100644 --- a/configs/am335x_shc_defconfig +++ b/configs/am335x_shc_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" @@ -18,8 +20,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_ict_defconfig b/configs/am335x_shc_ict_defconfig index aa55a7a61e..f902ce7cff 100644 --- a/configs/am335x_shc_ict_defconfig +++ b/configs/am335x_shc_ict_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" @@ -19,8 +21,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_ICT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_netboot_defconfig b/configs/am335x_shc_netboot_defconfig index cb73b104d2..af6fed4e41 100644 --- a/configs/am335x_shc_netboot_defconfig +++ b/configs/am335x_shc_netboot_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" @@ -19,8 +21,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_NETBOOT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_shc_sdboot_defconfig b/configs/am335x_shc_sdboot_defconfig index f28e6e6b16..85b50d0309 100644 --- a/configs/am335x_shc_sdboot_defconfig +++ b/configs/am335x_shc_sdboot_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="am335x-shc" @@ -19,8 +21,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SHC_SDBOOT=y CONFIG_SERIES=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_SHOW_BOOT_PROGRESS=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/am335x_sl50_defconfig b/configs/am335x_sl50_defconfig index 673824cfec..7632a82833 100644 --- a/configs/am335x_sl50_defconfig +++ b/configs/am335x_sl50_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="am335x-sl50" CONFIG_AM33XX=y @@ -15,8 +17,6 @@ CONFIG_ENV_OFFSET_REDUND=0x20000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_TIMESTAMP=y CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Press SPACE to abort autoboot in %d seconds\n" diff --git a/configs/am3517_evm_defconfig b/configs/am3517_evm_defconfig index 0839d366cf..e8dc968882 100644 --- a/configs/am3517_evm_defconfig +++ b/configs/am3517_evm_defconfig @@ -6,6 +6,8 @@ CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="am3517-evm" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_AM3517_EVM=y @@ -15,8 +17,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x2500 CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_BOOTDELAY=10 CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then echo SD/MMC found on device $mmcdev; if run loadbootenv; then run importbootenv; fi; echo Checking if uenvcmd is set ...; if test -n $uenvcmd; then echo Running uenvcmd ...; run uenvcmd; fi; echo Running default loadimage ...; setenv bootfile zImage; if run loadimage; then run loadfdt; run mmcboot; fi; else run nandboot; fi" diff --git a/configs/am43xx_evm_defconfig b/configs/am43xx_evm_defconfig index 2faf1322f9..37c5559855 100644 --- a/configs/am43xx_evm_defconfig +++ b/configs/am43xx_evm_defconfig @@ -3,6 +3,8 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" @@ -10,10 +12,7 @@ CONFIG_AM43XX=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set diff --git a/configs/am43xx_evm_qspiboot_defconfig b/configs/am43xx_evm_qspiboot_defconfig index 9c90924020..ab02b49de5 100644 --- a/configs/am43xx_evm_qspiboot_defconfig +++ b/configs/am43xx_evm_qspiboot_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TEXT_BASE=0x30000000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x110000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -12,8 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="am437x-sk-evm" CONFIG_AM43XX=y CONFIG_ENV_OFFSET_REDUND=0x120000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_QSPI_BOOT=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/am43xx_evm_rtconly_defconfig b/configs/am43xx_evm_rtconly_defconfig index 4241070930..aad75f0115 100644 --- a/configs/am43xx_evm_rtconly_defconfig +++ b/configs/am43xx_evm_rtconly_defconfig @@ -3,6 +3,8 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" @@ -10,10 +12,7 @@ CONFIG_AM43XX=y CONFIG_SPL_RTC_DDR_SUPPORT=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set diff --git a/configs/am43xx_evm_usbhost_boot_defconfig b/configs/am43xx_evm_usbhost_boot_defconfig index 91270d032b..5f4e8cefa4 100644 --- a/configs/am43xx_evm_usbhost_boot_defconfig +++ b/configs/am43xx_evm_usbhost_boot_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" @@ -9,10 +11,7 @@ CONFIG_SPL_TEXT_BASE=0x40300350 CONFIG_AM43XX=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y # CONFIG_MISC_INIT_R is not set diff --git a/configs/am43xx_hs_evm_defconfig b/configs/am43xx_hs_evm_defconfig index b6b74af735..34c175ee8b 100644 --- a/configs/am43xx_hs_evm_defconfig +++ b/configs/am43xx_hs_evm_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="am437x-gp-evm" @@ -15,10 +17,7 @@ CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/am43xx_hs_evm_qspi_defconfig b/configs/am43xx_hs_evm_qspi_defconfig index 03e46dde0f..2a0859bcd0 100644 --- a/configs/am43xx_hs_evm_qspi_defconfig +++ b/configs/am43xx_hs_evm_qspi_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y # CONFIG_SYS_THUMB_BUILD is not set CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x110000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -14,8 +16,6 @@ CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000 CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000 CONFIG_ENV_OFFSET_REDUND=0x120000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_QSPI_BOOT=y CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/am57xx_evm_defconfig b/configs/am57xx_evm_defconfig index 03f799506e..f2e82419b8 100644 --- a/configs/am57xx_evm_defconfig +++ b/configs/am57xx_evm_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am572x-idk" @@ -15,10 +17,7 @@ CONFIG_SPL_SPI=y CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=beagle_x15board" diff --git a/configs/am57xx_hs_evm_defconfig b/configs/am57xx_hs_evm_defconfig index 86bcfe85ae..3bef7297de 100644 --- a/configs/am57xx_hs_evm_defconfig +++ b/configs/am57xx_hs_evm_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am572x-idk" @@ -18,10 +20,7 @@ CONFIG_SPL_SPI=y CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=beagle_x15board" diff --git a/configs/am57xx_hs_evm_usb_defconfig b/configs/am57xx_hs_evm_usb_defconfig index eedbfd0d86..65b4c4b33f 100644 --- a/configs/am57xx_hs_evm_usb_defconfig +++ b/configs/am57xx_hs_evm_usb_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_TI_SECURE_DEVICE=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am57xx-beagle-x15" @@ -19,11 +21,8 @@ CONFIG_SPL_SPI=y CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037ff00 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=beagle_x15board" diff --git a/configs/am62ax_evm_a53_defconfig b/configs/am62ax_evm_a53_defconfig index 6e97fd4060..8d6428f22e 100644 --- a/configs/am62ax_evm_a53_defconfig +++ b/configs/am62ax_evm_a53_defconfig @@ -7,16 +7,17 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM62A7=y CONFIG_K3_ATF_LOAD_ADDR=0x9e780000 CONFIG_TARGET_AM62A7_A53_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_DEFAULT_DEVICE_TREE="k3-am62a7-sk" CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 @@ -63,7 +64,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/am62ax_evm_r5_defconfig b/configs/am62ax_evm_r5_defconfig index 0e48f0afa2..fac48fbd12 100644 --- a/configs/am62ax_evm_r5_defconfig +++ b/configs/am62ax_evm_r5_defconfig @@ -5,11 +5,14 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SOC_K3_AM62A7=y CONFIG_TARGET_AM62A7_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am62a7-r5-sk" CONFIG_SPL_TEXT_BASE=0x43c00000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x82000000 @@ -18,8 +21,6 @@ CONFIG_SPL_SIZE_LIMIT=0x3A7F0 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x3500 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43c3a7f0 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y @@ -97,7 +98,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_TI_POWER_DOMAIN=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y diff --git a/configs/am62x_evm_a53_defconfig b/configs/am62x_evm_a53_defconfig index 273db2edbf..585bac4390 100644 --- a/configs/am62x_evm_a53_defconfig +++ b/configs/am62x_evm_a53_defconfig @@ -7,9 +7,12 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM625=y CONFIG_K3_ATF_LOAD_ADDR=0x9e780000 CONFIG_TARGET_AM625_A53_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am625-sk" CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x82000000 @@ -18,8 +21,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 @@ -85,7 +86,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/am62x_evm_r5_defconfig b/configs/am62x_evm_r5_defconfig index 7350882a36..4f9ecf2661 100644 --- a/configs/am62x_evm_r5_defconfig +++ b/configs/am62x_evm_r5_defconfig @@ -7,11 +7,14 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM625=y CONFIG_TARGET_AM625_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7000ffff CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am625-r5-sk" CONFIG_SPL_TEXT_BASE=0x43c00000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -21,8 +24,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7000ffff CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y @@ -104,7 +105,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_TI_POWER_DOMAIN=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y diff --git a/configs/am64x_evm_a53_defconfig b/configs/am64x_evm_a53_defconfig index 88776a0004..f40285b1d4 100644 --- a/configs/am64x_evm_a53_defconfig +++ b/configs/am64x_evm_a53_defconfig @@ -10,12 +10,15 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM642=y CONFIG_K3_ATF_LOAD_ADDR=0x701c0000 CONFIG_TARGET_AM642_A53_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am642-evm" CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -25,8 +28,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 @@ -137,7 +138,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_TPS65219=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/am64x_evm_r5_defconfig b/configs/am64x_evm_r5_defconfig index ee3a8a4ae1..b75cae6d80 100644 --- a/configs/am64x_evm_r5_defconfig +++ b/configs/am64x_evm_r5_defconfig @@ -8,12 +8,15 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM642=y CONFIG_TARGET_AM642_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7019b800 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am642-r5-evm" CONFIG_SPL_TEXT_BASE=0x70000000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -24,8 +27,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7019b800 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_USE_BOOTCOMMAND=y @@ -142,7 +143,6 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_DM_REGULATOR_GPIO=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y diff --git a/configs/am65x_evm_a53_defconfig b/configs/am65x_evm_a53_defconfig index ad46a74d1f..00ccc18143 100644 --- a/configs/am65x_evm_a53_defconfig +++ b/configs/am65x_evm_a53_defconfig @@ -8,12 +8,15 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM654=y CONFIG_TARGET_AM654_A53_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board" CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -25,12 +28,9 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 @@ -151,7 +151,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_REMOTEPROC_TI_K3_R5F=y CONFIG_REMOTEPROC_TI_PRU=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/am65x_evm_r5_defconfig b/configs/am65x_evm_r5_defconfig index 45f50b6ae8..d5196c2024 100644 --- a/configs/am65x_evm_r5_defconfig +++ b/configs/am65x_evm_r5_defconfig @@ -9,11 +9,14 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM654=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -24,11 +27,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y @@ -125,7 +125,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/am65x_evm_r5_usbdfu_defconfig b/configs/am65x_evm_r5_usbdfu_defconfig index 5d1cacd1b2..8b0192579c 100644 --- a/configs/am65x_evm_r5_usbdfu_defconfig +++ b/configs/am65x_evm_r5_usbdfu_defconfig @@ -9,10 +9,13 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM654=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 @@ -20,8 +23,6 @@ CONFIG_SPL_SIZE_LIMIT=0x7ec00 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 @@ -111,7 +112,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SYSRESET=y diff --git a/configs/am65x_evm_r5_usbmsc_defconfig b/configs/am65x_evm_r5_usbmsc_defconfig index c991eb6d61..01e46e6a62 100644 --- a/configs/am65x_evm_r5_usbmsc_defconfig +++ b/configs/am65x_evm_r5_usbmsc_defconfig @@ -9,10 +9,13 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM654=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 @@ -20,8 +23,6 @@ CONFIG_SPL_SIZE_LIMIT=0x7ec00 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x2000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_USE_BOOTCOMMAND=y @@ -108,7 +109,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SYSRESET=y diff --git a/configs/am65x_hs_evm_a53_defconfig b/configs/am65x_hs_evm_a53_defconfig index 79182a77f3..758599b8ff 100644 --- a/configs/am65x_hs_evm_a53_defconfig +++ b/configs/am65x_hs_evm_a53_defconfig @@ -9,12 +9,15 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM654=y CONFIG_TARGET_AM654_A53_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am654-base-board" CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -26,11 +29,8 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_fit_${boot}; run get_overlaystring; run run_fit" CONFIG_LOGLEVEL=7 @@ -133,7 +133,6 @@ CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y CONFIG_REMOTEPROC_TI_K3_R5F=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/am65x_hs_evm_r5_defconfig b/configs/am65x_hs_evm_r5_defconfig index cbd702c3ed..0c7b53ca2c 100644 --- a/configs/am65x_hs_evm_r5_defconfig +++ b/configs/am65x_hs_evm_r5_defconfig @@ -10,11 +10,14 @@ CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM654=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_AM654_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am654-r5-base-board" CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -23,11 +26,8 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c7effc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0x58000 @@ -118,7 +118,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/ap121_defconfig b/configs/ap121_defconfig index 77d2d1f3c1..030eee2469 100644 --- a/configs/ap121_defconfig +++ b/configs/ap121_defconfig @@ -1,6 +1,8 @@ CONFIG_MIPS=y CONFIG_TEXT_BASE=0x9F000000 CONFIG_SYS_MALLOC_LEN=0x40000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd007fff CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -15,8 +17,6 @@ CONFIG_SYS_MIPS_TIMER_FREQ=200000000 CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x80100000 CONFIG_SYS_MEMTEST_END=0x83f00000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd007fff CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" diff --git a/configs/ap143_defconfig b/configs/ap143_defconfig index 96a86b6ddc..817cd858b0 100644 --- a/configs/ap143_defconfig +++ b/configs/ap143_defconfig @@ -2,6 +2,8 @@ CONFIG_MIPS=y CONFIG_TEXT_BASE=0x9F000000 CONFIG_SYS_MALLOC_LEN=0x40000 CONFIG_SYS_MALLOC_F_LEN=0x800 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd001fff CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -17,8 +19,6 @@ CONFIG_SYS_MIPS_TIMER_FREQ=325000000 CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x80100000 CONFIG_SYS_MEMTEST_END=0x83f00000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd001fff CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" diff --git a/configs/ap152_defconfig b/configs/ap152_defconfig index a2e547ecf4..0bcd388405 100644 --- a/configs/ap152_defconfig +++ b/configs/ap152_defconfig @@ -2,6 +2,8 @@ CONFIG_MIPS=y CONFIG_TEXT_BASE=0x9F000000 CONFIG_SYS_MALLOC_LEN=0x40000 CONFIG_SYS_MALLOC_F_LEN=0x800 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd001fff CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -17,8 +19,6 @@ CONFIG_SYS_MIPS_TIMER_FREQ=375000000 CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x80100000 CONFIG_SYS_MEMTEST_END=0x83f00000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd001fff CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" diff --git a/configs/apalis-imx8_defconfig b/configs/apalis-imx8_defconfig index 55f9e76dff..901b15dc2d 100644 --- a/configs/apalis-imx8_defconfig +++ b/configs/apalis-imx8_defconfig @@ -4,6 +4,8 @@ CONFIG_TEXT_BASE=0x80020000 CONFIG_SYS_MALLOC_LEN=0x2800000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y @@ -16,8 +18,6 @@ CONFIG_SYS_LOAD_ADDR=0x95400000 CONFIG_SYS_MEMTEST_START=0x88000000 CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -54,14 +54,14 @@ CONFIG_VERSION_VARIABLE=y CONFIG_IP_DEFRAG=y CONFIG_TFTP_BLOCKSIZE=4096 CONFIG_TFTP_TSIZE=y -CONFIG_BOOTCOUNT_LIMIT=y -CONFIG_BOOTCOUNT_ENV=y CONFIG_USE_IPADDR=y CONFIG_IPADDR="192.168.10.2" CONFIG_USE_NETMASK=y CONFIG_NETMASK="255.255.255.0" CONFIG_USE_SERVERIP=y CONFIG_SERVERIP="192.168.10.1" +CONFIG_BOOTCOUNT_LIMIT=y +CONFIG_BOOTCOUNT_ENV=y CONFIG_CLK_IMX8=y CONFIG_CPU=y CONFIG_MXC_GPIO=y diff --git a/configs/apalis-tk1_defconfig b/configs/apalis-tk1_defconfig index 54b781b9c9..e23a31e07b 100644 --- a/configs/apalis-tk1_defconfig +++ b/configs/apalis-tk1_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DEFAULT_DEVICE_TREE="tegra124-apalis" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Apalis TK1 # " +CONFIG_SPL_STACK=0x800ffffc CONFIG_TEGRA124=y CONFIG_TARGET_APALIS_TK1=y CONFIG_TEGRA_GPU=y @@ -26,7 +27,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 diff --git a/configs/apalis_t30_defconfig b/configs/apalis_t30_defconfig index 587af46918..5a765ad605 100644 --- a/configs/apalis_t30_defconfig +++ b/configs/apalis_t30_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DEFAULT_DEVICE_TREE="tegra30-apalis" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Apalis T30 # " +CONFIG_SPL_STACK=0x800ffffc CONFIG_TEGRA30=y CONFIG_TARGET_APALIS_T30=y CONFIG_SYS_LOAD_ADDR=0x81000000 @@ -21,7 +22,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 diff --git a/configs/arbel_evb_defconfig b/configs/arbel_evb_defconfig index 8f8a603b50..29c4c187b5 100644 --- a/configs/arbel_evb_defconfig +++ b/configs/arbel_evb_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="nuvoton-npcm845-evb" CONFIG_SYS_PROMPT="U-Boot>" +CONFIG_DM_RESET=y # CONFIG_PSCI_RESET is not set CONFIG_ARCH_NPCM8XX=y CONFIG_TARGET_ARBEL_EVB=y @@ -21,6 +22,7 @@ CONFIG_BOOTCOMMAND="run common_bootargs; run romboot" CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 CONFIG_SYS_BOOTM_LEN=0x1400000 +CONFIG_CMD_FUSE=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y @@ -30,16 +32,20 @@ CONFIG_CMD_DHCP=y CONFIG_CMD_MII=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y +CONFIG_CMD_RNG=y CONFIG_CMD_UUID=y +CONFIG_CMD_HASH=y CONFIG_CMD_FAT=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y +CONFIG_NPCM_AES=y +CONFIG_NPCM_SHA=y CONFIG_NPCM_GPIO=y CONFIG_DM_I2C=y -CONFIG_NPCM_I2C=y # CONFIG_INPUT is not set +CONFIG_MISC=y CONFIG_NPCM_HOST=y CONFIG_MMC_SDHCI=y CONFIG_MMC_SDHCI_NPCM=y @@ -56,8 +62,11 @@ CONFIG_PHY_NPCM_USB=y CONFIG_PINCTRL=y CONFIG_PINCONF=y CONFIG_PINCTRL_NPCM8XX=y -CONFIG_DM_RESET=y +CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_NPCM8XX=y CONFIG_RESET_SYSCON=y +CONFIG_DM_RNG=y +CONFIG_RNG_NPCM=y CONFIG_DM_SERIAL=y CONFIG_NPCM_SERIAL=y CONFIG_SPI=y @@ -74,21 +83,6 @@ CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_GENERIC=y CONFIG_USB_OHCI_NPCM=y CONFIG_USB_STORAGE=y -# CONFIG_EFI_LOADER is not set -CONFIG_NET=y -CONFIG_NETDEVICES=y -CONFIG_DM_ETH=y -CONFIG_MISC=y -CONFIG_SHA_HW_ACCEL=y -CONFIG_NPCM_SHA=y -CONFIG_RNG_NPCM=y CONFIG_LIB_HW_RAND=y -CONFIG_DM_RNG=y -# CONFIG_AES is not set -CONFIG_CMD_RNG=y -CONFIG_CMD_FUSE=y -CONFIG_CMD_HASH=y -CONFIG_NPCM_AES=y -CONFIG_NPCM_OTP=y -CONFIG_DM_REGULATOR=y -CONFIG_DM_REGULATOR_NPCM8XX=y +CONFIG_SHA_HW_ACCEL=y +# CONFIG_EFI_LOADER is not set diff --git a/configs/aristainetos2c_defconfig b/configs/aristainetos2c_defconfig index d7ac130179..bd7947b46b 100644 --- a/configs/aristainetos2c_defconfig +++ b/configs/aristainetos2c_defconfig @@ -63,7 +63,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_EARLY=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_ENV_APPEND=y CONFIG_ENV_WRITEABLE_LIST=y CONFIG_ENV_ACCESS_IGNORE_FORCE=y CONFIG_USE_ETHPRIME=y diff --git a/configs/aristainetos2ccslb_defconfig b/configs/aristainetos2ccslb_defconfig index 562eb10453..3fb6e71c67 100644 --- a/configs/aristainetos2ccslb_defconfig +++ b/configs/aristainetos2ccslb_defconfig @@ -63,7 +63,6 @@ CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_ENV_SPI_EARLY=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_ENV_APPEND=y CONFIG_ENV_WRITEABLE_LIST=y CONFIG_ENV_ACCESS_IGNORE_FORCE=y CONFIG_USE_ETHPRIME=y diff --git a/configs/arndale_defconfig b/configs/arndale_defconfig index 30c695001f..fe2b01ea72 100644 --- a/configs/arndale_defconfig +++ b/configs/arndale_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_ARNDALE=y CONFIG_NR_DRAM_BANKS=8 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x86200 CONFIG_DEFAULT_DEVICE_TREE="exynos5250-arndale" @@ -18,8 +20,6 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for ARNDALE" CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_USE_PREBOOT=y diff --git a/configs/at91sam9m10g45ek_mmc_defconfig b/configs/at91sam9m10g45ek_mmc_defconfig index 19297bea96..d7d3d60b30 100644 --- a/configs/at91sam9m10g45ek_mmc_defconfig +++ b/configs/at91sam9m10g45ek_mmc_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x2c000 CONFIG_TARGET_AT91SAM9M10G45EK=y CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70003f00 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" @@ -15,8 +17,6 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70003f00 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9m10g45ek_nandflash_defconfig b/configs/at91sam9m10g45ek_nandflash_defconfig index 661f656119..f3fb8fa465 100644 --- a/configs/at91sam9m10g45ek_nandflash_defconfig +++ b/configs/at91sam9m10g45ek_nandflash_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_TARGET_AT91SAM9M10G45EK=y CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70003f00 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_SYS_PROMPT="U-Boot> " @@ -15,8 +17,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70003f00 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9n12ek_mmc_defconfig b/configs/at91sam9n12ek_mmc_defconfig index 9ecf42f560..60b18109b3 100644 --- a/configs/at91sam9n12ek_mmc_defconfig +++ b/configs/at91sam9n12ek_mmc_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_AT91=y CONFIG_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" @@ -13,8 +15,6 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9n12ek_nandflash_defconfig b/configs/at91sam9n12ek_nandflash_defconfig index a2c0616d14..c84f7479d5 100644 --- a/configs/at91sam9n12ek_nandflash_defconfig +++ b/configs/at91sam9n12ek_nandflash_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_AT91=y CONFIG_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9n12ek" CONFIG_SYS_PROMPT="U-Boot> " @@ -13,8 +15,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9n12ek_spiflash_defconfig b/configs/at91sam9n12ek_spiflash_defconfig index 372b8ab359..abe8e23a45 100644 --- a/configs/at91sam9n12ek_spiflash_defconfig +++ b/configs/at91sam9n12ek_spiflash_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_AT91=y CONFIG_TEXT_BASE=0x26f00000 CONFIG_TARGET_AT91SAM9N12EK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00 CONFIG_ENV_SIZE=0x3000 CONFIG_ENV_OFFSET=0x5000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -15,8 +17,6 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x303f00 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9x5ek_dataflash_defconfig b/configs/at91sam9x5ek_dataflash_defconfig index cab2dcbfc8..d213c02b4a 100644 --- a/configs/at91sam9x5ek_dataflash_defconfig +++ b/configs/at91sam9x5ek_dataflash_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x81000 CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_ENV_SIZE=0x4200 CONFIG_ENV_OFFSET=0x4200 CONFIG_ENV_SECT_SIZE=0x210 @@ -17,8 +19,6 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/at91sam9x5ek_mmc_defconfig b/configs/at91sam9x5ek_mmc_defconfig index b9d724633d..5e5628f945 100644 --- a/configs/at91sam9x5ek_mmc_defconfig +++ b/configs/at91sam9x5ek_mmc_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x81000 CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" @@ -15,8 +17,6 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/at91sam9x5ek_nandflash_defconfig b/configs/at91sam9x5ek_nandflash_defconfig index 728a72cfc4..f73a65f849 100644 --- a/configs/at91sam9x5ek_nandflash_defconfig +++ b/configs/at91sam9x5ek_nandflash_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x81000 CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g35ek" CONFIG_SYS_PROMPT="U-Boot> " @@ -15,8 +17,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_NAND_BOOT=y diff --git a/configs/at91sam9x5ek_spiflash_defconfig b/configs/at91sam9x5ek_spiflash_defconfig index 53417bcd17..4c4e2fc4c3 100644 --- a/configs/at91sam9x5ek_spiflash_defconfig +++ b/configs/at91sam9x5ek_spiflash_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x81000 CONFIG_TARGET_AT91SAM9X5EK=y CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_ENV_SIZE=0x3000 CONFIG_ENV_OFFSET=0x5000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -17,8 +19,6 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SPI_BOOT=y diff --git a/configs/axm_defconfig b/configs/axm_defconfig index b3e011324e..5eeeb0828b 100644 --- a/configs/axm_defconfig +++ b/configs/axm_defconfig @@ -21,6 +21,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SPL_STACK=0x304000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfffff200 @@ -44,7 +45,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x600 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x304000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x20ba0000 diff --git a/configs/axs101_defconfig b/configs/axs101_defconfig index 85a70c0996..22031f0c2d 100644 --- a/configs/axs101_defconfig +++ b/configs/axs101_defconfig @@ -3,6 +3,8 @@ CONFIG_TARGET_AXS101=y CONFIG_TEXT_BASE=0x81000000 CONFIG_SYS_MALLOC_LEN=0x0200000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="axs101" CONFIG_SYS_PROMPT="AXS# " @@ -11,8 +13,6 @@ CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=750000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS3,115200n8" diff --git a/configs/axs103_defconfig b/configs/axs103_defconfig index 00d43e24c5..0757ddf5ac 100644 --- a/configs/axs103_defconfig +++ b/configs/axs103_defconfig @@ -3,6 +3,8 @@ CONFIG_ISA_ARCV2=y CONFIG_TEXT_BASE=0x81000000 CONFIG_SYS_MALLOC_LEN=0x0200000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="axs103" CONFIG_SYS_PROMPT="AXS# " @@ -11,8 +13,6 @@ CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=100000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS3,115200n8" diff --git a/configs/bananapi-m5_defconfig b/configs/bananapi-m5_defconfig index cb6eca770b..94b27d566f 100644 --- a/configs/bananapi-m5_defconfig +++ b/configs/bananapi-m5_defconfig @@ -2,17 +2,18 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-bananapi-m5" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING="bpi-m5" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -44,7 +45,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/bcm947622_defconfig b/configs/bcm947622_defconfig index c9811467b5..38d35d467e 100644 --- a/configs/bcm947622_defconfig +++ b/configs/bcm947622_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM47622=y CONFIG_TARGET_BCM947622=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm947622" CONFIG_IDENT_STRING=" Broadcom BCM47622" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm94908_defconfig b/configs/bcm94908_defconfig index 7db63b22f6..29b858e956 100644 --- a/configs/bcm94908_defconfig +++ b/configs/bcm94908_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM4908=y CONFIG_TARGET_BCM94908=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm94908" CONFIG_IDENT_STRING=" Broadcom BCM4908" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm94912_defconfig b/configs/bcm94912_defconfig index 97aa9406be..950fc7a6a3 100644 --- a/configs/bcm94912_defconfig +++ b/configs/bcm94912_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM4912=y CONFIG_TARGET_BCM94912=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm94912" CONFIG_IDENT_STRING=" Broadcom BCM4912" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm963138_defconfig b/configs/bcm963138_defconfig index abd9d1a4bf..5a4b27d877 100644 --- a/configs/bcm963138_defconfig +++ b/configs/bcm963138_defconfig @@ -6,12 +6,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM63138=y CONFIG_TARGET_BCM963138=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm963138" CONFIG_IDENT_STRING=" Broadcom BCM63138" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm963146_defconfig b/configs/bcm963146_defconfig index 64fa623c60..2f1fd89b24 100644 --- a/configs/bcm963146_defconfig +++ b/configs/bcm963146_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM63146=y CONFIG_TARGET_BCM963146=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm963146" CONFIG_IDENT_STRING=" Broadcom BCM63146" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm963148_defconfig b/configs/bcm963148_defconfig index b7811593eb..78e51dce8a 100644 --- a/configs/bcm963148_defconfig +++ b/configs/bcm963148_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM63148=y CONFIG_TARGET_BCM963148=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm963148" CONFIG_IDENT_STRING=" Broadcom BCM63148" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm963158_defconfig b/configs/bcm963158_defconfig index b4a232f12c..adbf86c853 100644 --- a/configs/bcm963158_defconfig +++ b/configs/bcm963158_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM63158=y CONFIG_TARGET_BCM963158=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm963158" CONFIG_IDENT_STRING=" Broadcom BCM63158" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm963178_defconfig b/configs/bcm963178_defconfig index 2f189c45c5..8b378fd030 100644 --- a/configs/bcm963178_defconfig +++ b/configs/bcm963178_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM63178=y CONFIG_TARGET_BCM963178=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm963178" CONFIG_IDENT_STRING=" Broadcom BCM63178" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm96756_defconfig b/configs/bcm96756_defconfig index 8d584e5eca..da24e26b07 100644 --- a/configs/bcm96756_defconfig +++ b/configs/bcm96756_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM6756=y CONFIG_TARGET_BCM96756=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm96756" CONFIG_IDENT_STRING=" Broadcom BCM6756" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm96813_defconfig b/configs/bcm96813_defconfig index 589928f449..8baff9ca9e 100644 --- a/configs/bcm96813_defconfig +++ b/configs/bcm96813_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM6813=y CONFIG_TARGET_BCM96813=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm96813" CONFIG_IDENT_STRING=" Broadcom BCM6813" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm968380gerg_ram_defconfig b/configs/bcm968380gerg_ram_defconfig index f0a13175da..4a4160da47 100644 --- a/configs/bcm968380gerg_ram_defconfig +++ b/configs/bcm968380gerg_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="brcm,bcm968380gerg" CONFIG_SYS_PROMPT="bcm968380gerg # " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6838=y @@ -59,7 +60,6 @@ CONFIG_BCM6368_USBH_PHY=y CONFIG_PINCTRL=y CONFIG_POWER_DOMAIN=y CONFIG_BCM6328_POWER_DOMAIN=y -CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y CONFIG_BCM6345_SERIAL=y diff --git a/configs/bcm96846_defconfig b/configs/bcm96846_defconfig index a2368fb496..9a9674750c 100644 --- a/configs/bcm96846_defconfig +++ b/configs/bcm96846_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM6846=y CONFIG_TARGET_BCM96846=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm96846" CONFIG_IDENT_STRING=" Broadcom BCM6846" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm96855_defconfig b/configs/bcm96855_defconfig index 3df6545013..54c35ee8fd 100644 --- a/configs/bcm96855_defconfig +++ b/configs/bcm96855_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM6855=y CONFIG_TARGET_BCM96855=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm96855" CONFIG_IDENT_STRING=" Broadcom BCM6855" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm96856_defconfig b/configs/bcm96856_defconfig index 11a1778190..16d57f26fd 100644 --- a/configs/bcm96856_defconfig +++ b/configs/bcm96856_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM6856=y CONFIG_TARGET_BCM96856=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm96856" CONFIG_IDENT_STRING=" Broadcom BCM6856" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm96858_defconfig b/configs/bcm96858_defconfig index c4d697f4cf..333aa87d9f 100644 --- a/configs/bcm96858_defconfig +++ b/configs/bcm96858_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM6858=y CONFIG_TARGET_BCM96858=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm96858" CONFIG_IDENT_STRING=" Broadcom BCM6858" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm96878_defconfig b/configs/bcm96878_defconfig index 6bd2ed531b..ea0d02e087 100644 --- a/configs/bcm96878_defconfig +++ b/configs/bcm96878_defconfig @@ -7,12 +7,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_BCM6878=y CONFIG_TARGET_BCM96878=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_DEFAULT_DEVICE_TREE="bcm96878" CONFIG_IDENT_STRING=" Broadcom BCM6878" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_HUSH_PARSER=y diff --git a/configs/bcm_ns3_defconfig b/configs/bcm_ns3_defconfig index 956e797e43..40b3d89ab1 100644 --- a/configs/bcm_ns3_defconfig +++ b/configs/bcm_ns3_defconfig @@ -5,12 +5,12 @@ CONFIG_TEXT_BASE=0xFF000000 CONFIG_SYS_MALLOC_LEN=0xc00000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x0 CONFIG_ENV_SIZE=0x80000 CONFIG_DEFAULT_DEVICE_TREE="ns3-board" CONFIG_SYS_PROMPT="u-boot> " CONFIG_SYS_LOAD_ADDR=0x80080000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x0 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_SIGNATURE_MAX_SIZE=0x20000000 diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index 0967367e6a..94baba45c7 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra30-beaver" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Tegra30 (Beaver) # " +CONFIG_SPL_STACK=0x800ffffc CONFIG_TEGRA30=y CONFIG_TARGET_BEAVER=y CONFIG_SYS_LOAD_ADDR=0x81000000 @@ -19,7 +20,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 diff --git a/configs/beelink-gsking-x_defconfig b/configs/beelink-gsking-x_defconfig index 3e06002c5c..bcae9fe6e5 100644 --- a/configs/beelink-gsking-x_defconfig +++ b/configs/beelink-gsking-x_defconfig @@ -3,17 +3,18 @@ CONFIG_SYS_BOARD="beelink-s922x" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gsking-x" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" beelink" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -45,7 +46,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/beelink-gtking_defconfig b/configs/beelink-gtking_defconfig index 091858bc38..1f1fda6ae9 100644 --- a/configs/beelink-gtking_defconfig +++ b/configs/beelink-gtking_defconfig @@ -3,17 +3,18 @@ CONFIG_SYS_BOARD="beelink-s922x" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" beelink" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -45,7 +46,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/beelink-gtkingpro_defconfig b/configs/beelink-gtkingpro_defconfig index 965639ee73..9962c72015 100644 --- a/configs/beelink-gtkingpro_defconfig +++ b/configs/beelink-gtkingpro_defconfig @@ -3,17 +3,18 @@ CONFIG_SYS_BOARD="beelink-s922x" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-gtking-pro" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" beelink" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -45,7 +46,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/bitmain_antminer_s9_defconfig b/configs/bitmain_antminer_s9_defconfig index 02257176e3..c38ba15cd0 100644 --- a/configs/bitmain_antminer_s9_defconfig +++ b/configs/bitmain_antminer_s9_defconfig @@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="bitmain-antminer-s9" CONFIG_SYS_PROMPT="antminer> " CONFIG_SPL_STACK_R_ADDR=0x200000 CONFIG_SYS_BOOTCOUNT_ADDR=0xEFFFFF0 +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xe0001000 CONFIG_SYS_LOAD_ADDR=0x0 @@ -32,7 +33,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 diff --git a/configs/blanche_defconfig b/configs/blanche_defconfig index 630a13f929..983c558701 100644 --- a/configs/blanche_defconfig +++ b/configs/blanche_defconfig @@ -6,6 +6,8 @@ CONFIG_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -16,8 +18,6 @@ CONFIG_R8A7792=y CONFIG_TARGET_BLANCHE=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0x40000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_FIT=y CONFIG_BOOTDELAY=3 diff --git a/configs/brppt1_mmc_defconfig b/configs/brppt1_mmc_defconfig index 0a994c58e8..0e0de73ff5 100644 --- a/configs/brppt1_mmc_defconfig +++ b/configs/brppt1_mmc_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_DM_GPIO=y @@ -19,8 +21,6 @@ CONFIG_ENV_OFFSET_REDUND=0x50000 CONFIG_SYS_LOAD_ADDR=0x80000000 CONFIG_LOCALVERSION="-2.0.0" # CONFIG_LOCALVERSION_AUTO is not set -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brsmarc1_defconfig b/configs/brsmarc1_defconfig index 404a7205d9..fcc5e47a54 100644 --- a/configs/brsmarc1_defconfig +++ b/configs/brsmarc1_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x20000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -20,8 +22,6 @@ CONFIG_ENV_OFFSET_REDUND=0x30000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x80000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/brxre1_defconfig b/configs/brxre1_defconfig index 986302235b..49663eb523 100644 --- a/configs/brxre1_defconfig +++ b/configs/brxre1_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x40000 CONFIG_DM_GPIO=y @@ -17,8 +19,6 @@ CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x50000 CONFIG_SYS_LOAD_ADDR=0x80000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_EXPERT is not set # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y diff --git a/configs/bubblegum_96_defconfig b/configs/bubblegum_96_defconfig index f3cad18daa..bae26119b8 100644 --- a/configs/bubblegum_96_defconfig +++ b/configs/bubblegum_96_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_OWL=y CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1107ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="bubblegum_96" CONFIG_SYS_PROMPT="U-Boot => " @@ -9,8 +11,6 @@ CONFIG_MACH_S900=y CONFIG_IDENT_STRING="\nBubblegum-96" CONFIG_SYS_LOAD_ADDR=0x7ffc0 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1107ff00 CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyOWL5,115200n8" diff --git a/configs/cardhu_defconfig b/configs/cardhu_defconfig index 9bfa759c2f..5435f0dd7f 100644 --- a/configs/cardhu_defconfig +++ b/configs/cardhu_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra30-cardhu" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Tegra30 (Cardhu) # " +CONFIG_SPL_STACK=0x800ffffc CONFIG_TEGRA30=y CONFIG_TARGET_CARDHU=y CONFIG_SYS_LOAD_ADDR=0x81000000 @@ -18,7 +19,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 0c4627aff0..702f6bc20c 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra124-cei-tk1-som" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Tegra124 (TK1-SOM) # " +CONFIG_SPL_STACK=0x800ffffc CONFIG_TEGRA124=y CONFIG_TARGET_CEI_TK1_SOM=y CONFIG_TEGRA_ENABLE_UARTD=y @@ -22,7 +23,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig index 019701010a..32e0647c93 100644 --- a/configs/cgtqmx8_defconfig +++ b/configs/cgtqmx8_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y @@ -14,15 +16,13 @@ CONFIG_TARGET_CONGA_QMX8=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x13e000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80280000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -36,7 +36,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_BINMAN_UBOOT_SYMBOLS is not set CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x13e000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x120000 diff --git a/configs/chiliboard_defconfig b/configs/chiliboard_defconfig index 458c4558fd..94791915c6 100644 --- a/configs/chiliboard_defconfig +++ b/configs/chiliboard_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030fef0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x20000 CONFIG_DM_GPIO=y @@ -16,8 +18,6 @@ CONFIG_ENV_OFFSET_REDUND=0x22000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030fef0 CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run mmcboot; run nandboot; run netboot" diff --git a/configs/chromebit_mickey_defconfig b/configs/chromebit_mickey_defconfig index 2240988dd0..771d7a8288 100644 --- a/configs/chromebit_mickey_defconfig +++ b/configs/chromebit_mickey_defconfig @@ -5,12 +5,15 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-mickey" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC is not set CONFIG_TARGET_CHROMEBIT_MICKEY=y CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_SPL_STACK=0xff718000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -18,8 +21,6 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-mickey.dtb" @@ -30,7 +31,6 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/chromebook_bob_defconfig b/configs/chromebook_bob_defconfig index d768e11db5..5727ba1d0b 100644 --- a/configs/chromebook_bob_defconfig +++ b/configs/chromebook_bob_defconfig @@ -5,21 +5,23 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-bob" CONFIG_SPL_TEXT_BASE=0xff8c2000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 # CONFIG_SPL_MMC is not set +CONFIG_SPL_STACK=0xff8effff CONFIG_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-bob.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -36,7 +38,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff8effff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SPL_SPI_LOAD=y @@ -88,7 +89,6 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_CROS_EC=y CONFIG_PWM_ROCKCHIP=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/chromebook_jerry_defconfig b/configs/chromebook_jerry_defconfig index 150dba1408..649a8ea6a7 100644 --- a/configs/chromebook_jerry_defconfig +++ b/configs/chromebook_jerry_defconfig @@ -5,11 +5,15 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-jerry" CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC is not set CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_SPL_STACK=0xff718000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -17,8 +21,6 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-jerry.dtb" @@ -31,7 +33,6 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set @@ -95,7 +96,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_ROCKCHIP_SERIAL=y diff --git a/configs/chromebook_kevin_defconfig b/configs/chromebook_kevin_defconfig index 94d14d012d..bc0e89d0e3 100644 --- a/configs/chromebook_kevin_defconfig +++ b/configs/chromebook_kevin_defconfig @@ -5,22 +5,24 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-gru-kevin" CONFIG_SPL_TEXT_BASE=0xff8c2000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0 CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 # CONFIG_SPL_MMC is not set CONFIG_TARGET_CHROMEBOOK_KEVIN=y +CONFIG_SPL_STACK=0xff8effff CONFIG_DEBUG_UART_BASE=0xff1a0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-gru-kevin.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -37,7 +39,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x10000 CONFIG_HANDOFF=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff8effff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SPL_SPI_LOAD=y @@ -89,7 +90,6 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_CROS_EC=y CONFIG_PWM_ROCKCHIP=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/chromebook_link64_defconfig b/configs/chromebook_link64_defconfig index 64ebef4b50..8c75d65429 100644 --- a/configs/chromebook_link64_defconfig +++ b/configs/chromebook_link64_defconfig @@ -20,7 +20,6 @@ CONFIG_HAVE_VGA_BIOS=y CONFIG_X86_OFFSET_U_BOOT=0xffa00000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_SHOW_BOOT_PROGRESS=y diff --git a/configs/chromebook_minnie_defconfig b/configs/chromebook_minnie_defconfig index 08e1e5be41..bda3775e20 100644 --- a/configs/chromebook_minnie_defconfig +++ b/configs/chromebook_minnie_defconfig @@ -5,12 +5,15 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-minnie" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC is not set CONFIG_TARGET_CHROMEBOOK_MINNIE=y CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_SPL_STACK=0xff718000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -18,8 +21,6 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-minnie.dtb" @@ -31,7 +32,6 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/chromebook_speedy_defconfig b/configs/chromebook_speedy_defconfig index d5aaee9dde..13c076188d 100644 --- a/configs/chromebook_speedy_defconfig +++ b/configs/chromebook_speedy_defconfig @@ -5,12 +5,15 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-veyron-speedy" CONFIG_SPL_TEXT_BASE=0xff704000 CONFIG_ROCKCHIP_RK3288=y # CONFIG_SPL_MMC is not set CONFIG_TARGET_CHROMEBOOK_SPEEDY=y CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_SPL_STACK=0xff718000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -18,8 +21,6 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_SPL_PAYLOAD="u-boot.img" CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-veyron-speedy.dtb" @@ -31,7 +32,6 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig index 95f7b090fa..000567fe8f 100644 --- a/configs/ci20_mmc_defconfig +++ b/configs/ci20_mmc_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0x83800 CONFIG_DEFAULT_DEVICE_TREE="ci20" CONFIG_SPL_TEXT_BASE=0xf4000a00 CONFIG_SPL_MMC=y +CONFIG_SPL_STACK=0xf4008000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ARCH_JZ47XX=y @@ -29,7 +30,6 @@ CONFIG_SPL_MAX_SIZE=0x2e00 CONFIG_SPL_BSS_START_ADDR=0xf4004000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xf4008000 # CONFIG_SPL_BANNER_PRINT is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1c diff --git a/configs/clearfog_defconfig b/configs/clearfog_defconfig index f91942865a..8cd35f9f1a 100644 --- a/configs/clearfog_defconfig +++ b/configs/clearfog_defconfig @@ -6,11 +6,14 @@ CONFIG_TEXT_BASE=0x00800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_CLEARFOG=y CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y CONFIG_DEFAULT_DEVICE_TREE="armada-388-clearfog" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -18,8 +21,6 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -31,7 +32,6 @@ CONFIG_SPL_BSS_START_ADDR=0x40023000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_TLV_EEPROM=y diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig index 58f3ec08b3..f82025513c 100644 --- a/configs/clearfog_gt_8k_defconfig +++ b/configs/clearfog_gt_8k_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_MVEBU_ARMADA_8K=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 @@ -15,8 +17,6 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/cm_t43_defconfig b/configs/cm_t43_defconfig index 6eda33ebbc..42898af293 100644 --- a/configs/cm_t43_defconfig +++ b/configs/cm_t43_defconfig @@ -5,6 +5,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -23,8 +25,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4033ff00 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_BOOTCOMMAND="mmc dev 0; if mmc rescan; then if run loadbootscript; then run bootscript; fi; fi; mmc dev 1; if mmc rescan; then run emmcboot; fi;" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/colibri-imx8x_defconfig b/configs/colibri-imx8x_defconfig index 83f39996b1..316f7b5987 100644 --- a/configs/colibri-imx8x_defconfig +++ b/configs/colibri-imx8x_defconfig @@ -4,6 +4,8 @@ CONFIG_TEXT_BASE=0x80020000 CONFIG_SYS_MALLOC_LEN=0x2800000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DM_GPIO=y @@ -13,8 +15,6 @@ CONFIG_SYS_LOAD_ADDR=0x80280000 CONFIG_SYS_MEMTEST_START=0x88000000 CONFIG_SYS_MEMTEST_END=0x89000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 diff --git a/configs/colibri_t20_defconfig b/configs/colibri_t20_defconfig index 224de949c2..1b38296733 100644 --- a/configs/colibri_t20_defconfig +++ b/configs/colibri_t20_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0x200000 CONFIG_DEFAULT_DEVICE_TREE="tegra20-colibri" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Colibri T20 # " +CONFIG_SPL_STACK=0xffffc CONFIG_TEGRA20=y CONFIG_TARGET_COLIBRI_T20=y CONFIG_SYS_LOAD_ADDR=0x1000000 @@ -20,7 +21,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 diff --git a/configs/colibri_t30_defconfig b/configs/colibri_t30_defconfig index a616eae1a6..01e6612744 100644 --- a/configs/colibri_t30_defconfig +++ b/configs/colibri_t30_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0xFFFFDE00 CONFIG_DEFAULT_DEVICE_TREE="tegra30-colibri" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Colibri T30 # " +CONFIG_SPL_STACK=0x800ffffc CONFIG_TEGRA30=y CONFIG_TARGET_COLIBRI_T30=y CONFIG_SYS_LOAD_ADDR=0x81000000 @@ -21,7 +22,6 @@ CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 diff --git a/configs/comtrend_ar5315u_ram_defconfig b/configs/comtrend_ar5315u_ram_defconfig index 3e6a49469d..01f7e7009a 100644 --- a/configs/comtrend_ar5315u_ram_defconfig +++ b/configs/comtrend_ar5315u_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5315u" CONFIG_SYS_PROMPT="AR-5315un # " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6318=y @@ -60,7 +61,6 @@ CONFIG_BCM6368_ETH=y CONFIG_PHY=y CONFIG_BCM6318_USBH_PHY=y CONFIG_BCM6328_POWER_DOMAIN=y -CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y CONFIG_BCM6345_SERIAL=y diff --git a/configs/comtrend_ar5387un_ram_defconfig b/configs/comtrend_ar5387un_ram_defconfig index 2092dad251..1d8e0d7e15 100644 --- a/configs/comtrend_ar5387un_ram_defconfig +++ b/configs/comtrend_ar5387un_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,ar-5387un" CONFIG_SYS_PROMPT="AR-5387un # " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6328=y @@ -61,7 +62,6 @@ CONFIG_PHY=y CONFIG_BCM6368_USBH_PHY=y CONFIG_POWER_DOMAIN=y CONFIG_BCM6328_POWER_DOMAIN=y -CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y CONFIG_BCM6345_SERIAL=y diff --git a/configs/comtrend_ct5361_ram_defconfig b/configs/comtrend_ct5361_ram_defconfig index f3f09e593f..c649104adf 100644 --- a/configs/comtrend_ct5361_ram_defconfig +++ b/configs/comtrend_ct5361_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,ct-5361" CONFIG_SYS_PROMPT="CT-5361 # " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6348=y @@ -62,7 +63,6 @@ CONFIG_PHY_RESET_DELAY=20 CONFIG_BCM6348_ETH=y CONFIG_PHY=y CONFIG_BCM6348_USBH_PHY=y -CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y CONFIG_BCM6345_SERIAL=y diff --git a/configs/comtrend_vr3032u_ram_defconfig b/configs/comtrend_vr3032u_ram_defconfig index 81885b7138..8bdb959b5d 100644 --- a/configs/comtrend_vr3032u_ram_defconfig +++ b/configs/comtrend_vr3032u_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,vr-3032u" CONFIG_SYS_PROMPT="VR-3032u # " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM63268=y @@ -63,7 +64,6 @@ CONFIG_PHY=y CONFIG_BCM6368_USBH_PHY=y CONFIG_POWER_DOMAIN=y CONFIG_BCM6328_POWER_DOMAIN=y -CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y CONFIG_BCM6345_SERIAL=y diff --git a/configs/comtrend_wap5813n_ram_defconfig b/configs/comtrend_wap5813n_ram_defconfig index a8ce3000d8..d2622491bb 100644 --- a/configs/comtrend_wap5813n_ram_defconfig +++ b/configs/comtrend_wap5813n_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="comtrend,wap-5813n" CONFIG_SYS_PROMPT="WAP-5813n # " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6368=y @@ -62,7 +63,6 @@ CONFIG_PHY_GIGE=y CONFIG_BCM6368_ETH=y CONFIG_PHY=y CONFIG_BCM6368_USBH_PHY=y -CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y CONFIG_BCM6345_SERIAL=y diff --git a/configs/controlcenterdc_defconfig b/configs/controlcenterdc_defconfig index ffa48fcb93..9c906edf1e 100644 --- a/configs/controlcenterdc_defconfig +++ b/configs/controlcenterdc_defconfig @@ -7,6 +7,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_CONTROLCENTERDC=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 @@ -14,6 +16,7 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="armada-38x-controlcenterdc" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x40031000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -21,8 +24,6 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -40,7 +41,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x40031000 CONFIG_SPL_I2C=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/corstone1000_defconfig b/configs/corstone1000_defconfig index dddfa27507..74250c7524 100644 --- a/configs/corstone1000_defconfig +++ b/configs/corstone1000_defconfig @@ -4,13 +4,13 @@ CONFIG_TARGET_CORSTONE1000=y CONFIG_TEXT_BASE=0x80000000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x83f00000 CONFIG_DEFAULT_DEVICE_TREE="corstone1000-mps3" CONFIG_SYS_PROMPT="corstone1000# " CONFIG_IDENT_STRING=" corstone1000 aarch64 " CONFIG_SYS_LOAD_ADDR=0x82100000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x83f00000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig index 1a0e63a43e..9f88511230 100644 --- a/configs/cortina_presidio-asic-base_defconfig +++ b/configs/cortina_presidio-asic-base_defconfig @@ -6,14 +6,14 @@ CONFIG_TEXT_BASE=0x04000000 CONFIG_SYS_MALLOC_LEN=0x820000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" CONFIG_SYS_PROMPT="G3#" CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SYS_LOAD_ADDR=0x10000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_REMAKE_ELF=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig index 53cb6f716d..24caa84c43 100644 --- a/configs/cortina_presidio-asic-emmc_defconfig +++ b/configs/cortina_presidio-asic-emmc_defconfig @@ -6,14 +6,14 @@ CONFIG_TEXT_BASE=0x04000000 CONFIG_SYS_MALLOC_LEN=0x820000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" CONFIG_SYS_PROMPT="G3#" CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SYS_LOAD_ADDR=0x10000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_REMAKE_ELF=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig index bd52d71d0e..637809d723 100644 --- a/configs/cortina_presidio-asic-pnand_defconfig +++ b/configs/cortina_presidio-asic-pnand_defconfig @@ -6,14 +6,14 @@ CONFIG_TEXT_BASE=0x04000000 CONFIG_SYS_MALLOC_LEN=0x820000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ca-presidio-engboard" CONFIG_SYS_PROMPT="G3#" CONFIG_IDENT_STRING="Presidio-SoC" CONFIG_SYS_LOAD_ADDR=0x10000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_REMAKE_ELF=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_SHOW_BOOT_PROGRESS=y diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig index c8b4eb4d28..363158e7a6 100644 --- a/configs/corvus_defconfig +++ b/configs/corvus_defconfig @@ -15,16 +15,17 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70007f00 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9g45-corvus" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 CONFIG_SYS_LOAD_ADDR=0x70000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70007f00 CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -40,7 +41,6 @@ CONFIG_SPL_BSS_START_ADDR=0x3000 CONFIG_SPL_BSS_MAX_SIZE=0x800 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/crs305-1g-4s-bit_defconfig b/configs/crs305-1g-4s-bit_defconfig index 6ff40e6d63..80d76886a8 100644 --- a/configs/crs305-1g-4s-bit_defconfig +++ b/configs/crs305-1g-4s-bit_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_TEXT_BASE=0x00800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 @@ -10,9 +12,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s-bit" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs305-1g-4s_defconfig b/configs/crs305-1g-4s_defconfig index f190f2d801..fad7512e2b 100644 --- a/configs/crs305-1g-4s_defconfig +++ b/configs/crs305-1g-4s_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_TEXT_BASE=0x00800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 @@ -10,9 +12,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs305-1g-4s" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs326-24g-2s-bit_defconfig b/configs/crs326-24g-2s-bit_defconfig index cf0b00dd7b..cf6193a03c 100644 --- a/configs/crs326-24g-2s-bit_defconfig +++ b/configs/crs326-24g-2s-bit_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_TEXT_BASE=0x00800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 @@ -10,9 +12,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s-bit" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs326-24g-2s_defconfig b/configs/crs326-24g-2s_defconfig index 96ec5b8013..b1cc505b2d 100644 --- a/configs/crs326-24g-2s_defconfig +++ b/configs/crs326-24g-2s_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_TEXT_BASE=0x00800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 @@ -10,9 +12,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs326-24g-2s" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs328-4c-20s-4s-bit_defconfig b/configs/crs328-4c-20s-4s-bit_defconfig index 6f91a9947f..e847f5cf10 100644 --- a/configs/crs328-4c-20s-4s-bit_defconfig +++ b/configs/crs328-4c-20s-4s-bit_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_TEXT_BASE=0x00800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 @@ -10,9 +12,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s-bit" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/crs328-4c-20s-4s_defconfig b/configs/crs328-4c-20s-4s_defconfig index a51da7a134..82606da1a4 100644 --- a/configs/crs328-4c-20s-4s_defconfig +++ b/configs/crs328-4c-20s-4s_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_SYS_KWD_CONFIG="board/mikrotik/crs3xx-98dx3236/kwbimage.cfg" CONFIG_TEXT_BASE=0x00800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_CRS3XX_98DX3236=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 @@ -10,9 +12,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-crs328-4c-20s-4s" CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_BUILD_TARGET="u-boot.kwb" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/cubieboard7_defconfig b/configs/cubieboard7_defconfig index 449a2cb697..0a903c7466 100644 --- a/configs/cubieboard7_defconfig +++ b/configs/cubieboard7_defconfig @@ -2,14 +2,14 @@ CONFIG_ARM=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_OWL=y CONFIG_SYS_MALLOC_LEN=0x2000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1107ff00 CONFIG_DEFAULT_DEVICE_TREE="s700-cubieboard7" CONFIG_SYS_PROMPT="U-Boot => " CONFIG_MACH_S700=y CONFIG_IDENT_STRING="\ncubieboard7" CONFIG_SYS_LOAD_ADDR=0x7ffc0 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1107ff00 CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyOWL3,115200n8" diff --git a/configs/d2net_v2_defconfig b/configs/d2net_v2_defconfig index 71c57ed5ab..b70762cd61 100644 --- a/configs/d2net_v2_defconfig +++ b/configs/d2net_v2_defconfig @@ -6,6 +6,7 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/LaCie/net2big_v2/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_NET2BIG_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 @@ -15,8 +16,6 @@ CONFIG_SYS_PROMPT="d2v2> " CONFIG_IDENT_STRING=" D2 v2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/da850evm_defconfig b/configs/da850evm_defconfig index 9b1b619817..9b04fff9d7 100644 --- a/configs/da850evm_defconfig +++ b/configs/da850evm_defconfig @@ -11,6 +11,8 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -19,13 +21,12 @@ CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x8001ff00 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0xc0700000 CONFIG_LTO=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20 CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -44,7 +45,6 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x8001ff00 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0f70000 diff --git a/configs/da850evm_direct_nor_defconfig b/configs/da850evm_direct_nor_defconfig index 137f9ec4f5..7c4a174d04 100644 --- a/configs/da850evm_direct_nor_defconfig +++ b/configs/da850evm_direct_nor_defconfig @@ -9,6 +9,8 @@ CONFIG_TARGET_DA850EVM=y CONFIG_DA850_LOWLEVEL=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8001ff00 CONFIG_ENV_SIZE=0x2800 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y @@ -17,8 +19,6 @@ CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SYS_LOAD_ADDR=0xc0700000 CONFIG_ENV_ADDR=0x60100000 CONFIG_LTO=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8001ff00 CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/da850evm_nand_defconfig b/configs/da850evm_nand_defconfig index f979c45a3b..eddaa49f0f 100644 --- a/configs/da850evm_nand_defconfig +++ b/configs/da850evm_nand_defconfig @@ -10,6 +10,8 @@ CONFIG_TARGET_DA850EVM=y CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y @@ -17,13 +19,12 @@ CONFIG_DEFAULT_DEVICE_TREE="da850-evm" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SYS_PROMPT="U-Boot > " CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x8001ff00 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0xc0700000 CONFIG_LTO=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20 CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -41,7 +42,6 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x8001ff00 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0f70000 @@ -87,13 +87,13 @@ CONFIG_DM_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_NAND_DAVINCI=y -CONFIG_SYS_NAND_HW_ECC_OOBFIRST=y CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 CONFIG_SYS_NAND_PAGE_COUNT=0x40 CONFIG_SYS_NAND_PAGE_SIZE=0x800 CONFIG_SYS_NAND_OOBSIZE=0x40 CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000 +CONFIG_SYS_NAND_HW_ECC_OOBFIRST=y CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_WINBOND=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index 5d29dae341..e5fd0d5f50 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra114-dalmore" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Tegra114 (Dalmore) # " +CONFIG_SPL_STACK=0x800ffffc CONFIG_TEGRA114=y CONFIG_TARGET_DALMORE=y CONFIG_TEGRA_ENABLE_UARTD=y @@ -19,7 +20,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 diff --git a/configs/db-88f6720_defconfig b/configs/db-88f6720_defconfig index bb3e524b90..f30d878a53 100644 --- a/configs/db-88f6720_defconfig +++ b/configs/db-88f6720_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x00800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_DB_88F6720=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 @@ -12,13 +14,12 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="armada-375-db" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -31,7 +32,6 @@ CONFIG_SPL_BSS_START_ADDR=0x40020000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/db-88f6820-amc_defconfig b/configs/db-88f6820-amc_defconfig index b33bb66b59..b3ae1424a9 100644 --- a/configs/db-88f6820-amc_defconfig +++ b/configs/db-88f6820-amc_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x00800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_DB_88F6820_AMC=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 @@ -12,13 +14,12 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="armada-385-db-88f6820-amc" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=3 @@ -32,7 +33,6 @@ CONFIG_SPL_BSS_START_ADDR=0x40023000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=96 # CONFIG_CMD_FLASH is not set diff --git a/configs/db-88f6820-gp_defconfig b/configs/db-88f6820-gp_defconfig index cf42e3b601..f3b228a19f 100644 --- a/configs/db-88f6820-gp_defconfig +++ b/configs/db-88f6820-gp_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x00800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_DB_88F6820_GP=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 @@ -12,14 +14,13 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="armada-388-gp" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -31,7 +32,6 @@ CONFIG_SPL_BSS_START_ADDR=0x40023000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/db-mv784mp-gp_defconfig b/configs/db-mv784mp-gp_defconfig index ace3400740..c456081085 100644 --- a/configs/db-mv784mp-gp_defconfig +++ b/configs/db-mv784mp-gp_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x00800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_DB_MV784MP_GP=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 @@ -12,13 +14,12 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-gp" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y @@ -31,7 +32,6 @@ CONFIG_SPL_BSS_START_ADDR=0x40020000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set diff --git a/configs/db-xc3-24g4xg_defconfig b/configs/db-xc3-24g4xg_defconfig index 0555448e6b..cb307995f5 100644 --- a/configs/db-xc3-24g4xg_defconfig +++ b/configs/db-xc3-24g4xg_defconfig @@ -3,17 +3,16 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_SYS_KWD_CONFIG="board/Marvell/db-xc3-24g4xg/kwbimage.cfg" CONFIG_TEXT_BASE=0x00800000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_DB_XC3_24G4XG=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-db-xc3-24g4xg" CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_BUILD_TARGET="u-boot.kwb" CONFIG_SYS_MEMTEST_START=0x00800000 CONFIG_SYS_MEMTEST_END=0x00ffffff -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/deneb_defconfig b/configs/deneb_defconfig index a5836f4c86..0d714bd313 100644 --- a/configs/deneb_defconfig +++ b/configs/deneb_defconfig @@ -7,6 +7,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y @@ -17,14 +19,13 @@ CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x13e000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING=" ##v01.06" CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -46,7 +47,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x13e000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x120000 @@ -110,7 +110,6 @@ CONFIG_PHYLIB=y CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=5 CONFIG_MV88E61XX_PHY_PORTS=0x7 -CONFIG_MV88E61XX_FIXED_PORTS=0x0 CONFIG_FEC_MXC_SHARE_MDIO=y CONFIG_FEC_MXC_MDIO_BASE=0x5B050000 CONFIG_FEC_MXC=y diff --git a/configs/devkit3250_defconfig b/configs/devkit3250_defconfig index cd5ddc4ad3..d856b25977 100644 --- a/configs/devkit3250_defconfig +++ b/configs/devkit3250_defconfig @@ -10,14 +10,15 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f20 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xA0000 CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xfff8 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80008000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f20 CONFIG_SYS_MONITOR_LEN=393216 CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y @@ -31,7 +32,6 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfff8 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_RAW_ONLY=y CONFIG_SPL_NAND_DRIVERS=y diff --git a/configs/devkit8000_defconfig b/configs/devkit8000_defconfig index 6fd4410df5..fa1b428f00 100644 --- a/configs/devkit8000_defconfig +++ b/configs/devkit8000_defconfig @@ -4,14 +4,14 @@ CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_LEN=0x40000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="omap3-devkit8000" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_DEVKIT8000=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_BOOTCOMMAND="run autoboot" CONFIG_USE_PREBOOT=y diff --git a/configs/dh_imx6_defconfig b/configs/dh_imx6_defconfig index 04a5447e34..62c446f86a 100644 --- a/configs/dh_imx6_defconfig +++ b/configs/dh_imx6_defconfig @@ -33,7 +33,6 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=3 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/configs/display5_defconfig b/configs/display5_defconfig index c46a0a0b69..a05d6bf620 100644 --- a/configs/display5_defconfig +++ b/configs/display5_defconfig @@ -33,7 +33,6 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_STANDALONE_LOAD_ADDR=0x10001000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/display5_factory_defconfig b/configs/display5_factory_defconfig index cacdf33d53..0ef41b65f5 100644 --- a/configs/display5_factory_defconfig +++ b/configs/display5_factory_defconfig @@ -30,7 +30,6 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_STANDALONE_LOAD_ADDR=0x10001000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 diff --git a/configs/dns325_defconfig b/configs/dns325_defconfig index 6c35f31a29..fc6f2cd043 100644 --- a/configs/dns325_defconfig +++ b/configs/dns325_defconfig @@ -6,14 +6,13 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/d-link/dns325/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_DNS325=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-dns325" CONFIG_IDENT_STRING="\nD-Link DNS-325" CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/dockstar_defconfig b/configs/dockstar_defconfig index d08182d270..1829708839 100644 --- a/configs/dockstar_defconfig +++ b/configs/dockstar_defconfig @@ -52,8 +52,6 @@ CONFIG_MTD_RAW_NAND=y CONFIG_PHY_MARVELL=y CONFIG_MVGBE=y CONFIG_MII=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig index 41df92f3d2..b08c1d7345 100644 --- a/configs/dra7xx_evm_defconfig +++ b/configs/dra7xx_evm_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x18000 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" @@ -16,11 +18,8 @@ CONFIG_SPL_SPI=y CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS0,115200 androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard" diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig index 7392b73085..d8c11e01db 100644 --- a/configs/dra7xx_hs_evm_defconfig +++ b/configs/dra7xx_hs_evm_defconfig @@ -4,6 +4,8 @@ CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_F_LEN=0x18000 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" @@ -19,11 +21,8 @@ CONFIG_SPL_SPI=y CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS0,115200 androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard" diff --git a/configs/dra7xx_hs_evm_usb_defconfig b/configs/dra7xx_hs_evm_usb_defconfig index 1bda6db7a3..150902e938 100644 --- a/configs/dra7xx_hs_evm_usb_defconfig +++ b/configs/dra7xx_hs_evm_usb_defconfig @@ -4,6 +4,8 @@ CONFIG_TI_SECURE_DEVICE=y CONFIG_SYS_MALLOC_F_LEN=0x18000 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="dra7-evm" @@ -20,11 +22,8 @@ CONFIG_SPL_SPI=y CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4037fef0 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS0,115200 androidboot.console=ttyS0 androidboot.hardware=jacinto6evmboard" diff --git a/configs/draco_defconfig b/configs/draco_defconfig index 8d1c6fd44a..b71b23faac 100644 --- a/configs/draco_defconfig +++ b/configs/draco_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" @@ -24,8 +26,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" diff --git a/configs/dragonboard410c_defconfig b/configs/dragonboard410c_defconfig index 929889a8a7..0c4c85db5a 100644 --- a/configs/dragonboard410c_defconfig +++ b/configs/dragonboard410c_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_SNAPDRAGON=y CONFIG_TEXT_BASE=0x8f600000 CONFIG_SYS_MALLOC_LEN=0x802000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="dragonboard410c" @@ -11,8 +13,6 @@ CONFIG_SYS_PROMPT="dragonboard410c => " CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 410C" CONFIG_SYS_LOAD_ADDR=0x80080000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_REMAKE_ELF=y # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y diff --git a/configs/dragonboard820c_defconfig b/configs/dragonboard820c_defconfig index b9ddf2174e..89b4752416 100644 --- a/configs/dragonboard820c_defconfig +++ b/configs/dragonboard820c_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_SNAPDRAGON=y CONFIG_TEXT_BASE=0x80080000 CONFIG_SYS_MALLOC_LEN=0x804000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="dragonboard820c" CONFIG_SYS_PROMPT="dragonboard820c => " @@ -11,8 +13,6 @@ CONFIG_TARGET_DRAGONBOARD820C=y CONFIG_IDENT_STRING="\nQualcomm-DragonBoard 820C" CONFIG_SYS_LOAD_ADDR=0x80080000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyMSM0,115200n8" # CONFIG_USE_BOOTCOMMAND is not set diff --git a/configs/dreamplug_defconfig b/configs/dreamplug_defconfig index 3cff5034b9..de79176bfd 100644 --- a/configs/dreamplug_defconfig +++ b/configs/dreamplug_defconfig @@ -59,8 +59,6 @@ CONFIG_MVGBE=y CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/ds109_defconfig b/configs/ds109_defconfig index 9088fffb25..ea21717c2b 100644 --- a/configs/ds109_defconfig +++ b/configs/ds109_defconfig @@ -9,6 +9,7 @@ CONFIG_INITRD_TAG=y CONFIG_SYS_KWD_CONFIG="board/Synology/ds109/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_DS109=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3D0000 @@ -16,8 +17,6 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ds109" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x3D0000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="setenv ethact egiga0; ${x_bootcmd_ethernet}; ${x_bootcmd_usb}; ${x_bootcmd_kernel}; setenv bootargs ${x_bootargs} ${x_bootargs_root}; bootm 0x6400000;" diff --git a/configs/ds116_defconfig b/configs/ds116_defconfig index 5546017c58..d7cf36f91e 100644 --- a/configs/ds116_defconfig +++ b/configs/ds116_defconfig @@ -9,6 +9,8 @@ CONFIG_TEXT_BASE=0x00800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_DS116=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x7E0000 @@ -17,6 +19,7 @@ CONFIG_DEFAULT_DEVICE_TREE="armada-385-synology-ds116" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SYS_PROMPT="DS116> " CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -25,8 +28,6 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_BOOTDELAY=10 CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -38,7 +39,6 @@ CONFIG_SPL_BSS_START_ADDR=0x40023000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_GPIO=y diff --git a/configs/ds414_defconfig b/configs/ds414_defconfig index 1b7e36be96..b79f96c192 100644 --- a/configs/ds414_defconfig +++ b/configs/ds414_defconfig @@ -8,6 +8,8 @@ CONFIG_TEXT_BASE=0x00800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_DS414=y CONFIG_DDR_32BIT=y CONFIG_ENV_SIZE=0x10000 @@ -16,13 +18,12 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-synology-ds414" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 ip=off initrd=0x8000040,8M root=/dev/md0 rw syno_hw_version=DS414r1 ihd_num=4 netif_num=2 flash_size=8 SataLedSpecial=1 HddHotplug=1" @@ -37,7 +38,6 @@ CONFIG_SPL_BSS_START_ADDR=0x40020000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 # CONFIG_CMD_FLASH is not set diff --git a/configs/durian_defconfig b/configs/durian_defconfig index 68a3deb375..b4cb44222e 100644 --- a/configs/durian_defconfig +++ b/configs/durian_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x500000 CONFIG_SYS_MALLOC_LEN=0x101000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x87f00000 CONFIG_ENV_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="phytium-durian" CONFIG_SYS_PROMPT="durian#" @@ -13,8 +15,6 @@ CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_SYS_PCI_64BIT=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x87f00000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 rw" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/eDPU_defconfig b/configs/eDPU_defconfig index 8cf16f4738..952ad940f5 100644 --- a/configs/eDPU_defconfig +++ b/configs/eDPU_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_TEXT_BASE=0x00000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_MVEBU_ARMADA_37XX=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 @@ -13,8 +15,6 @@ CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_SYS_LOAD_ADDR=0x6000000 CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ea-lpc3250devkitv2_defconfig b/configs/ea-lpc3250devkitv2_defconfig index d24fa85fa9..0dbdff528e 100644 --- a/configs/ea-lpc3250devkitv2_defconfig +++ b/configs/ea-lpc3250devkitv2_defconfig @@ -7,13 +7,13 @@ CONFIG_ARCH_LPC32XX=y CONFIG_TEXT_BASE=0x83000000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f20 CONFIG_TARGET_EA_LPC3250DEVKITV2=y CONFIG_DEFAULT_DEVICE_TREE="lpc3250-ea3250" CONFIG_SYS_PROMPT="EA-LPC3250v2=> " CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f20 CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=1048575 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set diff --git a/configs/eaidk-610-rk3399_defconfig b/configs/eaidk-610-rk3399_defconfig index c364c9ecc8..b4112a1471 100644 --- a/configs/eaidk-610-rk3399_defconfig +++ b/configs/eaidk-610-rk3399_defconfig @@ -4,16 +4,17 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-eaidk-610" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-eaidk-610.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -23,7 +24,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/elgin-rv1108_defconfig b/configs/elgin-rv1108_defconfig index 36f57d5812..4542951379 100644 --- a/configs/elgin-rv1108_defconfig +++ b/configs/elgin-rv1108_defconfig @@ -3,6 +3,8 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rv1108-elgin-r1" CONFIG_ROCKCHIP_RV1108=y @@ -13,8 +15,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 # CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_SYS_LOAD_ADDR=0x62000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 # CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="rv1108-elgin-r1.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/emsdp_defconfig b/configs/emsdp_defconfig index 8c364566d5..86cc59a2c7 100644 --- a/configs/emsdp_defconfig +++ b/configs/emsdp_defconfig @@ -5,13 +5,13 @@ CONFIG_TARGET_EMSDP=y CONFIG_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_LEN=0x10000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10100000 CONFIG_ENV_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="emsdp" CONFIG_SYS_PROMPT="emsdp# " CONFIG_SYS_CLK_FREQ=40000000 CONFIG_SYS_LOAD_ADDR=0x10000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10100000 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOARD_EARLY_INIT_R=y CONFIG_HUSH_PARSER=y diff --git a/configs/espresso7420_defconfig b/configs/espresso7420_defconfig index a003f854af..80329d915c 100644 --- a/configs/espresso7420_defconfig +++ b/configs/espresso7420_defconfig @@ -5,13 +5,13 @@ CONFIG_TEXT_BASE=0x43E00000 CONFIG_SYS_MALLOC_LEN=0x5004000 CONFIG_ARCH_EXYNOS7=y CONFIG_NR_DRAM_BANKS=8 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2158000 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="exynos7420-espresso7420" CONFIG_SYS_PROMPT="ESPRESSO7420 # " CONFIG_IDENT_STRING=" for ESPRESSO7420" CONFIG_SYS_LOAD_ADDR=0x43e00000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2158000 # CONFIG_AUTOBOOT is not set CONFIG_SILENT_CONSOLE=y CONFIG_CONSOLE_MUX=y diff --git a/configs/etamin_defconfig b/configs/etamin_defconfig index d42eda2055..43cfed9fb3 100644 --- a/configs/etamin_defconfig +++ b/configs/etamin_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x980000 CONFIG_SPL_DM_SPI=y @@ -25,8 +27,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig index 0795a402c8..f8d3543a31 100644 --- a/configs/evb-ast2500_defconfig +++ b/configs/evb-ast2500_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0x60000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ast2500-evb" +CONFIG_DM_RESET=y CONFIG_PRE_CON_BUF_ADDR=0x1e720000 CONFIG_SYS_LOAD_ADDR=0x83000000 CONFIG_FIT=y @@ -57,7 +58,6 @@ CONFIG_FTGMAC100=y CONFIG_PHY=y CONFIG_PINCTRL=y CONFIG_RAM=y -CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/evb-ast2600_defconfig b/configs/evb-ast2600_defconfig index 3440062156..597b7715d3 100644 --- a/configs/evb-ast2600_defconfig +++ b/configs/evb-ast2600_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_LDSCRIPT="arch/arm/mach-aspeed/ast2600/u-boot-spl.lds" CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="ast2600-evb" +CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x83000000 CONFIG_SPL_SIZE_LIMIT=0x10000 @@ -28,7 +29,6 @@ CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS4,115200n8 root=/dev/ram rw" CONFIG_USE_BOOTCOMMAND=y @@ -107,7 +107,6 @@ CONFIG_PHY=y CONFIG_PINCTRL=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SPI=y diff --git a/configs/evb-px30_defconfig b/configs/evb-px30_defconfig index bb6f21b2e6..4ac161683c 100644 --- a/configs/evb-px30_defconfig +++ b/configs/evb-px30_defconfig @@ -7,20 +7,22 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_DEFAULT_DEVICE_TREE="px30-evb" CONFIG_SPL_TEXT_BASE=0x00000000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_EVB_PX30=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -38,7 +40,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set @@ -95,7 +96,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y CONFIG_ROCKCHIP_SDRAM_COMMON=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y # CONFIG_SPECIFY_CONSOLE_INDEX is not set diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig index 2e3bff8cf0..f49aa452e0 100644 --- a/configs/evb-px5_defconfig +++ b/configs/evb-px5_defconfig @@ -4,8 +4,11 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3368-px5-evb" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3368=y CONFIG_TPL_LDSCRIPT="arch/arm/mach-rockchip/u-boot-tpl-v8.lds" CONFIG_TPL_LIBCOMMON_SUPPORT=y @@ -13,6 +16,7 @@ CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_TARGET_EVB_PX5=y CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x188000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xFF1c0000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -20,8 +24,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -42,7 +44,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x20000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x188000 CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y @@ -75,7 +76,6 @@ CONFIG_SPL_PINCTRL=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/evb-rk3036_defconfig b/configs/evb-rk3036_defconfig index 289f47f4ae..112a59cfb9 100644 --- a/configs/evb-rk3036_defconfig +++ b/configs/evb-rk3036_defconfig @@ -8,6 +8,8 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x60000000 CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_SPL_TEXT_BASE=0x10081000 CONFIG_ROCKCHIP_RK3036=y @@ -17,8 +19,6 @@ CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x60800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3036-evb.dtb" diff --git a/configs/evb-rk3128_defconfig b/configs/evb-rk3128_defconfig index 06a044b934..1644c20993 100644 --- a/configs/evb-rk3128_defconfig +++ b/configs/evb-rk3128_defconfig @@ -4,16 +4,17 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="rk3128-evb" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3128=y CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 # CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_SYS_LOAD_ADDR=0x60800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_FIT=y CONFIG_DEFAULT_FDT_FILE="rk3128-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set @@ -44,7 +45,6 @@ CONFIG_PINCTRL=y CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_RAM=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y diff --git a/configs/evb-rk3229_defconfig b/configs/evb-rk3229_defconfig index 8b4da5b3e7..cf73afeded 100644 --- a/configs/evb-rk3229_defconfig +++ b/configs/evb-rk3229_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x61000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x61100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3229-evb" CONFIG_SPL_TEXT_BASE=0x60000000 @@ -17,12 +19,9 @@ CONFIG_DEBUG_UART_BASE=0x11030000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x61800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x61100000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3229-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/evb-rk3288_defconfig b/configs/evb-rk3288_defconfig index 5c6b1d5d55..c4aebeeeaf 100644 --- a/configs/evb-rk3288_defconfig +++ b/configs/evb-rk3288_defconfig @@ -5,24 +5,25 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-evb" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_EVB_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x04000000 +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-evb-rk808.dtb" CONFIG_SILENT_CONSOLE=y @@ -31,7 +32,6 @@ CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_OPTEE_IMAGE=y @@ -81,7 +81,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y diff --git a/configs/evb-rk3308_defconfig b/configs/evb-rk3308_defconfig index 0aeaf01d9a..6950b5ba06 100644 --- a/configs/evb-rk3308_defconfig +++ b/configs/evb-rk3308_defconfig @@ -6,18 +6,20 @@ CONFIG_TEXT_BASE=0x00600000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_DEFAULT_DEVICE_TREE="rk3308-evb" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3308=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 CONFIG_SPL_DRIVERS_MISC=y CONFIG_TARGET_EVB_RK3308=y CONFIG_SPL_STACK_R_ADDR=0xc00000 +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF0C0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -30,7 +32,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set @@ -70,7 +71,6 @@ CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y -CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/configs/evb-rk3328_defconfig b/configs/evb-rk3328_defconfig index 8a6d19a176..7a14ffb53c 100644 --- a/configs/evb-rk3328_defconfig +++ b/configs/evb-rk3328_defconfig @@ -4,6 +4,8 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3328-evb" CONFIG_ROCKCHIP_RK3328=y @@ -12,14 +14,13 @@ CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x4000000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -34,7 +35,6 @@ CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_ATF=y diff --git a/configs/evb-rk3399_defconfig b/configs/evb-rk3399_defconfig index 3050fd5992..415ef8a238 100644 --- a/configs/evb-rk3399_defconfig +++ b/configs/evb-rk3399_defconfig @@ -4,16 +4,18 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-evb" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-evb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -23,7 +25,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y @@ -56,7 +57,6 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 diff --git a/configs/evb-rk3568_defconfig b/configs/evb-rk3568_defconfig index a76d924d38..c7e0e5a796 100644 --- a/configs/evb-rk3568_defconfig +++ b/configs/evb-rk3568_defconfig @@ -6,7 +6,10 @@ CONFIG_TEXT_BASE=0x00a00000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-evb" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3568=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y @@ -14,12 +17,11 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_TARGET_EVB_RK3568=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y @@ -33,7 +35,6 @@ CONFIG_SPL_BSS_START_ADDR=0x4000000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_CMD_GPT=y @@ -60,7 +61,6 @@ CONFIG_GMAC_ROCKCHIP=y CONFIG_REGULATOR_PWM=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y -CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/evb-rv1108_defconfig b/configs/evb-rv1108_defconfig index aab3223111..7c6f9b55a5 100644 --- a/configs/evb-rv1108_defconfig +++ b/configs/evb-rv1108_defconfig @@ -3,6 +3,8 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x60000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_DEFAULT_DEVICE_TREE="rv1108-evb" CONFIG_ROCKCHIP_RV1108=y CONFIG_DEBUG_UART_BASE=0x10210000 @@ -10,8 +12,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 # CONFIG_DEBUG_UART_BOARD_INIT is not set CONFIG_SYS_LOAD_ADDR=0x62000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_BOOTCOMMAND="sf probe;sf read 0x62000000 0x140800 0x500000;dcache off;go 0x62000000" CONFIG_DEFAULT_FDT_FILE="rv1108-evb.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/ficus-rk3399_defconfig b/configs/ficus-rk3399_defconfig index 3aee6b6471..09cb5798b8 100644 --- a/configs/ficus-rk3399_defconfig +++ b/configs/ficus-rk3399_defconfig @@ -3,18 +3,19 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-ficus" CONFIG_SPL_TEXT_BASE=0xff8c2000 CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x4000 CONFIG_TARGET_ROCK960_RK3399=y +CONFIG_SPL_STACK=0xff8effff CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 CONFIG_SPL_PAD_TO=0x7f8000 @@ -23,7 +24,6 @@ CONFIG_SPL_BSS_START_ADDR=0xff8e0000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff8effff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_CMD_BOOTZ=y diff --git a/configs/firefly-px30_defconfig b/configs/firefly-px30_defconfig index 2a6d2edbab..47c924c3df 100644 --- a/configs/firefly-px30_defconfig +++ b/configs/firefly-px30_defconfig @@ -7,21 +7,23 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_DEFAULT_DEVICE_TREE="px30-firefly" CONFIG_SPL_TEXT_BASE=0x00000000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_EVB_PX30=y CONFIG_DEBUG_UART_CHANNEL=1 CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -39,7 +41,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set @@ -96,7 +97,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y CONFIG_ROCKCHIP_SDRAM_COMMON=y -CONFIG_DM_RESET=y # CONFIG_SPECIFY_CONSOLE_INDEX is not set CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/configs/firefly-rk3288_defconfig b/configs/firefly-rk3288_defconfig index 434c9113b5..87ed2b2c9d 100644 --- a/configs/firefly-rk3288_defconfig +++ b/configs/firefly-rk3288_defconfig @@ -5,18 +5,20 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-firefly" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_FIREFLY_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_SIZE_LIMIT=0x40000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y @@ -26,7 +28,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SYS_BOOTM_LEN=0x4000000 @@ -77,7 +78,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y diff --git a/configs/firefly-rk3399_defconfig b/configs/firefly-rk3399_defconfig index 5475172532..71891d28fa 100644 --- a/configs/firefly-rk3399_defconfig +++ b/configs/firefly-rk3399_defconfig @@ -4,16 +4,18 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-firefly" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-firefly.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y @@ -24,7 +26,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y @@ -56,7 +57,6 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 diff --git a/configs/gardena-smart-gateway-at91sam_defconfig b/configs/gardena-smart-gateway-at91sam_defconfig index 703cd08fe8..bc211f5c85 100644 --- a/configs/gardena-smart-gateway-at91sam_defconfig +++ b/configs/gardena-smart-gateway-at91sam_defconfig @@ -11,11 +11,14 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003f00 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g25-gardena-smart-gateway" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x308000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfffff200 @@ -23,8 +26,6 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003f00 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_NAND_BOOT=y @@ -42,7 +43,6 @@ CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x308000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set diff --git a/configs/gazerbeam_defconfig b/configs/gazerbeam_defconfig index 9d09d9c37f..63051af411 100644 --- a/configs/gazerbeam_defconfig +++ b/configs/gazerbeam_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="gazerbeam" +CONFIG_DM_RESET=y CONFIG_IDENT_STRING=" gazerbeam 0.01" CONFIG_SYS_CLK_FREQ=33333333 CONFIG_ENV_ADDR=0xFE080000 @@ -215,7 +216,6 @@ CONFIG_TSEC_ENET=y # CONFIG_PCI is not set CONFIG_RAM=y CONFIG_MPC83XX_SDRAM=y -CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y CONFIG_SYSINFO=y diff --git a/configs/geekbox_defconfig b/configs/geekbox_defconfig index c23d0549a4..fdd01b6494 100644 --- a/configs/geekbox_defconfig +++ b/configs/geekbox_defconfig @@ -5,6 +5,8 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_DEVICE_TREE="rk3368-geekbox" CONFIG_ROCKCHIP_RK3368=y CONFIG_TARGET_GEEKBOX=y @@ -12,8 +14,6 @@ CONFIG_DEBUG_UART_BASE=0xFF690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-geekbox.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y diff --git a/configs/giedi_defconfig b/configs/giedi_defconfig index 6d00a61d3d..75d5d89823 100644 --- a/configs/giedi_defconfig +++ b/configs/giedi_defconfig @@ -7,6 +7,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y @@ -17,14 +19,13 @@ CONFIG_SYS_PROMPT="U-Boot# " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x13e000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x2000 CONFIG_IDENT_STRING=" ##v01.07" CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/siemens/capricorn/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -46,7 +47,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x13e000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x120000 @@ -110,7 +110,6 @@ CONFIG_PHYLIB=y CONFIG_MV88E61XX_SWITCH=y CONFIG_MV88E61XX_CPU_PORT=5 CONFIG_MV88E61XX_PHY_PORTS=0x7 -CONFIG_MV88E61XX_FIXED_PORTS=0x0 CONFIG_FEC_MXC_SHARE_MDIO=y CONFIG_FEC_MXC_MDIO_BASE=0x5B050000 CONFIG_FEC_MXC=y diff --git a/configs/goflexhome_defconfig b/configs/goflexhome_defconfig index 8dc285241b..ef74086cfa 100644 --- a/configs/goflexhome_defconfig +++ b/configs/goflexhome_defconfig @@ -59,8 +59,6 @@ CONFIG_MVGBE=y CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/gose_defconfig b/configs/gose_defconfig index b918b131d3..265c7a617d 100644 --- a/configs/gose_defconfig +++ b/configs/gose_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -20,14 +22,13 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Gose" CONFIG_R8A7793=y CONFIG_TARGET_GOSE=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_FIT=y CONFIG_BOOTDELAY=3 @@ -36,7 +37,6 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/grpeach_defconfig b/configs/grpeach_defconfig index e8362275c5..d0af2b8f3e 100644 --- a/configs/grpeach_defconfig +++ b/configs/grpeach_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x18000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20900000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x80000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -13,8 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="r7s72100-gr-peach-u-boot" CONFIG_RZA1=y CONFIG_SYS_CLK_FREQ=66666666 CONFIG_SYS_LOAD_ADDR=0x20400000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20900000 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/guruplug_defconfig b/configs/guruplug_defconfig index 1889743f08..81f0fe0ee1 100644 --- a/configs/guruplug_defconfig +++ b/configs/guruplug_defconfig @@ -6,14 +6,13 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/Marvell/guruplug/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_GURUPLUG=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-guruplug-server-plus" CONFIG_IDENT_STRING="\nMarvell-GuruPlug" CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=917504 diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig index 5308a8e3e9..032dcfe343 100644 --- a/configs/gwventana_emmc_defconfig +++ b/configs/gwventana_emmc_defconfig @@ -29,7 +29,6 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig index 8387d0fa79..ee833a59f3 100644 --- a/configs/gwventana_gw5904_defconfig +++ b/configs/gwventana_gw5904_defconfig @@ -29,7 +29,6 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig index f33625b2ca..194faa5607 100644 --- a/configs/gwventana_nand_defconfig +++ b/configs/gwventana_nand_defconfig @@ -29,7 +29,6 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 diff --git a/configs/gxp_defconfig b/configs/gxp_defconfig index 681049a474..c97cbbfbc1 100644 --- a/configs/gxp_defconfig +++ b/configs/gxp_defconfig @@ -5,6 +5,8 @@ CONFIG_ARCH_GXP=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_GXP_VROM_64MB=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x60000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -12,8 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="hpe-bmc-dl360gen10" CONFIG_SYS_PROMPT="gxp# " CONFIG_ENV_OFFSET_REDUND=0x70000 CONFIG_SYS_LOAD_ADDR=0x40100000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y diff --git a/configs/harmony_defconfig b/configs/harmony_defconfig index c8694bba68..7f8cd90209 100644 --- a/configs/harmony_defconfig +++ b/configs/harmony_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_OFFSET=0x1FFE0000 CONFIG_DEFAULT_DEVICE_TREE="tegra20-harmony" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (Harmony) # " +CONFIG_SPL_STACK=0xffffc CONFIG_TEGRA20=y CONFIG_TARGET_HARMONY=y CONFIG_TEGRA_ENABLE_UARTD=y @@ -17,7 +18,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 diff --git a/configs/helios4_defconfig b/configs/helios4_defconfig index d5d68f98f9..d40ccb885f 100644 --- a/configs/helios4_defconfig +++ b/configs/helios4_defconfig @@ -6,11 +6,14 @@ CONFIG_TEXT_BASE=0x00800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_HELIOS4=y CONFIG_MVEBU_SPL_BOOT_DEVICE_MMC=y CONFIG_DEFAULT_DEVICE_TREE="armada-388-helios4" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -18,8 +21,6 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -31,7 +32,6 @@ CONFIG_SPL_BSS_START_ADDR=0x40023000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_TLV_EEPROM=y diff --git a/configs/highbank_defconfig b/configs/highbank_defconfig index 943df63120..49339d9a55 100644 --- a/configs/highbank_defconfig +++ b/configs/highbank_defconfig @@ -7,6 +7,8 @@ CONFIG_TEXT_BASE=0x00008000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="highbank" CONFIG_SYS_BOOTCOUNT_ADDR=0xfff3cf0c @@ -14,8 +16,6 @@ CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0xFFF88000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000000 CONFIG_FIT=y CONFIG_OF_BOARD_SETUP=y CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/hikey960_defconfig b/configs/hikey960_defconfig index 3e999044fc..be85dbe290 100644 --- a/configs/hikey960_defconfig +++ b/configs/hikey960_defconfig @@ -4,14 +4,14 @@ CONFIG_TARGET_HIKEY960=y CONFIG_TEXT_BASE=0x1ac98000 CONFIG_SYS_MALLOC_LEN=0x801000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fff0 CONFIG_ENV_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="hi3660-hikey960" CONFIG_SYS_PROMPT="U-Boot => " CONFIG_IDENT_STRING="\nHikey960" CONFIG_SYS_LOAD_ADDR=0x80000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fff0 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA6,115200n8 root=/dev/mmcblk0p2 rw" diff --git a/configs/hikey_defconfig b/configs/hikey_defconfig index 152459ece8..9177d6cd4e 100644 --- a/configs/hikey_defconfig +++ b/configs/hikey_defconfig @@ -3,14 +3,14 @@ CONFIG_COUNTER_FREQUENCY=19000000 CONFIG_TEXT_BASE=0x35000000 CONFIG_SYS_MALLOC_LEN=0x801000 CONFIG_NR_DRAM_BANKS=6 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fff0 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x0 CONFIG_DEFAULT_DEVICE_TREE="hi6220-hikey" CONFIG_IDENT_STRING="hikey" CONFIG_SYS_LOAD_ADDR=0x80000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fff0 CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=10 CONFIG_USE_BOOTARGS=y diff --git a/configs/hsdk_4xd_defconfig b/configs/hsdk_4xd_defconfig index bba4067268..df8e55f898 100644 --- a/configs/hsdk_4xd_defconfig +++ b/configs/hsdk_4xd_defconfig @@ -5,16 +5,17 @@ CONFIG_BOARD_HSDK_4XD=y CONFIG_TEXT_BASE=0x81000000 CONFIG_SYS_MALLOC_LEN=0x0200000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="hsdk-4xd" CONFIG_SYS_PROMPT="hsdk-4xd# " +CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xf0005000 CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=500000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_BOARD_EARLY_INIT_F=y @@ -55,7 +56,6 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/hsdk_defconfig b/configs/hsdk_defconfig index 4715f9d9d7..20374024f2 100644 --- a/configs/hsdk_defconfig +++ b/configs/hsdk_defconfig @@ -4,16 +4,17 @@ CONFIG_TARGET_HSDK=y CONFIG_TEXT_BASE=0x81000000 CONFIG_SYS_MALLOC_LEN=0x0200000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="hsdk" CONFIG_SYS_PROMPT="hsdk# " +CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xf0005000 CONFIG_DEBUG_UART_CLOCK=33333333 CONFIG_SYS_CLK_FREQ=500000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" CONFIG_BOARD_EARLY_INIT_F=y @@ -54,7 +55,6 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SST=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/huawei_hg556a_ram_defconfig b/configs/huawei_hg556a_ram_defconfig index fdff11e16f..ae8baa1d1c 100644 --- a/configs/huawei_hg556a_ram_defconfig +++ b/configs/huawei_hg556a_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="huawei,hg556a" CONFIG_SYS_PROMPT="HG556a # " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6358=y @@ -62,7 +63,6 @@ CONFIG_PHY_RESET_DELAY=20 CONFIG_BCM6348_ETH=y CONFIG_PHY=y CONFIG_BCM6358_USBH_PHY=y -CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y CONFIG_BCM6345_SERIAL=y diff --git a/configs/ib62x0_defconfig b/configs/ib62x0_defconfig index beee58962a..310fb7536b 100644 --- a/configs/ib62x0_defconfig +++ b/configs/ib62x0_defconfig @@ -6,6 +6,7 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/raidsonic/ib62x0/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_IB62X0=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0xE0000 @@ -13,8 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-ib62x0" CONFIG_SYS_PROMPT="ib62x0 => " CONFIG_IDENT_STRING=" RaidSonic ICY BOX IB-NAS62x0" CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/iconnect_defconfig b/configs/iconnect_defconfig index 94f4ee2772..9d20865e01 100644 --- a/configs/iconnect_defconfig +++ b/configs/iconnect_defconfig @@ -56,8 +56,6 @@ CONFIG_MVGBE=y CONFIG_MII=y CONFIG_PCI=y CONFIG_PCI_MVEBU=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/igep00x0_defconfig b/configs/igep00x0_defconfig index 997c2df975..794d0513a8 100644 --- a/configs/igep00x0_defconfig +++ b/configs/igep00x0_defconfig @@ -3,14 +3,14 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_ENV_SIZE=0x8000 CONFIG_DEFAULT_DEVICE_TREE="omap3-igep0020" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_IGEP00X0=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTDELAY=3 diff --git a/configs/imgtec_xilfpga_defconfig b/configs/imgtec_xilfpga_defconfig index a0632bcbc4..cc390f52f1 100644 --- a/configs/imgtec_xilfpga_defconfig +++ b/configs/imgtec_xilfpga_defconfig @@ -2,6 +2,8 @@ CONFIG_MIPS=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_MALLOC_LEN=0x40000 CONFIG_SYS_MALLOC_F_LEN=0x600 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x87fff000 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="nexys4ddr" CONFIG_SYS_PROMPT="MIPSfpga # " @@ -12,8 +14,6 @@ CONFIG_MIPS_CACHE_SETUP=y CONFIG_MIPS_CACHE_DISABLE=y # CONFIG_MIPS_BOOT_ENV_LEGACY is not set CONFIG_MIPS_BOOT_FDT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x87fff000 CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=5 # CONFIG_DISPLAY_BOARDINFO is not set diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig index b29c62fc59..e73a7abbb6 100644 --- a/configs/imx28_xea_defconfig +++ b/configs/imx28_xea_defconfig @@ -15,6 +15,7 @@ CONFIG_SPL_TEXT_BASE=0x1000 CONFIG_TARGET_XEA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x20000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x90000 @@ -37,7 +38,6 @@ CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x20000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x0 CONFIG_SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG=y diff --git a/configs/imx6q_bosch_acc_defconfig b/configs/imx6q_bosch_acc_defconfig index b29b31561f..68a63f8a4b 100644 --- a/configs/imx6q_bosch_acc_defconfig +++ b/configs/imx6q_bosch_acc_defconfig @@ -81,7 +81,6 @@ CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_SYS_MMC_ENV_PART=1 -CONFIG_ENV_APPEND=y CONFIG_ENV_WRITEABLE_LIST=y CONFIG_ENV_ACCESS_IGNORE_FORCE=y CONFIG_VERSION_VARIABLE=y diff --git a/configs/imx6qdl_icore_mipi_defconfig b/configs/imx6qdl_icore_mipi_defconfig index 8dd5e89511..6cd6bf792f 100644 --- a/configs/imx6qdl_icore_mipi_defconfig +++ b/configs/imx6qdl_icore_mipi_defconfig @@ -28,7 +28,6 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 diff --git a/configs/imx6qdl_icore_mmc_defconfig b/configs/imx6qdl_icore_mmc_defconfig index 05925d8b93..a0b91b677d 100644 --- a/configs/imx6qdl_icore_mmc_defconfig +++ b/configs/imx6qdl_icore_mmc_defconfig @@ -31,7 +31,6 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 diff --git a/configs/imx6qdl_icore_rqs_defconfig b/configs/imx6qdl_icore_rqs_defconfig index 3bab6739d0..0d4919c0c4 100644 --- a/configs/imx6qdl_icore_rqs_defconfig +++ b/configs/imx6qdl_icore_rqs_defconfig @@ -25,7 +25,6 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_SUPPORT_RAW_INITRD=y CONFIG_BOOTDELAY=3 diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig index 80b801f9fe..659bddfe33 100644 --- a/configs/imx8mm-cl-iot-gate-optee_defconfig +++ b/configs/imx8mm-cl-iot-gate-optee_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_DISTRO_DEFAULTS=y @@ -22,7 +23,6 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -30,7 +30,6 @@ CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig index e8e9d23c2e..8bca12cfe2 100644 --- a/configs/imx8mm-cl-iot-gate_defconfig +++ b/configs/imx8mm-cl-iot-gate_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x204000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -24,7 +25,6 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -32,7 +32,6 @@ CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig index 846efa52f8..f57db8243f 100644 --- a/configs/imx8mm-icore-mx8mm-ctouch2_defconfig +++ b/configs/imx8mm-icore-mx8mm-ctouch2_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_DISTRO_DEFAULTS=y @@ -22,7 +23,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-ctouch2.dtb" CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -30,7 +30,6 @@ CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig index 2814d3b3cb..7a7170b881 100644 --- a/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig +++ b/configs/imx8mm-icore-mx8mm-edimm2.2_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_DISTRO_DEFAULTS=y @@ -22,7 +23,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mm-icore-mx8mm-edimm2.2.dtb" CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -30,7 +30,6 @@ CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mm-mx8menlo_defconfig b/configs/imx8mm-mx8menlo_defconfig index f1e48bba96..cc81cc0f9f 100644 --- a/configs/imx8mm-mx8menlo_defconfig +++ b/configs/imx8mm-mx8menlo_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0xFFFFDE00 @@ -28,7 +29,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTCOMMAND="mmc partconf 0 distro_bootpart && load ${devtype} ${devnum}:${distro_bootpart} ${loadaddr} boot/fitImage && source ${loadaddr}:bootscr-boot.cmd ; reset" CONFIG_DEFAULT_FDT_FILE="imx8mm-mx8menlo.dtb" @@ -42,7 +42,6 @@ CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mm_beacon_defconfig b/configs/imx8mm_beacon_defconfig index 93f6631097..163a2ffbce 100644 --- a/configs/imx8mm_beacon_defconfig +++ b/configs/imx8mm_beacon_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_LTO=y @@ -22,7 +23,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; fi;" @@ -31,7 +31,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mm_data_modul_edm_sbc_defconfig b/configs/imx8mm_data_modul_edm_sbc_defconfig index d9821885c3..7131d8df80 100644 --- a/configs/imx8mm_data_modul_edm_sbc_defconfig +++ b/configs/imx8mm_data_modul_edm_sbc_defconfig @@ -14,11 +14,13 @@ CONFIG_DEFAULT_DEVICE_TREE="imx8mm-data-modul-edm-sbc" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MM_DATA_MODUL_EDM_SBC=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0xFFFC0000 @@ -31,7 +33,6 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_BOOTARGS=y @@ -51,7 +52,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 @@ -210,7 +210,6 @@ CONFIG_DM_REGULATOR_BD71837=y CONFIG_SPL_DM_REGULATOR_BD71837=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_RESET=y CONFIG_DM_RTC=y CONFIG_RTC_M41T62=y CONFIG_DM_SERIAL=y diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig index 5d1f30a660..c5a4e0fe54 100644 --- a/configs/imx8mm_evk_defconfig +++ b/configs/imx8mm_evk_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_LTO=y @@ -23,7 +24,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -31,7 +31,6 @@ CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mm_evk_fspi_defconfig b/configs/imx8mm_evk_fspi_defconfig index 7c43dcf05c..d76ce153a2 100644 --- a/configs/imx8mm_evk_fspi_defconfig +++ b/configs/imx8mm_evk_fspi_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x40480000 CONFIG_DISTRO_DEFAULTS=y @@ -23,7 +24,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 @@ -32,7 +32,6 @@ CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mm_phg_defconfig b/configs/imx8mm_phg_defconfig index 2821b8837a..5264a03f1b 100644 --- a/configs/imx8mm_phg_defconfig +++ b/configs/imx8mm_phg_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x204000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -23,7 +24,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_HAS_BSS_LINKER_SECTION=y @@ -31,7 +31,6 @@ CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mm_venice_defconfig b/configs/imx8mm_venice_defconfig index 65031ab64d..d35aefd4be 100644 --- a/configs/imx8mm_venice_defconfig +++ b/configs/imx8mm_venice_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xff8000 CONFIG_SYS_LOAD_ADDR=0x48200000 @@ -26,7 +27,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y @@ -36,7 +36,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig index ba6856eafb..51148c9952 100644 --- a/configs/imx8mn_beacon_2g_defconfig +++ b/configs/imx8mn_beacon_2g_defconfig @@ -14,8 +14,10 @@ CONFIG_SPL_TEXT_BASE=0x912000 CONFIG_TARGET_IMX8MN_BEACON=y CONFIG_IMX8MN_BEACON_2GB_LPDDR=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x980000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x42000000 @@ -27,12 +29,10 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" -CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x950000 @@ -40,7 +40,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x980000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 @@ -126,7 +125,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_BD71837=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig index c73f7d7082..b39595b4fe 100644 --- a/configs/imx8mn_beacon_defconfig +++ b/configs/imx8mn_beacon_defconfig @@ -13,8 +13,10 @@ CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit" CONFIG_SPL_TEXT_BASE=0x912000 CONFIG_TARGET_IMX8MN_BEACON=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x980000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x42000000 @@ -26,12 +28,10 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" -CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x950000 @@ -39,7 +39,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x980000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 @@ -130,7 +129,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_BD71837=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y diff --git a/configs/imx8mn_beacon_fspi_defconfig b/configs/imx8mn_beacon_fspi_defconfig index 27b60824f3..0ad3a0ef82 100644 --- a/configs/imx8mn_beacon_fspi_defconfig +++ b/configs/imx8mn_beacon_fspi_defconfig @@ -13,8 +13,10 @@ CONFIG_DEFAULT_DEVICE_TREE="imx8mn-beacon-kit" CONFIG_SPL_TEXT_BASE=0x912000 CONFIG_TARGET_IMX8MN_BEACON=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x980000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x42000000 @@ -26,12 +28,10 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" CONFIG_DEFAULT_FDT_FILE="imx8mn-beacon-kit.dtb" -CONFIG_ARCH_MISC_INIT=y CONFIG_SPL_MAX_SIZE=0x25000 CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x950000 @@ -39,7 +39,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x980000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 @@ -130,7 +129,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_BD71837=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y diff --git a/configs/imx8mn_bsh_smm_s2_defconfig b/configs/imx8mn_bsh_smm_s2_defconfig index 47f4e15e5d..5ba71aea11 100644 --- a/configs/imx8mn_bsh_smm_s2_defconfig +++ b/configs/imx8mn_bsh_smm_s2_defconfig @@ -14,6 +14,7 @@ CONFIG_TARGET_IMX8MN_BSH_SMM_S2=y CONFIG_SYS_PROMPT="> " CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x980000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -23,7 +24,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-bsh-smm-s2.dtb" CONFIG_ARCH_MISC_INIT=y @@ -35,7 +35,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x980000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mn_bsh_smm_s2pro_defconfig b/configs/imx8mn_bsh_smm_s2pro_defconfig index 5092ec1206..88d12ed0db 100644 --- a/configs/imx8mn_bsh_smm_s2pro_defconfig +++ b/configs/imx8mn_bsh_smm_s2pro_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x980000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -24,7 +25,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-bsh-smm-s2pro.dtb" CONFIG_ARCH_MISC_INIT=y @@ -36,7 +36,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x980000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig index e238122d25..734a892e26 100644 --- a/configs/imx8mn_ddr4_evk_defconfig +++ b/configs/imx8mn_ddr4_evk_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x980000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x42000000 @@ -23,7 +24,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mn-ddr4-evk.dtb" CONFIG_ARCH_MISC_INIT=y @@ -35,7 +35,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x980000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig index 777b01a0f2..7651b2cefe 100644 --- a/configs/imx8mn_evk_defconfig +++ b/configs/imx8mn_evk_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x980000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x42000000 @@ -23,7 +24,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mn-evk.dtb" CONFIG_ARCH_MISC_INIT=y @@ -38,7 +38,6 @@ CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x980000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mn_var_som_defconfig b/configs/imx8mn_var_som_defconfig index 560b445a9c..4e50163a0a 100644 --- a/configs/imx8mn_var_som_defconfig +++ b/configs/imx8mn_var_som_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_PROMPT="> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x980000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -25,7 +26,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="freescale/imx8mn-var-som-symphony.dtb" CONFIG_ARCH_MISC_INIT=y @@ -36,7 +36,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x980000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mn_venice_defconfig b/configs/imx8mn_venice_defconfig index d785915fa2..c5cba9da9b 100644 --- a/configs/imx8mn_venice_defconfig +++ b/configs/imx8mn_venice_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x980000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xff8000 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -27,7 +28,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y @@ -39,7 +39,6 @@ CONFIG_SPL_BSS_START_ADDR=0x950000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x980000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig index e3588473d5..fe076b569b 100644 --- a/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig +++ b/configs/imx8mp-icore-mx8mp-edimm2.2_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x960000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -26,7 +27,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mp-icore-mx8mp-edimm2.2.dtb" CONFIG_BOARD_LATE_INIT=y @@ -38,7 +38,6 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x960000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mp_dhcom_pdk2_defconfig b/configs/imx8mp_dhcom_pdk2_defconfig index 34796560fa..6452c219e2 100644 --- a/configs/imx8mp_dhcom_pdk2_defconfig +++ b/configs/imx8mp_dhcom_pdk2_defconfig @@ -15,11 +15,13 @@ CONFIG_DEFAULT_DEVICE_TREE="imx8mp-dhcom-pdk2" CONFIG_SPL_TEXT_BASE=0x920000 CONFIG_TARGET_IMX8MP_DH_DHCOM_PDK2=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x30370090 +CONFIG_SPL_STACK=0x96fc00 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_DEBUG_UART_BASE=0x30860000 @@ -35,7 +37,6 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x44000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_BOOTARGS=y @@ -54,7 +55,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x96fc00 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x4c000000 @@ -222,7 +222,6 @@ CONFIG_DM_REGULATOR_PCA9450=y CONFIG_SPL_DM_REGULATOR_PCA9450=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_RESET=y CONFIG_DM_RTC=y CONFIG_RTC_M41T62=y CONFIG_CONS_INDEX=2 diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 10802eb961..13caa53257 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x960000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -26,7 +27,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mp-evk.dtb" CONFIG_BOARD_LATE_INIT=y @@ -38,7 +38,6 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x960000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mp_rsb3720a1_4G_defconfig b/configs/imx8mp_rsb3720a1_4G_defconfig index 5e29320b26..99188f5dd6 100644 --- a/configs/imx8mp_rsb3720a1_4G_defconfig +++ b/configs/imx8mp_rsb3720a1_4G_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x960000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -29,7 +30,6 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mp-rsb3720-a1.dtb" @@ -44,7 +44,6 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x960000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mp_rsb3720a1_6G_defconfig b/configs/imx8mp_rsb3720a1_6G_defconfig index 11c3e1ffef..0650f62b4d 100644 --- a/configs/imx8mp_rsb3720a1_6G_defconfig +++ b/configs/imx8mp_rsb3720a1_6G_defconfig @@ -18,6 +18,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x960000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -29,7 +30,6 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mp-rsb3720-a1.dtb" @@ -44,7 +44,6 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x960000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mp_venice_defconfig b/configs/imx8mp_venice_defconfig index 220b2a2cff..790b58bbae 100644 --- a/configs/imx8mp_venice_defconfig +++ b/configs/imx8mp_venice_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x960000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xff8000 CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -27,7 +28,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_PREBOOT=y @@ -39,7 +39,6 @@ CONFIG_SPL_BSS_START_ADDR=0x98fc00 CONFIG_SPL_BSS_MAX_SIZE=0x400 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x960000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig index ad42237a0c..9e66473bd8 100644 --- a/configs/imx8mq_cm_defconfig +++ b/configs/imx8mq_cm_defconfig @@ -17,6 +17,7 @@ CONFIG_TARGET_IMX8MQ_CM=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x187ff0 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -26,7 +27,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_MAX_SIZE=0x1f000 @@ -35,7 +35,6 @@ CONFIG_SPL_BSS_START_ADDR=0x180000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig index 79a27dedb3..b23e7ffb45 100644 --- a/configs/imx8mq_evk_defconfig +++ b/configs/imx8mq_evk_defconfig @@ -15,9 +15,11 @@ CONFIG_DEFAULT_DEVICE_TREE="imx8mq-evk" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MQ_EVK=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x187ff0 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -27,7 +29,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y @@ -37,7 +38,6 @@ CONFIG_SPL_BSS_START_ADDR=0x180000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 @@ -93,7 +93,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_POWER_I2C=y -CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_DM_THERMAL=y diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig index 7169e4d3f9..bcf48c55aa 100644 --- a/configs/imx8mq_phanbell_defconfig +++ b/configs/imx8mq_phanbell_defconfig @@ -14,9 +14,11 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx8mq-phanbell" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_IMX8MQ_PHANBELL=y +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x187ff0 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -25,7 +27,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_SD_BOOT=y CONFIG_USE_BOOTCOMMAND=y @@ -37,7 +38,6 @@ CONFIG_SPL_BSS_START_ADDR=0x180000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 @@ -93,7 +93,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_POWER_I2C=y -CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_DM_THERMAL=y diff --git a/configs/imx8qm_mek_defconfig b/configs/imx8qm_mek_defconfig index 4fc828681b..7f7a20e5a2 100644 --- a/configs/imx8qm_mek_defconfig +++ b/configs/imx8qm_mek_defconfig @@ -7,6 +7,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y @@ -16,12 +18,11 @@ CONFIG_TARGET_IMX8QM_MEK=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x13e000 CONFIG_SPL=y CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qm_mek/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -39,7 +40,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x13e000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x120000 diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig index 7819bef863..83f0776827 100644 --- a/configs/imx8qm_rom7720_a1_4G_defconfig +++ b/configs/imx8qm_rom7720_a1_4G_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y @@ -16,13 +18,10 @@ CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x80280000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" diff --git a/configs/imx8qxp_mek_defconfig b/configs/imx8qxp_mek_defconfig index a00951a3b0..f34b988c2e 100644 --- a/configs/imx8qxp_mek_defconfig +++ b/configs/imx8qxp_mek_defconfig @@ -7,6 +7,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 CONFIG_DM_GPIO=y @@ -16,12 +18,11 @@ CONFIG_TARGET_IMX8QXP_MEK=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x13e000 CONFIG_SPL=y CONFIG_SPL_LOAD_IMX_CONTAINER=y CONFIG_IMX_CONTAINER_CFG="board/freescale/imx8qxp_mek/uboot-container.cfg" CONFIG_SYS_LOAD_ADDR=0x80280000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 @@ -39,7 +40,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x1000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x13e000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x120000 diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig index 4c15c7fd19..f4b9d3c9fb 100644 --- a/configs/imx8ulp_evk_defconfig +++ b/configs/imx8ulp_evk_defconfig @@ -14,6 +14,7 @@ CONFIG_SPL_TEXT_BASE=0x22020000 CONFIG_TARGET_IMX8ULP_EVK=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x22050000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 CONFIG_SPL_LOAD_IMX_CONTAINER=y @@ -35,7 +36,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x22050000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x22040000 diff --git a/configs/imx93_11x11_evk_defconfig b/configs/imx93_11x11_evk_defconfig index 64da123c37..477fb25807 100644 --- a/configs/imx93_11x11_evk_defconfig +++ b/configs/imx93_11x11_evk_defconfig @@ -15,6 +15,7 @@ CONFIG_TARGET_IMX93_11X11_EVK=y CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x2051ddd0 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x88000000 CONFIG_SPL_LOAD_IMX_CONTAINER=y @@ -35,7 +36,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x2051ddd0 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x83200000 diff --git a/configs/imxrt1020-evk_defconfig b/configs/imxrt1020-evk_defconfig index 2ae9067f72..a71de4960a 100644 --- a/configs/imxrt1020-evk_defconfig +++ b/configs/imxrt1020-evk_defconfig @@ -7,6 +7,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20240000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imxrt1020-evk" @@ -18,8 +20,6 @@ CONFIG_SPL_SIZE_LIMIT=0x20000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x20209000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20240000 CONFIG_SD_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/imxrt1050-evk_defconfig b/configs/imxrt1050-evk_defconfig index 4e5aa22201..f451a0d0d6 100644 --- a/configs/imxrt1050-evk_defconfig +++ b/configs/imxrt1050-evk_defconfig @@ -9,6 +9,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20280000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imxrt1050-evk" @@ -20,8 +22,6 @@ CONFIG_SPL_SIZE_LIMIT=0x20000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x20209000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20280000 CONFIG_SD_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y diff --git a/configs/imxrt1170-evk_defconfig b/configs/imxrt1170-evk_defconfig index 98d6559a46..0030733e09 100644 --- a/configs/imxrt1170-evk_defconfig +++ b/configs/imxrt1170-evk_defconfig @@ -9,6 +9,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20340000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imxrt1170-evk" @@ -20,8 +22,6 @@ CONFIG_SPL_SIZE_LIMIT=0x20000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x202C0000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20340000 CONFIG_SD_BOOT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y diff --git a/configs/inetspace_v2_defconfig b/configs/inetspace_v2_defconfig index 1fa1a5afa7..6a81b979a7 100644 --- a/configs/inetspace_v2_defconfig +++ b/configs/inetspace_v2_defconfig @@ -6,6 +6,7 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage-is2.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x70000 @@ -15,8 +16,6 @@ CONFIG_SYS_PROMPT="ns2> " CONFIG_IDENT_STRING=" IS v2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/integratorap_cm720t_defconfig b/configs/integratorap_cm720t_defconfig index 444953db91..15f2680eb6 100644 --- a/configs/integratorap_cm720t_defconfig +++ b/configs/integratorap_cm720t_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_MALLOC_LEN=0x28000 CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_CM720T=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_PROMPT="Integrator-AP # " CONFIG_SYS_LOAD_ADDR=0x7fc0 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/integratorap_cm920t_defconfig b/configs/integratorap_cm920t_defconfig index 6eb912c1a1..f850cca80f 100644 --- a/configs/integratorap_cm920t_defconfig +++ b/configs/integratorap_cm920t_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_MALLOC_LEN=0x28000 CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_CM920T=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_PROMPT="Integrator-AP # " CONFIG_SYS_LOAD_ADDR=0x7fc0 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/integratorap_cm926ejs_defconfig b/configs/integratorap_cm926ejs_defconfig index 023b84200e..aac4fbf811 100644 --- a/configs/integratorap_cm926ejs_defconfig +++ b/configs/integratorap_cm926ejs_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_MALLOC_LEN=0x28000 CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_CM926EJ_S=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_PROMPT="Integrator-AP # " CONFIG_SYS_LOAD_ADDR=0x7fc0 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/integratorap_cm946es_defconfig b/configs/integratorap_cm946es_defconfig index fab7274068..b00e20dcb1 100644 --- a/configs/integratorap_cm946es_defconfig +++ b/configs/integratorap_cm946es_defconfig @@ -5,11 +5,11 @@ CONFIG_SYS_MALLOC_LEN=0x28000 CONFIG_ARCH_INTEGRATOR_AP=y CONFIG_CM946ES=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_ENV_SIZE=0x8000 CONFIG_SYS_PROMPT="Integrator-AP # " CONFIG_SYS_LOAD_ADDR=0x7fc0 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock0 console=ttyAM0 console=tty" CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/integratorcp_cm1136_defconfig b/configs/integratorcp_cm1136_defconfig index 6d9d0e8999..3197d70eda 100644 --- a/configs/integratorcp_cm1136_defconfig +++ b/configs/integratorcp_cm1136_defconfig @@ -5,13 +5,13 @@ CONFIG_SYS_MALLOC_LEN=0x22000 CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CM1136=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_PROMPT="Integrator-CP # " CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_ENV_ADDR=0x24F00000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SYS_MONITOR_BASE=0x27F40000 CONFIG_USE_BOOTARGS=y diff --git a/configs/integratorcp_cm920t_defconfig b/configs/integratorcp_cm920t_defconfig index 2d40a5f937..0d4064439c 100644 --- a/configs/integratorcp_cm920t_defconfig +++ b/configs/integratorcp_cm920t_defconfig @@ -5,13 +5,13 @@ CONFIG_SYS_MALLOC_LEN=0x22000 CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CM920T=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_PROMPT="Integrator-CP # " CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_ENV_ADDR=0x24F00000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SYS_MONITOR_BASE=0x27F40000 CONFIG_USE_BOOTARGS=y diff --git a/configs/integratorcp_cm926ejs_defconfig b/configs/integratorcp_cm926ejs_defconfig index 4505123d4f..194c0d8015 100644 --- a/configs/integratorcp_cm926ejs_defconfig +++ b/configs/integratorcp_cm926ejs_defconfig @@ -5,13 +5,13 @@ CONFIG_SYS_MALLOC_LEN=0x22000 CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CM926EJ_S=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_PROMPT="Integrator-CP # " CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_ENV_ADDR=0x24F00000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SYS_MONITOR_BASE=0x27F40000 CONFIG_USE_BOOTARGS=y diff --git a/configs/integratorcp_cm946es_defconfig b/configs/integratorcp_cm946es_defconfig index bbdf86baeb..25265c2ca4 100644 --- a/configs/integratorcp_cm946es_defconfig +++ b/configs/integratorcp_cm946es_defconfig @@ -5,13 +5,13 @@ CONFIG_SYS_MALLOC_LEN=0x22000 CONFIG_ARCH_INTEGRATOR_CP=y CONFIG_CM946ES=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SYS_PROMPT="Integrator-CP # " CONFIG_SYS_LOAD_ADDR=0x7fc0 CONFIG_ENV_ADDR=0x24F00000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff20 CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_SYS_MONITOR_BASE=0x27F40000 CONFIG_USE_BOOTARGS=y diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig index 4ae85f391b..82b8383e4d 100644 --- a/configs/iot2050_defconfig +++ b/configs/iot2050_defconfig @@ -9,6 +9,8 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_AM654=y CONFIG_TARGET_IOT2050_A53=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80100000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 CONFIG_ENV_SECT_SIZE=0x20000 @@ -17,17 +19,15 @@ CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-am6528-iot2050-basic" CONFIG_SPL_TEXT_BASE=0x80080000 CONFIG_SYS_PROMPT="IOT2050> " +CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_STACK_R_ADDR=0x82000000 CONFIG_ENV_OFFSET_REDUND=0x6a0000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80100000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTSTAGE=y CONFIG_SHOW_BOOT_PROGRESS=y @@ -120,7 +120,6 @@ CONFIG_PINCTRL_SINGLE=y CONFIG_POWER_DOMAIN=y CONFIG_TI_SCI_POWER_DOMAIN=y CONFIG_REMOTEPROC_TI_K3_R5F=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/iot_devkit_defconfig b/configs/iot_devkit_defconfig index ddc3a2b651..4a5bfc5e1a 100644 --- a/configs/iot_devkit_defconfig +++ b/configs/iot_devkit_defconfig @@ -7,14 +7,14 @@ CONFIG_TARGET_IOT_DEVKIT=y CONFIG_TEXT_BASE=0x00000000 CONFIG_SYS_MALLOC_LEN=0x10000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80008000 CONFIG_ENV_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="iot_devkit" CONFIG_SYS_PROMPT="IoTDK# " CONFIG_SYS_CLK_FREQ=16000000 CONFIG_SYS_LOAD_ADDR=0x30000000 CONFIG_LOCALVERSION="-iotdk-1.0" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80008000 # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=280 diff --git a/configs/j7200_evm_a72_defconfig b/configs/j7200_evm_a72_defconfig index 053f29b11f..74903138e5 100644 --- a/configs/j7200_evm_a72_defconfig +++ b/configs/j7200_evm_a72_defconfig @@ -8,12 +8,15 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J7200_A72_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -25,12 +28,9 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 @@ -170,7 +170,6 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_REMOTEPROC_TI_K3_R5F=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/j7200_evm_r5_defconfig b/configs/j7200_evm_r5_defconfig index dc6c1b6935..00ec48b83b 100644 --- a/configs/j7200_evm_r5_defconfig +++ b/configs/j7200_evm_r5_defconfig @@ -8,11 +8,14 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SOC_K3_J721E=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_J7200_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-r5-common-proc-board" CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -21,13 +24,10 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0xc0000 @@ -137,7 +137,6 @@ CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_TPS65941=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/j7200_hs_evm_a72_defconfig b/configs/j7200_hs_evm_a72_defconfig index 782a42b746..e4f3c462ca 100644 --- a/configs/j7200_hs_evm_a72_defconfig +++ b/configs/j7200_hs_evm_a72_defconfig @@ -9,12 +9,15 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J7200_A72_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -26,12 +29,9 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" CONFIG_LOGLEVEL=7 @@ -171,7 +171,6 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_REMOTEPROC_TI_K3_R5F=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/j7200_hs_evm_r5_defconfig b/configs/j7200_hs_evm_r5_defconfig index 73979f4cc3..94a6523f06 100644 --- a/configs/j7200_hs_evm_r5_defconfig +++ b/configs/j7200_hs_evm_r5_defconfig @@ -9,11 +9,14 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SOC_K3_J721E=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_J7200_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j7200-r5-common-proc-board" CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -22,12 +25,9 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_MAX_SIZE=0xc0000 @@ -137,7 +137,6 @@ CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_TPS65941=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/j721e_evm_a72_defconfig b/configs/j721e_evm_a72_defconfig index 5efaff26d2..2190df1f3a 100644 --- a/configs/j721e_evm_a72_defconfig +++ b/configs/j721e_evm_a72_defconfig @@ -8,11 +8,14 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J721E_A72_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -23,12 +26,9 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 @@ -174,7 +174,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_REMOTEPROC_TI_K3_DSP=y CONFIG_REMOTEPROC_TI_K3_R5F=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/j721e_evm_r5_defconfig b/configs/j721e_evm_r5_defconfig index 9d333e4905..16fa386792 100644 --- a/configs/j721e_evm_r5_defconfig +++ b/configs/j721e_evm_r5_defconfig @@ -8,11 +8,14 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SOC_K3_J721E=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_J721E_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -21,13 +24,10 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set @@ -143,7 +143,6 @@ CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_TPS65941=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/j721e_hs_evm_a72_defconfig b/configs/j721e_hs_evm_a72_defconfig index ec66b18740..7aba55c2d4 100644 --- a/configs/j721e_hs_evm_a72_defconfig +++ b/configs/j721e_hs_evm_a72_defconfig @@ -9,11 +9,14 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_J721E=y CONFIG_TARGET_J721E_A72_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -24,12 +27,9 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run main_cpsw0_qsgmii_phyinit; run boot_rprocs; run get_fit_${boot}; run get_overlay_${boot}; run run_fit" CONFIG_LOGLEVEL=7 @@ -175,7 +175,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_REMOTEPROC_TI_K3_DSP=y CONFIG_REMOTEPROC_TI_K3_R5F=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/j721e_hs_evm_r5_defconfig b/configs/j721e_hs_evm_r5_defconfig index e496ec85af..7d6a047f3a 100644 --- a/configs/j721e_hs_evm_r5_defconfig +++ b/configs/j721e_hs_evm_r5_defconfig @@ -9,11 +9,14 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SOC_K3_J721E=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_J721E_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board" CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -22,12 +25,9 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41cf5bfc # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set @@ -143,7 +143,6 @@ CONFIG_SPL_DM_REGULATOR=y CONFIG_DM_REGULATOR_TPS65941=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/j721s2_evm_a72_defconfig b/configs/j721s2_evm_a72_defconfig index 84b4fb0831..eae4c109e5 100644 --- a/configs/j721s2_evm_a72_defconfig +++ b/configs/j721s2_evm_a72_defconfig @@ -8,29 +8,27 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_J721S2=y CONFIG_TARGET_J721S2_A72_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_ENV_SIZE=0x20000 -CONFIG_ENV_OFFSET=0x680000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721s2-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x82000000 -CONFIG_ENV_OFFSET_REDUND=0x6A0000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern" CONFIG_LOGLEVEL=7 @@ -88,13 +86,13 @@ CONFIG_CMD_UBI=y # CONFIG_SPL_EFI_PARTITION is not set CONFIG_OF_CONTROL=y CONFIG_SPL_OF_CONTROL=y -CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_OF_LIST="k3-j721s2-common-proc-board k3-am68-sk-base-board" +CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_FAT=y -CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_REDUNDAND_ENVIRONMENT=y +CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_SPL_DM=y @@ -180,7 +178,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_REMOTEPROC_TI_K3_DSP=y CONFIG_REMOTEPROC_TI_K3_R5F=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/j721s2_evm_r5_defconfig b/configs/j721s2_evm_r5_defconfig index 1f2102a9f9..343e3c1630 100644 --- a/configs/j721s2_evm_r5_defconfig +++ b/configs/j721s2_evm_r5_defconfig @@ -8,11 +8,14 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SOC_K3_J721S2=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_J721S2_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c76000 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721s2-r5-common-proc-board" CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -23,13 +26,10 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c76000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y @@ -87,8 +87,8 @@ CONFIG_SPL_OF_CONTROL=y CONFIG_SPL_MULTI_DTB_FIT=y CONFIG_SPL_OF_LIST="k3-j721s2-r5-common-proc-board k3-am68-sk-r5-base-board" CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y -CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ENV_OVERWRITE=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_REGMAP=y @@ -145,7 +145,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_TI_POWER_DOMAIN=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/j721s2_hs_evm_a72_defconfig b/configs/j721s2_hs_evm_a72_defconfig index 9fc90737da..dff12ab82b 100644 --- a/configs/j721s2_hs_evm_a72_defconfig +++ b/configs/j721s2_hs_evm_a72_defconfig @@ -9,12 +9,15 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_SOC_K3_J721S2=y CONFIG_TARGET_J721S2_A72_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x680000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721s2-common-proc-board" CONFIG_SPL_TEXT_BASE=0x80080000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -26,12 +29,9 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y # CONFIG_PSCI_RESET is not set CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80480000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x81000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit" CONFIG_LOGLEVEL=7 @@ -178,7 +178,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_REMOTEPROC_TI_K3_DSP=y CONFIG_REMOTEPROC_TI_K3_R5F=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_SCSI=y CONFIG_DM_SCSI=y diff --git a/configs/j721s2_hs_evm_r5_defconfig b/configs/j721s2_hs_evm_r5_defconfig index d9988fc17f..c8433a1de9 100644 --- a/configs/j721s2_hs_evm_r5_defconfig +++ b/configs/j721s2_hs_evm_r5_defconfig @@ -9,11 +9,14 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_SOC_K3_J721S2=y CONFIG_K3_EARLY_CONS=y CONFIG_TARGET_J721S2_R5_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c76000 CONFIG_ENV_SIZE=0x20000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="k3-j721s2-r5-common-proc-board" CONFIG_SPL_TEXT_BASE=0x41c00000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y @@ -24,12 +27,9 @@ CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41c76000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80080000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTCOMMAND=y # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SPL_SIZE_LIMIT_SUBTRACT_GD=y @@ -140,7 +140,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_TI_POWER_DOMAIN=y CONFIG_K3_SYSTEM_CONTROLLER=y CONFIG_REMOTEPROC_TI_K3_ARM64=y -CONFIG_DM_RESET=y CONFIG_RESET_TI_SCI=y CONFIG_DM_SERIAL=y CONFIG_SOC_DEVICE=y diff --git a/configs/jethub_j100_defconfig b/configs/jethub_j100_defconfig index dac775bd3b..514005d229 100644 --- a/configs/jethub_j100_defconfig +++ b/configs/jethub_j100_defconfig @@ -4,17 +4,18 @@ CONFIG_SYS_CONFIG_NAME="jethub" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-axg-jethome-jethub-j100" +CONFIG_DM_RESET=y CONFIG_MESON_AXG=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" jethubj100" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -48,7 +49,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_AXG=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DM_RTC=y CONFIG_RTC_PCF8563=y CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/jethub_j80_defconfig b/configs/jethub_j80_defconfig index 1d11a961b9..7f404dd726 100644 --- a/configs/jethub_j80_defconfig +++ b/configs/jethub_j80_defconfig @@ -4,17 +4,18 @@ CONFIG_SYS_CONFIG_NAME="jethub" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905w-jethome-jethub-j80" +CONFIG_DM_RESET=y CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" jethubj80" CONFIG_SYS_LOAD_ADDR=0x01000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y @@ -52,7 +53,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXL=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DM_RTC=y CONFIG_RTC_PCF8563=y CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index d935e784ab..fc5360a50c 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra124-jetson-tk1" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Tegra124 (Jetson TK1) # " +CONFIG_SPL_STACK=0x800ffffc CONFIG_TEGRA124=y CONFIG_TARGET_JETSON_TK1=y CONFIG_TEGRA_ENABLE_UARTD=y @@ -21,7 +22,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 diff --git a/configs/k2e_evm_defconfig b/configs/k2e_evm_defconfig index 96bcba6e94..376b7579bc 100644 --- a/configs/k2e_evm_defconfig +++ b/configs/k2e_evm_defconfig @@ -12,18 +12,19 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_K2E_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_SPL_TEXT_BASE=0xC100000 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xc1223f4 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" @@ -34,7 +35,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0xc10fff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xc1223f4 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x8000 CONFIG_SPL_I2C=y diff --git a/configs/k2e_hs_evm_defconfig b/configs/k2e_hs_evm_defconfig index 0d1c97dd4b..1e940817ec 100644 --- a/configs/k2e_hs_evm_defconfig +++ b/configs/k2e_hs_evm_defconfig @@ -10,12 +10,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_K2E_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2e-evm" CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" diff --git a/configs/k2g_evm_defconfig b/configs/k2g_evm_defconfig index bded097880..2f954bd5cd 100644 --- a/configs/k2g_evm_defconfig +++ b/configs/k2g_evm_defconfig @@ -12,17 +12,18 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_K2G_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc09ff10 CONFIG_ENV_SIZE=0x40000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_SPL_TEXT_BASE=0xC0A0000 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xc0c23f4 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc09ff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run get_mon_${boot} run_mon; run set_name_pmmc get_pmmc_${boot} run_pmmc; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" @@ -33,7 +34,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0xc0afff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xc0c23f4 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x8000 CONFIG_SPL_I2C=y diff --git a/configs/k2g_hs_evm_defconfig b/configs/k2g_hs_evm_defconfig index a851d85082..1d7f4e7b9a 100644 --- a/configs/k2g_hs_evm_defconfig +++ b/configs/k2g_hs_evm_defconfig @@ -10,11 +10,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_K2G_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc09ff10 CONFIG_ENV_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2g-evm" CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc09ff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run findfdt; run envboot; run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" diff --git a/configs/k2hk_evm_defconfig b/configs/k2hk_evm_defconfig index 2bcf2265c7..293a7711e9 100644 --- a/configs/k2hk_evm_defconfig +++ b/configs/k2hk_evm_defconfig @@ -12,18 +12,19 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_K2HK_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc1fff10 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_SPL_TEXT_BASE=0xC200000 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xc2223f4 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc1fff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" @@ -34,7 +35,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0xc20fff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xc2223f4 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x8000 CONFIG_SPL_I2C=y diff --git a/configs/k2hk_hs_evm_defconfig b/configs/k2hk_hs_evm_defconfig index 94ab680343..39c15f181f 100644 --- a/configs/k2hk_hs_evm_defconfig +++ b/configs/k2hk_hs_evm_defconfig @@ -10,12 +10,12 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_K2HK_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc1fff10 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2hk-evm" CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc1fff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run run_mon_hs; run init_${boot}; run get_fit_${boot}; bootm ${addr_fit}#${name_fdt}" diff --git a/configs/k2l_evm_defconfig b/configs/k2l_evm_defconfig index 153abb7eb9..f255a1d54c 100644 --- a/configs/k2l_evm_defconfig +++ b/configs/k2l_evm_defconfig @@ -12,18 +12,19 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_K2L_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" CONFIG_SPL_TEXT_BASE=0xC100000 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xc1223f4 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_BOOTCOMMAND="run init_${boot}; run get_mon_${boot} run_mon; run get_kern_${boot}; run init_fw_rd_${boot}; run get_fdt_${boot}; run run_kern" @@ -34,7 +35,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0xc10fff8 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xc1223f4 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x8000 CONFIG_SPL_I2C=y diff --git a/configs/k2l_hs_evm_defconfig b/configs/k2l_hs_evm_defconfig index 2990a702d9..dd6246fac7 100644 --- a/configs/k2l_hs_evm_defconfig +++ b/configs/k2l_hs_evm_defconfig @@ -10,11 +10,11 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_NR_DRAM_BANKS=2 CONFIG_TARGET_K2L_EVM=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="keystone-k2l-evm" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0fff10 CONFIG_TIMESTAMP=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/khadas-edge-captain-rk3399_defconfig b/configs/khadas-edge-captain-rk3399_defconfig index f6e90bf392..0651b982f5 100644 --- a/configs/khadas-edge-captain-rk3399_defconfig +++ b/configs/khadas-edge-captain-rk3399_defconfig @@ -4,17 +4,18 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-captain" CONFIG_SYS_PROMPT="kedge# " CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-captain.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -24,7 +25,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/khadas-edge-rk3399_defconfig b/configs/khadas-edge-rk3399_defconfig index f74963cad6..85e18aaa1a 100644 --- a/configs/khadas-edge-rk3399_defconfig +++ b/configs/khadas-edge-rk3399_defconfig @@ -4,17 +4,18 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge" CONFIG_SYS_PROMPT="kedge# " CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -24,7 +25,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/khadas-edge-v-rk3399_defconfig b/configs/khadas-edge-v-rk3399_defconfig index 3abfef15fc..7fe559b49e 100644 --- a/configs/khadas-edge-v-rk3399_defconfig +++ b/configs/khadas-edge-v-rk3399_defconfig @@ -4,17 +4,18 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-khadas-edge-v" CONFIG_SYS_PROMPT="kedge# " CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-khadas-edge-v.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -24,7 +25,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/khadas-vim2_defconfig b/configs/khadas-vim2_defconfig index 3af6b446ec..fc76b1a8c2 100644 --- a/configs/khadas-vim2_defconfig +++ b/configs/khadas-vim2_defconfig @@ -2,17 +2,18 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-khadas-vim2" +CONFIG_DM_RESET=y CONFIG_MESON_GXM=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y @@ -49,7 +50,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXL=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/khadas-vim3_android_ab_defconfig b/configs/khadas-vim3_android_ab_defconfig index f212b862aa..fdc5e1e819 100644 --- a/configs/khadas-vim3_android_ab_defconfig +++ b/configs/khadas-vim3_android_ab_defconfig @@ -4,17 +4,18 @@ CONFIG_SYS_CONFIG_NAME="khadas-vim3_android" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -74,7 +75,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/khadas-vim3_android_defconfig b/configs/khadas-vim3_android_defconfig index 3ac915ef17..90aba62738 100644 --- a/configs/khadas-vim3_android_defconfig +++ b/configs/khadas-vim3_android_defconfig @@ -4,17 +4,18 @@ CONFIG_SYS_CONFIG_NAME="khadas-vim3_android" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -72,7 +73,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/khadas-vim3_defconfig b/configs/khadas-vim3_defconfig index 26a1485517..1a7a4946c5 100644 --- a/configs/khadas-vim3_defconfig +++ b/configs/khadas-vim3_defconfig @@ -3,17 +3,18 @@ CONFIG_SYS_BOARD="vim3" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-a311d-khadas-vim3" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -60,7 +61,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/khadas-vim3l_android_ab_defconfig b/configs/khadas-vim3l_android_ab_defconfig index c3eb25abd9..f966018e73 100644 --- a/configs/khadas-vim3l_android_ab_defconfig +++ b/configs/khadas-vim3l_android_ab_defconfig @@ -4,17 +4,18 @@ CONFIG_SYS_CONFIG_NAME="khadas-vim3l_android" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3l" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -74,7 +75,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/khadas-vim3l_android_defconfig b/configs/khadas-vim3l_android_defconfig index 5e298272e5..34d2325f15 100644 --- a/configs/khadas-vim3l_android_defconfig +++ b/configs/khadas-vim3l_android_defconfig @@ -4,17 +4,18 @@ CONFIG_SYS_CONFIG_NAME="khadas-vim3l_android" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3l" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -72,7 +73,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/khadas-vim3l_defconfig b/configs/khadas-vim3l_defconfig index a3fd6a13de..595092e8a8 100644 --- a/configs/khadas-vim3l_defconfig +++ b/configs/khadas-vim3l_defconfig @@ -3,17 +3,18 @@ CONFIG_SYS_BOARD="vim3" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-khadas-vim3l" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim3l" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -60,7 +61,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/khadas-vim_defconfig b/configs/khadas-vim_defconfig index 6bb2200a6b..a766bdf33e 100644 --- a/configs/khadas-vim_defconfig +++ b/configs/khadas-vim_defconfig @@ -2,17 +2,18 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-khadas-vim" +CONFIG_DM_RESET=y CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" khadas-vim" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y @@ -43,7 +44,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXL=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig index bd4943006c..29c8653079 100644 --- a/configs/kmcent2_defconfig +++ b/configs/kmcent2_defconfig @@ -25,7 +25,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_SYS_MONITOR_BASE=0xEBF40000 -CONFIG_EVENT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_EARLY_INIT_R=y CONFIG_LAST_STAGE_INIT=y diff --git a/configs/koelsch_defconfig b/configs/koelsch_defconfig index 24eff4648e..45fa50725c 100644 --- a/configs/koelsch_defconfig +++ b/configs/koelsch_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -20,14 +22,13 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Koelsch" CONFIG_R8A7791=y CONFIG_TARGET_KOELSCH=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_FIT=y CONFIG_BOOTDELAY=3 @@ -36,7 +37,6 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/kontron-sl-mx6ul_defconfig b/configs/kontron-sl-mx6ul_defconfig index 72a433dbf8..4cb99e3df2 100644 --- a/configs/kontron-sl-mx6ul_defconfig +++ b/configs/kontron-sl-mx6ul_defconfig @@ -25,7 +25,6 @@ CONFIG_SYS_MEMTEST_END=0x90000000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_BOARD_TYPES=y diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig index 4b54813415..a60e0fdbc8 100644 --- a/configs/kontron-sl-mx8mm_defconfig +++ b/configs/kontron-sl-mx8mm_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 +CONFIG_SPL_STACK=0x91fff0 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x1F0000 CONFIG_SPL_SPI_FLASH_SUPPORT=y @@ -28,7 +29,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_BOARD_TYPES=y CONFIG_BOARD_LATE_INIT=y @@ -37,7 +37,6 @@ CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x91fff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/kontron_pitx_imx8m_defconfig b/configs/kontron_pitx_imx8m_defconfig index 898a0b45e8..f102395569 100644 --- a/configs/kontron_pitx_imx8m_defconfig +++ b/configs/kontron_pitx_imx8m_defconfig @@ -14,9 +14,11 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx8mq-kontron-pitx-imx8m" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_KONTRON_PITX_IMX8M=y +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x187ff0 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x42000000 @@ -26,7 +28,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_BOARD_LATE_INIT=y @@ -36,7 +37,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x180000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 @@ -100,7 +100,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_POWER_I2C=y -CONFIG_DM_RESET=y CONFIG_DM_RTC=y CONFIG_RTC_RV8803=y CONFIG_DM_SERIAL=y diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig index 9b90ed478c..e805c4b976 100644 --- a/configs/kontron_sl28_defconfig +++ b/configs/kontron_sl28_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800eff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x3e0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -14,6 +16,7 @@ CONFIG_SPL_TEXT_BASE=0x18010000 CONFIG_SYS_FSL_SDHC_CLK_DIV=1 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SPL_SIZE_LIMIT=0x20000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x0 CONFIG_SPL=y @@ -27,13 +30,10 @@ CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y CONFIG_SYS_FSL_NUM_CC_PLLS=3 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800eff0 CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_OF_STDOUT_VIA_ALIAS=y CONFIG_BOOTDELAY=10 @@ -47,7 +47,6 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x900 diff --git a/configs/kylin-rk3036_defconfig b/configs/kylin-rk3036_defconfig index 646f0086c6..666ed4a8f0 100644 --- a/configs/kylin-rk3036_defconfig +++ b/configs/kylin-rk3036_defconfig @@ -8,6 +8,8 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x60000000 CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3036-sdk" CONFIG_SPL_TEXT_BASE=0x10081000 @@ -19,8 +21,6 @@ CONFIG_DEBUG_UART_BASE=0x20068000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x60800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3036-kylin.dtb" diff --git a/configs/lager_defconfig b/configs/lager_defconfig index 56057e272d..c9dbf697cc 100644 --- a/configs/lager_defconfig +++ b/configs/lager_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -20,14 +22,13 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Lager" CONFIG_R8A7790=y CONFIG_TARGET_LAGER=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_FIT=y CONFIG_BOOTDELAY=3 @@ -36,7 +37,6 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/leez-rk3399_defconfig b/configs/leez-rk3399_defconfig index bee55f8165..c118459688 100644 --- a/configs/leez-rk3399_defconfig +++ b/configs/leez-rk3399_defconfig @@ -4,16 +4,17 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-leez-p710" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-leez-p710.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -22,7 +23,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/legoev3_defconfig b/configs/legoev3_defconfig index 90c1b94b02..bec73ca253 100644 --- a/configs/legoev3_defconfig +++ b/configs/legoev3_defconfig @@ -6,11 +6,11 @@ CONFIG_SYS_MALLOC_LEN=0x110000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TARGET_LEGOEV3=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80010000 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="da850-lego-ev3" CONFIG_SYS_LOAD_ADDR=0xc0700000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80010000 CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=0 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/librem5_defconfig b/configs/librem5_defconfig index 8be8421db3..30162fd775 100644 --- a/configs/librem5_defconfig +++ b/configs/librem5_defconfig @@ -15,9 +15,11 @@ CONFIG_DEFAULT_DEVICE_TREE="imx8mq-librem5-r4" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_LIBREM5=y CONFIG_SYS_PROMPT="u-boot=> " +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x187ff0 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -27,7 +29,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=0 CONFIG_SYS_CONSOLE_IS_IN_ENV=y @@ -41,7 +42,6 @@ CONFIG_SPL_BSS_START_ADDR=0x180000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 @@ -131,7 +131,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_POWER_I2C=y -CONFIG_DM_RESET=y CONFIG_MXC_UART=y CONFIG_SPI=y CONFIG_DM_SPI=y diff --git a/configs/libretech-ac_defconfig b/configs/libretech-ac_defconfig index 2f44771a84..4e08de31ee 100644 --- a/configs/libretech-ac_defconfig +++ b/configs/libretech-ac_defconfig @@ -3,19 +3,20 @@ CONFIG_SYS_CONFIG_NAME="libretech-ac" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s805x-libretech-ac" +CONFIG_DM_RESET=y CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-ac" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y @@ -57,7 +58,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/libretech-cc_defconfig b/configs/libretech-cc_defconfig index 05311d8e08..be5a3189db 100644 --- a/configs/libretech-cc_defconfig +++ b/configs/libretech-cc_defconfig @@ -2,17 +2,18 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc" +CONFIG_DM_RESET=y CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-cc" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -44,7 +45,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/libretech-cc_v2_defconfig b/configs/libretech-cc_v2_defconfig index c88542d151..30b1651554 100644 --- a/configs/libretech-cc_v2_defconfig +++ b/configs/libretech-cc_v2_defconfig @@ -2,19 +2,20 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-libretech-cc-v2" +CONFIG_DM_RESET=y CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-cc-v2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y @@ -51,7 +52,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXL=y CONFIG_POWER_DOMAIN=y CONFIG_MESON_GX_VPU_POWER_DOMAIN=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/libretech-s905d-pc_defconfig b/configs/libretech-s905d-pc_defconfig index 4e3aee7542..6c775cbaf0 100644 --- a/configs/libretech-s905d-pc_defconfig +++ b/configs/libretech-s905d-pc_defconfig @@ -3,19 +3,20 @@ CONFIG_SYS_BOARD="q200" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905d-libretech-pc" +CONFIG_DM_RESET=y CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-s905d-pc" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y @@ -53,7 +54,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/libretech-s912-pc_defconfig b/configs/libretech-s912-pc_defconfig index c9ceb35ff6..6e9e1a657d 100644 --- a/configs/libretech-s912-pc_defconfig +++ b/configs/libretech-s912-pc_defconfig @@ -2,19 +2,20 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-s912-libretech-pc" +CONFIG_DM_RESET=y CONFIG_MESON_GXM=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" libretech-s912-pc" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y @@ -52,7 +53,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/lion-rk3368_defconfig b/configs/lion-rk3368_defconfig index ee401b763d..b12f127bc1 100644 --- a/configs/lion-rk3368_defconfig +++ b/configs/lion-rk3368_defconfig @@ -4,6 +4,8 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3368-lion-haikou" CONFIG_SPL_TEXT_BASE=0x00000000 @@ -12,6 +14,7 @@ CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x188000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -19,8 +22,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y @@ -40,7 +41,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x20000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x188000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x4000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 diff --git a/configs/ls1012a2g5rdb_qspi_defconfig b/configs/ls1012a2g5rdb_qspi_defconfig index b551f5bdee..a16b4a9706 100644 --- a/configs/ls1012a2g5rdb_qspi_defconfig +++ b/configs/ls1012a2g5rdb_qspi_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1012A2G5RDB=y CONFIG_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -16,8 +18,6 @@ CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012afrdm_qspi_defconfig b/configs/ls1012afrdm_qspi_defconfig index f1c9169a72..14d9541f22 100644 --- a/configs/ls1012afrdm_qspi_defconfig +++ b/configs/ls1012afrdm_qspi_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1012AFRDM=y CONFIG_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -15,8 +17,6 @@ CONFIG_LAYERSCAPE_NS_ACCESS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig index ff5e323d57..a85fc3ef47 100644 --- a/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012afrwy_qspi_SECURE_BOOT_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1012AFRWY=y CONFIG_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-frwy" @@ -15,8 +17,6 @@ CONFIG_PCIE1=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012afrwy_qspi_defconfig b/configs/ls1012afrwy_qspi_defconfig index 3b073241e4..6cf3763549 100644 --- a/configs/ls1012afrwy_qspi_defconfig +++ b/configs/ls1012afrwy_qspi_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1012AFRWY=y CONFIG_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1D0000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -17,8 +19,6 @@ CONFIG_PCIE1=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012aqds_qspi_defconfig b/configs/ls1012aqds_qspi_defconfig index fcef5e5d5b..0580c68a10 100644 --- a/configs/ls1012aqds_qspi_defconfig +++ b/configs/ls1012aqds_qspi_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1012AQDS=y CONFIG_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -18,8 +20,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig index 3639b4dd93..0934fc46f5 100644 --- a/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1012ardb_qspi_SECURE_BOOT_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1012ARDB=y CONFIG_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1012a-rdb" @@ -16,8 +18,6 @@ CONFIG_PCIE1=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1012ardb_qspi_defconfig b/configs/ls1012ardb_qspi_defconfig index 4fc7b38734..4a4ea813ca 100644 --- a/configs/ls1012ardb_qspi_defconfig +++ b/configs/ls1012ardb_qspi_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1012ARDB=y CONFIG_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -18,8 +20,6 @@ CONFIG_PCIE1=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_FIT_VERBOSE=y CONFIG_OF_BOARD_SETUP=y diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig index d5d3354457..9c298b0cc9 100644 --- a/configs/ls1021aiot_sdcard_defconfig +++ b/configs/ls1021aiot_sdcard_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-iot-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x1001d000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y @@ -42,7 +43,6 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x82080000 diff --git a/configs/ls1021aqds_nand_defconfig b/configs/ls1021aqds_nand_defconfig index c3c6678bb4..de632a3f38 100644 --- a/configs/ls1021aqds_nand_defconfig +++ b/configs/ls1021aqds_nand_defconfig @@ -18,6 +18,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-qds-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x1001d000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y @@ -52,7 +53,6 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80200000 diff --git a/configs/ls1021aqds_sdcard_ifc_defconfig b/configs/ls1021aqds_sdcard_ifc_defconfig index 07d52c249d..27784e3715 100644 --- a/configs/ls1021aqds_sdcard_ifc_defconfig +++ b/configs/ls1021aqds_sdcard_ifc_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x1001d000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y @@ -51,7 +52,6 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x820c0000 diff --git a/configs/ls1021aqds_sdcard_qspi_defconfig b/configs/ls1021aqds_sdcard_qspi_defconfig index 6834a696b6..d8973bf315 100644 --- a/configs/ls1021aqds_sdcard_qspi_defconfig +++ b/configs/ls1021aqds_sdcard_qspi_defconfig @@ -19,6 +19,7 @@ CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x1001d000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y @@ -50,7 +51,6 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x820c0000 diff --git a/configs/ls1021atsn_sdcard_defconfig b/configs/ls1021atsn_sdcard_defconfig index 29dc23e179..7e880edcf3 100644 --- a/configs/ls1021atsn_sdcard_defconfig +++ b/configs/ls1021atsn_sdcard_defconfig @@ -16,6 +16,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-tsn" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x1001d000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y @@ -44,7 +45,6 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x82100000 diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig index f84f4dd660..7d27c95b38 100644 --- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig @@ -18,6 +18,7 @@ CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x1001d000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_NXP_ESBC=y @@ -52,7 +53,6 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x82104000 diff --git a/configs/ls1021atwr_sdcard_ifc_defconfig b/configs/ls1021atwr_sdcard_ifc_defconfig index 40a0ea7032..0890501f07 100644 --- a/configs/ls1021atwr_sdcard_ifc_defconfig +++ b/configs/ls1021atwr_sdcard_ifc_defconfig @@ -18,6 +18,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x1001d000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y @@ -53,7 +54,6 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x82100000 diff --git a/configs/ls1021atwr_sdcard_qspi_defconfig b/configs/ls1021atwr_sdcard_qspi_defconfig index 621a0238d4..4cbed76b52 100644 --- a/configs/ls1021atwr_sdcard_qspi_defconfig +++ b/configs/ls1021atwr_sdcard_qspi_defconfig @@ -18,6 +18,7 @@ CONFIG_DEFAULT_DEVICE_TREE="ls1021a-twr-duart" CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x1001d000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_AHCI=y @@ -54,7 +55,6 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x82100000 diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig index a7e9583c73..1ee750714f 100644 --- a/configs/ls1043aqds_defconfig +++ b/configs/ls1043aqds_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -29,8 +31,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig index 7334d31e83..84281ecb4a 100644 --- a/configs/ls1043aqds_lpuart_defconfig +++ b/configs/ls1043aqds_lpuart_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -29,8 +31,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig index 774d41308b..b9cb2e7346 100644 --- a/configs/ls1043aqds_nand_defconfig +++ b/configs/ls1043aqds_nand_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -18,6 +20,7 @@ CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x1001d000 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y @@ -34,8 +37,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -59,7 +60,6 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80200000 diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig index f759baf36d..29b6d72eb5 100644 --- a/configs/ls1043aqds_nor_ddr3_defconfig +++ b/configs/ls1043aqds_nor_ddr3_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -29,8 +31,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig index e7dbf41b97..eb55281fad 100644 --- a/configs/ls1043aqds_qspi_defconfig +++ b/configs/ls1043aqds_qspi_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1043AQDS=y CONFIG_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -29,8 +31,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig index 627abc81c9..65fb68f6c9 100644 --- a/configs/ls1043aqds_sdcard_ifc_defconfig +++ b/configs/ls1043aqds_sdcard_ifc_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -19,6 +21,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x1001e000 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y @@ -35,8 +38,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -60,7 +61,6 @@ CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001e000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig index f4dcbd4a92..858b548e05 100644 --- a/configs/ls1043aqds_sdcard_qspi_defconfig +++ b/configs/ls1043aqds_sdcard_qspi_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -19,6 +21,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x1001e000 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y @@ -34,8 +37,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -60,7 +61,6 @@ CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001e000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig index 7d980c3c46..5d6efe8735 100644 --- a/configs/ls1043ardb_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_SECURE_BOOT_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1043ARDB=y CONFIG_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y @@ -19,8 +21,6 @@ CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig index b345d13caa..8fc7a458e6 100644 --- a/configs/ls1043ardb_defconfig +++ b/configs/ls1043ardb_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1043ARDB=y CONFIG_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -20,8 +22,6 @@ CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig index d4546348bb..65f00f4f72 100644 --- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" @@ -13,6 +15,7 @@ CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x1001d000 CONFIG_SPL=y CONFIG_OF_BOARD_FIXUP=y CONFIG_NXP_ESBC=y @@ -21,8 +24,6 @@ CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1064960 CONFIG_MP=y @@ -44,7 +45,6 @@ CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80200000 diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig index f0f8cbf34e..b27d5ba566 100644 --- a/configs/ls1043ardb_nand_defconfig +++ b/configs/ls1043ardb_nand_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -18,6 +20,7 @@ CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x1001d000 CONFIG_SPL=y CONFIG_OF_BOARD_FIXUP=y CONFIG_LAYERSCAPE_NS_ACCESS=y @@ -25,8 +28,6 @@ CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -50,7 +51,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001d000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80200000 diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig index 529cd93bd2..9dc4afb2dd 100644 --- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1043a-rdb" @@ -14,6 +16,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x1001e000 CONFIG_SPL=y CONFIG_OF_BOARD_FIXUP=y CONFIG_NXP_ESBC=y @@ -22,8 +25,6 @@ CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1064960 CONFIG_MP=y @@ -45,7 +46,6 @@ CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001e000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig index bfe9260d1b..126f895737 100644 --- a/configs/ls1043ardb_sdcard_defconfig +++ b/configs/ls1043ardb_sdcard_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -19,6 +21,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x1001e000 CONFIG_SPL=y CONFIG_OF_BOARD_FIXUP=y CONFIG_LAYERSCAPE_NS_ACCESS=y @@ -26,8 +29,6 @@ CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -51,7 +52,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001e000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0 diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig index 2bf8a94925..b3ef7b496a 100644 --- a/configs/ls1046aqds_SECURE_BOOT_defconfig +++ b/configs/ls1046aqds_SECURE_BOOT_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1046AQDS=y CONFIG_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y @@ -28,8 +30,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig index 5fe73bc8ac..876aeb5199 100644 --- a/configs/ls1046aqds_defconfig +++ b/configs/ls1046aqds_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1046AQDS=y CONFIG_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -29,8 +31,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig index defcac0a9b..1dab867626 100644 --- a/configs/ls1046aqds_lpuart_defconfig +++ b/configs/ls1046aqds_lpuart_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1046AQDS=y CONFIG_TEXT_BASE=0x60100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -29,8 +31,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig index 7c8a1e70fa..e083c6829a 100644 --- a/configs/ls1046aqds_nand_defconfig +++ b/configs/ls1046aqds_nand_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -18,6 +20,7 @@ CONFIG_SPL_TEXT_BASE=0x10000000 CONFIG_FSL_LS_PPA=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x1001f000 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y @@ -34,8 +37,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=655360 CONFIG_MP=y @@ -60,7 +61,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1001f000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig index 937581536a..078ba42991 100644 --- a/configs/ls1046aqds_qspi_defconfig +++ b/configs/ls1046aqds_qspi_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1046AQDS=y CONFIG_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -29,8 +31,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig index 4d3c0580a1..3c825d08cb 100644 --- a/configs/ls1046aqds_sdcard_ifc_defconfig +++ b/configs/ls1046aqds_sdcard_ifc_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -19,6 +21,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x10020000 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y @@ -35,8 +38,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -61,7 +62,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x10020000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig index 480ab03795..204f630b74 100644 --- a/configs/ls1046aqds_sdcard_qspi_defconfig +++ b/configs/ls1046aqds_sdcard_qspi_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -19,6 +21,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x10020000 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y @@ -34,8 +37,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -61,7 +62,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x10020000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig index 1a09fdadd3..2b20619352 100644 --- a/configs/ls1046ardb_emmc_defconfig +++ b/configs/ls1046ardb_emmc_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -19,6 +21,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x10020000 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y @@ -26,8 +29,6 @@ CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -51,7 +52,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x10020000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig index 346a954760..5cde0e9f19 100644 --- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1046ARDB=y CONFIG_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y @@ -20,8 +22,6 @@ CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig index 4361cd223d..edea731b97 100644 --- a/configs/ls1046ardb_qspi_defconfig +++ b/configs/ls1046ardb_qspi_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1046ARDB=y CONFIG_TEXT_BASE=0x40100000 CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -22,8 +24,6 @@ CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_MP=y CONFIG_FIT_VERBOSE=y diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig index 560362695f..c28783db3f 100644 --- a/configs/ls1046ardb_qspi_spl_defconfig +++ b/configs/ls1046ardb_qspi_spl_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -21,6 +23,7 @@ CONFIG_SPL_FSL_LS_PPA=y CONFIG_QSPI_AHB_INIT=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x10020000 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y @@ -28,14 +31,11 @@ CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_BOARD_SETUP=y CONFIG_RAMBOOT_PBL=y CONFIG_SYS_FSL_PBL_PBI="board/freescale/ls1046ardb/ls1046ardb_qspi_pbi.cfg" @@ -54,7 +54,6 @@ CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x10020000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig index cdcfa63bf4..15e2895b31 100644 --- a/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig +++ b/configs/ls1046ardb_sdcard_SECURE_BOOT_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_SYS_I2C_MXC_I2C1=y CONFIG_SYS_I2C_MXC_I2C2=y @@ -18,6 +20,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x10020000 CONFIG_SPL=y CONFIG_NXP_ESBC=y CONFIG_LAYERSCAPE_NS_ACCESS=y @@ -25,8 +28,6 @@ CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1064960 CONFIG_MP=y @@ -48,7 +49,6 @@ CONFIG_SPL_BSS_START_ADDR=0x8f000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x10020000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig index e0442390db..e91373998f 100644 --- a/configs/ls1046ardb_sdcard_defconfig +++ b/configs/ls1046ardb_sdcard_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x102000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_SYS_I2C_MXC_I2C1=y @@ -19,6 +21,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x10020000 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_LAYERSCAPE_NS_ACCESS=y @@ -26,8 +29,6 @@ CONFIG_PCIE1=y CONFIG_PCIE2=y CONFIG_PCIE3=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1000fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -51,7 +52,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x80000 CONFIG_SPL_FSL_PBL=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x10020000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x110 diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig index aecd74d15b..d4793f8edc 100644 --- a/configs/ls1088aqds_defconfig +++ b/configs/ls1088aqds_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1088AQDS=y CONFIG_TEXT_BASE=0x30100000 CONFIG_SYS_MALLOC_LEN=0x0220000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DM_GPIO=y @@ -20,8 +22,6 @@ CONFIG_SYS_FSL_NUM_CC_PLLS=3 CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig index 8d1fc5f204..a67459176a 100644 --- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1088AQDS=y CONFIG_TEXT_BASE=0x20100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-qds" @@ -21,8 +23,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig index 7c6e6b7637..a04f7bf291 100644 --- a/configs/ls1088aqds_qspi_defconfig +++ b/configs/ls1088aqds_qspi_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1088AQDS=y CONFIG_TEXT_BASE=0x20100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -23,8 +25,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig index 64296dbe0b..1d429a06f3 100644 --- a/configs/ls1088aqds_sdcard_ifc_defconfig +++ b/configs/ls1088aqds_sdcard_ifc_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y @@ -15,6 +17,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_FSL_USE_PCA9547_MUX=y @@ -27,8 +30,6 @@ CONFIG_SYS_FSL_NUM_CC_PLLS=3 CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 @@ -48,7 +49,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig index 2b4712e07e..49a3e899c8 100644 --- a/configs/ls1088aqds_sdcard_qspi_defconfig +++ b/configs/ls1088aqds_sdcard_qspi_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y @@ -15,6 +17,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_FSL_USE_PCA9547_MUX=y @@ -28,8 +31,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 @@ -49,7 +50,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig index 18213e5cc5..d40ccc0a99 100644 --- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1088ARDB=y CONFIG_TEXT_BASE=0x20100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" @@ -21,8 +23,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig index eb88cec6e0..dcddbc8461 100644 --- a/configs/ls1088ardb_qspi_defconfig +++ b/configs/ls1088ardb_qspi_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_LS1088ARDB=y CONFIG_TEXT_BASE=0x20100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -23,8 +25,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_MP=y diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig index 33aedcfbd2..cac663db0e 100644 --- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls1088a-rdb" @@ -14,6 +16,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SPL=y CONFIG_NXP_ESBC=y CONFIG_FSL_USE_PCA9547_MUX=y @@ -27,8 +30,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1064960 @@ -49,7 +50,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig index db28ae196f..5d1b608d6d 100644 --- a/configs/ls1088ardb_sdcard_qspi_defconfig +++ b/configs/ls1088ardb_sdcard_qspi_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DM_GPIO=y @@ -15,6 +17,7 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_FSL_USE_PCA9547_MUX=y @@ -28,8 +31,6 @@ CONFIG_FSL_QIXIS=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0x9fffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 @@ -50,7 +51,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 diff --git a/configs/ls2080aqds_SECURE_BOOT_defconfig b/configs/ls2080aqds_SECURE_BOOT_defconfig index d449b42aa3..7d7b4d8944 100644 --- a/configs/ls2080aqds_SECURE_BOOT_defconfig +++ b/configs/ls2080aqds_SECURE_BOOT_defconfig @@ -5,6 +5,8 @@ CONFIG_TARGET_LS2080AQDS=y CONFIG_TEXT_BASE=0x30100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_FSL_LS_PPA=y @@ -13,8 +15,6 @@ CONFIG_NXP_ESBC=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 diff --git a/configs/ls2080aqds_defconfig b/configs/ls2080aqds_defconfig index 973537aaeb..6de99f3a02 100644 --- a/configs/ls2080aqds_defconfig +++ b/configs/ls2080aqds_defconfig @@ -5,6 +5,8 @@ CONFIG_TARGET_LS2080AQDS=y CONFIG_TEXT_BASE=0x30100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" @@ -14,8 +16,6 @@ CONFIG_AHCI=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 diff --git a/configs/ls2080aqds_nand_defconfig b/configs/ls2080aqds_nand_defconfig index 4fc4419493..8787b9af93 100644 --- a/configs/ls2080aqds_nand_defconfig +++ b/configs/ls2080aqds_nand_defconfig @@ -8,18 +8,19 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0xE0000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -40,7 +41,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/ls2080aqds_qspi_defconfig b/configs/ls2080aqds_qspi_defconfig index 4cd1c85852..0ef4d126af 100644 --- a/configs/ls2080aqds_qspi_defconfig +++ b/configs/ls2080aqds_qspi_defconfig @@ -6,6 +6,8 @@ CONFIG_TEXT_BASE=0x20100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -13,8 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" CONFIG_AHCI=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y diff --git a/configs/ls2080aqds_sdcard_defconfig b/configs/ls2080aqds_sdcard_defconfig index 52566582ca..2fa28a2bb6 100644 --- a/configs/ls2080aqds_sdcard_defconfig +++ b/configs/ls2080aqds_sdcard_defconfig @@ -8,6 +8,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x300000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-qds" @@ -16,12 +18,11 @@ CONFIG_FSL_LS_PPA=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_FSL_USE_PCA9547_MUX=y CONFIG_FSL_QIXIS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -40,7 +41,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x8b0 diff --git a/configs/ls2080ardb_SECURE_BOOT_defconfig b/configs/ls2080ardb_SECURE_BOOT_defconfig index 15bc69ec47..9d5a65182a 100644 --- a/configs/ls2080ardb_SECURE_BOOT_defconfig +++ b/configs/ls2080ardb_SECURE_BOOT_defconfig @@ -5,6 +5,8 @@ CONFIG_TARGET_LS2080ARDB=y CONFIG_TEXT_BASE=0x30100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_FSL_LS_PPA=y @@ -17,8 +19,6 @@ CONFIG_VOL_MONITOR_IR36021_READ=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 diff --git a/configs/ls2080ardb_defconfig b/configs/ls2080ardb_defconfig index 88b5d23926..77cfad3053 100644 --- a/configs/ls2080ardb_defconfig +++ b/configs/ls2080ardb_defconfig @@ -5,6 +5,8 @@ CONFIG_TARGET_LS2080ARDB=y CONFIG_TEXT_BASE=0x30100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" @@ -18,8 +20,6 @@ CONFIG_VOL_MONITOR_IR36021_READ=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 diff --git a/configs/ls2080ardb_nand_defconfig b/configs/ls2080ardb_nand_defconfig index 8339cf7232..9e9a5d85d6 100644 --- a/configs/ls2080ardb_nand_defconfig +++ b/configs/ls2080ardb_nand_defconfig @@ -8,12 +8,15 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x200000 CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2080a-rdb" CONFIG_SPL_TEXT_BASE=0x1800a000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x18009ff0 CONFIG_SPL=y CONFIG_AHCI=y CONFIG_FSL_USE_PCA9547_MUX=y @@ -23,8 +26,6 @@ CONFIG_VOL_MONITOR_IR36021_READ=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y # CONFIG_QIXIS_I2C_ACCESS is not set -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_MP=y @@ -46,7 +47,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x80100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x18009ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y diff --git a/configs/ls2081ardb_defconfig b/configs/ls2081ardb_defconfig index fc43c535b5..0380bc012f 100644 --- a/configs/ls2081ardb_defconfig +++ b/configs/ls2081ardb_defconfig @@ -5,6 +5,8 @@ CONFIG_TARGET_LS2081ARDB=y CONFIG_TEXT_BASE=0x20100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -18,8 +20,6 @@ CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" CONFIG_VOL_MONITOR_IR36021_READ=y CONFIG_VOL_MONITOR_IR36021_SET=y CONFIG_FSL_QIXIS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 diff --git a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig index d3a113332d..e9fbe8dc71 100644 --- a/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig +++ b/configs/ls2088ardb_qspi_SECURE_BOOT_defconfig @@ -5,6 +5,8 @@ CONFIG_TARGET_LS2080ARDB=y CONFIG_TEXT_BASE=0x20100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="fsl-ls2088a-rdb-qspi" @@ -17,8 +19,6 @@ CONFIG_VID=y CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" CONFIG_VOL_MONITOR_IR36021_READ=y CONFIG_VOL_MONITOR_IR36021_SET=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 diff --git a/configs/ls2088ardb_qspi_defconfig b/configs/ls2088ardb_qspi_defconfig index f94142d073..3b0c959737 100644 --- a/configs/ls2088ardb_qspi_defconfig +++ b/configs/ls2088ardb_qspi_defconfig @@ -5,6 +5,8 @@ CONFIG_TARGET_LS2080ARDB=y CONFIG_TEXT_BASE=0x20100000 CONFIG_SYS_MALLOC_LEN=0x202000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -19,8 +21,6 @@ CONFIG_VID=y CONFIG_VID_FLS_ENV="ls2080ardb_vdd_mv" CONFIG_VOL_MONITOR_IR36021_READ=y CONFIG_VOL_MONITOR_IR36021_SET=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x1800fff0 # CONFIG_SYS_MALLOC_F is not set CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 diff --git a/configs/lschlv2_defconfig b/configs/lschlv2_defconfig index 0738520808..f8483be010 100644 --- a/configs/lschlv2_defconfig +++ b/configs/lschlv2_defconfig @@ -18,8 +18,6 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lschlv2" CONFIG_IDENT_STRING=" LS-CHLv2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x5ff000 CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=393216 # CONFIG_BOOTSTD is not set @@ -64,8 +62,6 @@ CONFIG_MVGBE=y CONFIG_MII=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_SERIAL=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/lsxhl_defconfig b/configs/lsxhl_defconfig index 01397bcac3..ddc947836a 100644 --- a/configs/lsxhl_defconfig +++ b/configs/lsxhl_defconfig @@ -19,8 +19,6 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-lsxhl" CONFIG_IDENT_STRING=" LS-XHL" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x5ff000 CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=393216 # CONFIG_BOOTSTD is not set @@ -65,8 +63,6 @@ CONFIG_MVGBE=y CONFIG_MII=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_SERIAL=y -CONFIG_SYS_NS16550=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_KIRKWOOD_SPI=y diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig index a9b8a2c1a3..9f01bf73ab 100644 --- a/configs/m53menlo_defconfig +++ b/configs/m53menlo_defconfig @@ -17,6 +17,7 @@ CONFIG_SPL_TEXT_BASE=0x70008000 CONFIG_SPL_SERIAL=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x53FA401C +CONFIG_SPL_STACK=0x70004000 CONFIG_SPL=y CONFIG_SYS_BOOTCOUNT_SINGLEWORD=y CONFIG_ENV_OFFSET_REDUND=0x180000 @@ -35,7 +36,6 @@ CONFIG_SPL_PAD_TO=0x8000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x70004000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_TARGET="u-boot-with-nand-spl.imx" CONFIG_HUSH_PARSER=y diff --git a/configs/maxbcm_defconfig b/configs/maxbcm_defconfig index 5afacfd4ed..40be03ca77 100644 --- a/configs/maxbcm_defconfig +++ b/configs/maxbcm_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x00800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_MAXBCM=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 @@ -12,13 +14,12 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-maxbcm" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y @@ -30,7 +31,6 @@ CONFIG_SPL_BSS_START_ADDR=0x40020000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_I2C=y diff --git a/configs/mccmon6_nor_defconfig b/configs/mccmon6_nor_defconfig index 1e6cec0121..18eed39a57 100644 --- a/configs/mccmon6_nor_defconfig +++ b/configs/mccmon6_nor_defconfig @@ -20,7 +20,6 @@ CONFIG_ENV_ADDR=0x8040000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set # CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/mccmon6_sd_defconfig b/configs/mccmon6_sd_defconfig index 20b6e03bdf..43e2a0b13d 100644 --- a/configs/mccmon6_sd_defconfig +++ b/configs/mccmon6_sd_defconfig @@ -22,7 +22,6 @@ CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_MONITOR_LEN=409600 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set # CONFIG_USE_BOOTCOMMAND is not set CONFIG_BOARD_LATE_INIT=y CONFIG_SPL_BOARD_INIT=y diff --git a/configs/medcom-wide_defconfig b/configs/medcom-wide_defconfig index 563e01459a..47fcf1574e 100644 --- a/configs/medcom-wide_defconfig +++ b/configs/medcom-wide_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_OFFSET=0x1FFE0000 CONFIG_DEFAULT_DEVICE_TREE="tegra20-medcom-wide" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (Medcom-Wide) # " +CONFIG_SPL_STACK=0xffffc CONFIG_TEGRA20=y CONFIG_TARGET_MEDCOM_WIDE=y CONFIG_TEGRA_ENABLE_UARTD=y @@ -18,7 +19,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 diff --git a/configs/microblaze-generic_defconfig b/configs/microblaze-generic_defconfig index 438540fbe4..b7cccf581d 100644 --- a/configs/microblaze-generic_defconfig +++ b/configs/microblaze-generic_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="microblaze-generic" CONFIG_SYS_PROMPT="U-Boot-mONStR> " CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x100000 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_TARGET_MICROBLAZE_GENERIC=y @@ -31,7 +32,6 @@ CONFIG_SPL_MAX_FOOTPRINT=0xffb00 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x100000 CONFIG_SPL_NOR_SUPPORT=y CONFIG_SYS_MAXARGS=15 CONFIG_SYS_CBSIZE=512 diff --git a/configs/microchip_mpfs_icicle_defconfig b/configs/microchip_mpfs_icicle_defconfig index c2b938e7e7..c634a83fa8 100644 --- a/configs/microchip_mpfs_icicle_defconfig +++ b/configs/microchip_mpfs_icicle_defconfig @@ -1,6 +1,8 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_SYS_MALLOC_F_LEN=0x2000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="microchip-mpfs-icicle-kit" CONFIG_SYS_PROMPT="RISC-V # " @@ -10,8 +12,6 @@ CONFIG_TARGET_MICROCHIP_ICICLE=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/miqi-rk3288_defconfig b/configs/miqi-rk3288_defconfig index 652e418ff3..fad85ffb66 100644 --- a/configs/miqi-rk3288_defconfig +++ b/configs/miqi-rk3288_defconfig @@ -4,19 +4,21 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-miqi" CONFIG_SPL_TEXT_BASE=0xff704000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_MIQI_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_SPL_STACK=0xff718000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y @@ -26,7 +28,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SYS_BOOTM_LEN=0x4000000 @@ -74,7 +75,6 @@ CONFIG_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y diff --git a/configs/mk808_defconfig b/configs/mk808_defconfig index 7ba8338add..c080706d97 100644 --- a/configs/mk808_defconfig +++ b/configs/mk808_defconfig @@ -10,15 +10,19 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x60408000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x78000000 CONFIG_ENV_SIZE=0x8000 CONFIG_DEFAULT_DEVICE_TREE="rk3066a-mk808" CONFIG_SPL_TEXT_BASE=0x60000000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3066=y # CONFIG_ROCKCHIP_STIMER is not set CONFIG_TPL_TEXT_BASE=0x10080C04 CONFIG_TPL_STACK=0x1008FFFF CONFIG_TARGET_MK808=y CONFIG_SPL_STACK_R_ADDR=0x70000000 +CONFIG_SPL_STACK=0x1008ffff CONFIG_DEBUG_UART_BASE=0x20064000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_FS_FAT=y @@ -26,8 +30,6 @@ CONFIG_SYS_LOAD_ADDR=0x70800800 CONFIG_TPL_MAX_SIZE=0x7ffc CONFIG_SPL_PAYLOAD="u-boot.bin" CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x78000000 CONFIG_SD_BOOT=y CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3066a-mk808.dtb" @@ -38,7 +40,6 @@ CONFIG_SPL_MAX_SIZE=0x32000 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x1008ffff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x200000 CONFIG_SPL_SEPARATE_BSS=y @@ -96,7 +97,6 @@ CONFIG_DM_REGULATOR_GPIO=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y -CONFIG_DM_RESET=y # CONFIG_REQUIRE_SERIAL_CONSOLE is not set CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/msc_sm2s_imx8mp_defconfig b/configs/msc_sm2s_imx8mp_defconfig index 66ecd7d98b..803b3f8716 100644 --- a/configs/msc_sm2s_imx8mp_defconfig +++ b/configs/msc_sm2s_imx8mp_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x960000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -24,7 +25,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_DEFAULT_FDT_FILE="imx8mp-msc-sm2s.dtb" CONFIG_SPL_MAX_SIZE=0x26000 @@ -35,7 +35,6 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x960000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/mt7621_rfb_defconfig b/configs/mt7621_rfb_defconfig index 70280ad0a0..06c04e529b 100644 --- a/configs/mt7621_rfb_defconfig +++ b/configs/mt7621_rfb_defconfig @@ -7,6 +7,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-rfb" CONFIG_SPL_SERIAL=y +CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xbe000c00 @@ -20,7 +21,6 @@ CONFIG_SYS_MIPS_TIMER_FREQ=440000000 CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y CONFIG_MIPS_BOOT_FDT=y CONFIG_DEBUG_UART=y -CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_FIT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/mt7623a_unielec_u7623_02_defconfig b/configs/mt7623a_unielec_u7623_02_defconfig index 8dd65d57e3..e6fb9d3fcc 100644 --- a/configs/mt7623a_unielec_u7623_02_defconfig +++ b/configs/mt7623a_unielec_u7623_02_defconfig @@ -5,6 +5,8 @@ CONFIG_ARCH_MEDIATEK=y CONFIG_TEXT_BASE=0x81e00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="mt7623a-unielec-u7623-02-emmc" @@ -12,8 +14,6 @@ CONFIG_SYS_PROMPT="U-Boot> " CONFIG_TARGET_MT7623=y CONFIG_SYS_LOAD_ADDR=0x84000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=3 diff --git a/configs/mt7623n_bpir2_defconfig b/configs/mt7623n_bpir2_defconfig index cafac4278b..da15835c80 100644 --- a/configs/mt7623n_bpir2_defconfig +++ b/configs/mt7623n_bpir2_defconfig @@ -5,6 +5,8 @@ CONFIG_ARCH_MEDIATEK=y CONFIG_TEXT_BASE=0x81e00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2" @@ -12,8 +14,6 @@ CONFIG_SYS_PROMPT="U-Boot> " CONFIG_TARGET_MT7623=y CONFIG_SYS_LOAD_ADDR=0x84000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x81ffff10 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_BOOTDELAY=3 diff --git a/configs/mt7629_rfb_defconfig b/configs/mt7629_rfb_defconfig index 76fd135d93..ea8d77c0a2 100644 --- a/configs/mt7629_rfb_defconfig +++ b/configs/mt7629_rfb_defconfig @@ -6,6 +6,8 @@ CONFIG_ARCH_MEDIATEK=y CONFIG_TEXT_BASE=0x41e00000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41fffef0 CONFIG_ENV_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="mt7629-rfb" CONFIG_SPL_TEXT_BASE=0x201000 @@ -14,11 +16,10 @@ CONFIG_TARGET_MT7629=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x40800000 +CONFIG_SPL_STACK=0x106000 CONFIG_SYS_LOAD_ADDR=0x42007f1c CONFIG_SPL_PAYLOAD="u-boot-lzma.img" CONFIG_BUILD_TARGET="u-boot-mtk.bin" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x41fffef0 CONFIG_SPL_IMAGE="spl/u-boot-spl-mtk.bin" CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -31,7 +32,6 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x10000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x106000 CONFIG_SPL_STACK_R=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_WATCHDOG=y diff --git a/configs/mvebu_ac5_rd_defconfig b/configs/mvebu_ac5_rd_defconfig index a27202eb23..8e7d306658 100644 --- a/configs/mvebu_ac5_rd_defconfig +++ b/configs/mvebu_ac5_rd_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_TEXT_BASE=0x200000000 CONFIG_SYS_MALLOC_LEN=0x900000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x200FF0000 CONFIG_TARGET_MVEBU_ALLEYCAT5=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x400000 @@ -13,8 +15,6 @@ CONFIG_SYS_LOAD_ADDR=0x202000000 CONFIG_SYS_MEMTEST_START=0x200800000 CONFIG_SYS_MEMTEST_END=0x200ffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x200FF0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_BOOTDELAY=-1 diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig index 1d5b1db9dd..f89684e3ac 100644 --- a/configs/mvebu_crb_cn9130_defconfig +++ b/configs/mvebu_crb_cn9130_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_OCTEONTX2_CN913x=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 @@ -14,8 +16,6 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/mvebu_db-88f3720_defconfig b/configs/mvebu_db-88f3720_defconfig index 8b737840fa..f1ba645908 100644 --- a/configs/mvebu_db-88f3720_defconfig +++ b/configs/mvebu_db-88f3720_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_MVEBU_ARMADA_37XX=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 @@ -14,8 +16,6 @@ CONFIG_SYS_LOAD_ADDR=0x6000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig index 44aec08c61..1de567d126 100644 --- a/configs/mvebu_db_armada8k_defconfig +++ b/configs/mvebu_db_armada8k_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_MVEBU_ARMADA_8K=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 @@ -14,8 +16,6 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig index b2170347eb..6279f69aaa 100644 --- a/configs/mvebu_db_cn9130_defconfig +++ b/configs/mvebu_db_cn9130_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_OCTEONTX2_CN913x=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3f0000 @@ -16,8 +18,6 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/mvebu_espressobin-88f3720_defconfig b/configs/mvebu_espressobin-88f3720_defconfig index 1016b26b23..e3fa37a98b 100644 --- a/configs/mvebu_espressobin-88f3720_defconfig +++ b/configs/mvebu_espressobin-88f3720_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_MVEBU_ARMADA_37XX=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x3F0000 @@ -14,8 +16,6 @@ CONFIG_SYS_LOAD_ADDR=0x6000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig index d580bfc6ee..1e4270a9a7 100644 --- a/configs/mvebu_mcbin-88f8040_defconfig +++ b/configs/mvebu_mcbin-88f8040_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_MVEBU_ARMADA_8K=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 @@ -15,8 +17,6 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_USE_PREBOOT=y CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig index 06112b373b..cb0b98dee6 100644 --- a/configs/mvebu_puzzle-m801-88f8040_defconfig +++ b/configs/mvebu_puzzle-m801-88f8040_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_MVEBU_ARMADA_8K=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 @@ -15,8 +17,6 @@ CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autoboot in %d seconds, to stop use 's' key\n" diff --git a/configs/mx6sabreauto_defconfig b/configs/mx6sabreauto_defconfig index 50f63c23b1..1151ed332c 100644 --- a/configs/mx6sabreauto_defconfig +++ b/configs/mx6sabreauto_defconfig @@ -26,7 +26,6 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" diff --git a/configs/mx6sabresd_defconfig b/configs/mx6sabresd_defconfig index 6905850083..965536cfb6 100644 --- a/configs/mx6sabresd_defconfig +++ b/configs/mx6sabresd_defconfig @@ -25,7 +25,6 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" diff --git a/configs/mx6ull_14x14_evk_defconfig b/configs/mx6ull_14x14_evk_defconfig index f1cc3d242f..c9a44d6b03 100644 --- a/configs/mx6ull_14x14_evk_defconfig +++ b/configs/mx6ull_14x14_evk_defconfig @@ -14,6 +14,7 @@ CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" +CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 @@ -26,6 +27,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y +CONFIG_CMD_RNG=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y @@ -40,6 +42,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eth1" CONFIG_BOUNCE_BUFFER=y +CONFIG_FSL_DCP_RNG=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -59,6 +62,7 @@ CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y +CONFIG_DM_RNG=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y @@ -66,7 +70,3 @@ CONFIG_DM_SPI=y CONFIG_FSL_QSPI=y CONFIG_SOFT_SPI=y CONFIG_IMX_THERMAL=y -CONFIG_ARCH_MISC_INIT=y -CONFIG_DM_RNG=y -CONFIG_CMD_RNG=y -CONFIG_FSL_DCP_RNG=y diff --git a/configs/mx6ull_14x14_evk_plugin_defconfig b/configs/mx6ull_14x14_evk_plugin_defconfig index d3a9edae51..6010287348 100644 --- a/configs/mx6ull_14x14_evk_plugin_defconfig +++ b/configs/mx6ull_14x14_evk_plugin_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_MEMTEST_END=0x88000000 CONFIG_SUPPORT_RAW_INITRD=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run findfdt;mmc dev ${mmcdev};mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else run netboot; fi" +CONFIG_ARCH_MISC_INIT=y CONFIG_BOARD_EARLY_INIT_F=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 @@ -27,6 +28,7 @@ CONFIG_CMD_MMC=y CONFIG_CMD_DHCP=y CONFIG_CMD_PING=y CONFIG_CMD_CACHE=y +CONFIG_CMD_RNG=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_EXT4_WRITE=y @@ -41,6 +43,7 @@ CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eth1" CONFIG_BOUNCE_BUFFER=y +CONFIG_FSL_DCP_RNG=y CONFIG_DM_74X164=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y @@ -58,6 +61,7 @@ CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX6=y CONFIG_DM_REGULATOR=y +CONFIG_DM_RNG=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SPI=y @@ -65,7 +69,3 @@ CONFIG_DM_SPI=y CONFIG_FSL_QSPI=y CONFIG_SOFT_SPI=y CONFIG_IMX_THERMAL=y -CONFIG_ARCH_MISC_INIT=y -CONFIG_DM_RNG=y -CONFIG_CMD_RNG=y -CONFIG_FSL_DCP_RNG=y diff --git a/configs/nanopc-t4-rk3399_defconfig b/configs/nanopc-t4-rk3399_defconfig index 8fad8c643f..c12ca20370 100644 --- a/configs/nanopc-t4-rk3399_defconfig +++ b/configs/nanopc-t4-rk3399_defconfig @@ -4,16 +4,18 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopc-t4" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopc-t4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -23,7 +25,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y @@ -52,7 +53,6 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/nanopi-k2_defconfig b/configs/nanopi-k2_defconfig index 2fc56fdbfa..99ba53a06e 100644 --- a/configs/nanopi-k2_defconfig +++ b/configs/nanopi-k2_defconfig @@ -2,16 +2,17 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-nanopi-k2" +CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" nanopi-k2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -37,7 +38,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXBB=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/nanopi-m4-2gb-rk3399_defconfig b/configs/nanopi-m4-2gb-rk3399_defconfig index c5f13c060b..04ce5438f4 100644 --- a/configs/nanopi-m4-2gb-rk3399_defconfig +++ b/configs/nanopi-m4-2gb-rk3399_defconfig @@ -4,16 +4,17 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4-2gb" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4-2gb.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -23,7 +24,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/nanopi-m4-rk3399_defconfig b/configs/nanopi-m4-rk3399_defconfig index b6a604b694..6745934d98 100644 --- a/configs/nanopi-m4-rk3399_defconfig +++ b/configs/nanopi-m4-rk3399_defconfig @@ -4,16 +4,17 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -23,7 +24,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/nanopi-m4b-rk3399_defconfig b/configs/nanopi-m4b-rk3399_defconfig index 767befe2d2..1a9839b4d1 100644 --- a/configs/nanopi-m4b-rk3399_defconfig +++ b/configs/nanopi-m4b-rk3399_defconfig @@ -4,16 +4,17 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-m4b" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-m4b.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -23,7 +24,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/nanopi-neo4-rk3399_defconfig b/configs/nanopi-neo4-rk3399_defconfig index 383ec1f39e..ad0627fe65 100644 --- a/configs/nanopi-neo4-rk3399_defconfig +++ b/configs/nanopi-neo4-rk3399_defconfig @@ -4,16 +4,17 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-neo4" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-neo4.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -23,7 +24,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/nanopi-r2s-rk3328_defconfig b/configs/nanopi-r2s-rk3328_defconfig index 40d3117b4f..38954a86db 100644 --- a/configs/nanopi-r2s-rk3328_defconfig +++ b/configs/nanopi-r2s-rk3328_defconfig @@ -5,21 +5,23 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3328-nanopi-r2s" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -35,7 +37,6 @@ CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y @@ -88,7 +89,6 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y -CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/nanopi-r4s-rk3399_defconfig b/configs/nanopi-r4s-rk3399_defconfig index 0ef5486f82..6d2a147d90 100644 --- a/configs/nanopi-r4s-rk3399_defconfig +++ b/configs/nanopi-r4s-rk3399_defconfig @@ -4,16 +4,17 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4s" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4s.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -23,7 +24,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/nas220_defconfig b/configs/nas220_defconfig index 0590fc95c4..996bd18695 100644 --- a/configs/nas220_defconfig +++ b/configs/nas220_defconfig @@ -6,6 +6,7 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/Seagate/nas220/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_NAS220=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xA0000 @@ -13,8 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="kirkwood-blackarmor-nas220" CONFIG_SYS_PROMPT="nas220> " CONFIG_IDENT_STRING="\nNAS 220" CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/net2big_v2_defconfig b/configs/net2big_v2_defconfig index b3278142c8..94ef73f9c4 100644 --- a/configs/net2big_v2_defconfig +++ b/configs/net2big_v2_defconfig @@ -6,6 +6,7 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/LaCie/net2big_v2/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_NET2BIG_V2=y CONFIG_NET2BIG_V2=y CONFIG_ENV_SIZE=0x1000 @@ -16,8 +17,6 @@ CONFIG_SYS_PROMPT="2big2> " CONFIG_IDENT_STRING=" 2Big v2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/netgear_cg3100d_ram_defconfig b/configs/netgear_cg3100d_ram_defconfig index 734a093ea3..0cc90c6a9c 100644 --- a/configs/netgear_cg3100d_ram_defconfig +++ b/configs/netgear_cg3100d_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="netgear,cg3100d" CONFIG_SYS_PROMPT="CG3100D # " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_ARCH_BMIPS=y CONFIG_SYS_MIPS_TIMER_FREQ=166500000 @@ -51,7 +52,6 @@ CONFIG_DM_SPI_FLASH=y CONFIG_SPI_FLASH_SPANSION=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_RESET_DELAY=20 -CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y CONFIG_BCM6345_SERIAL=y diff --git a/configs/netgear_dgnd3700v2_ram_defconfig b/configs/netgear_dgnd3700v2_ram_defconfig index 9353f34b24..42d007bbe3 100644 --- a/configs/netgear_dgnd3700v2_ram_defconfig +++ b/configs/netgear_dgnd3700v2_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="netgear,dgnd3700v2" CONFIG_SYS_PROMPT="DGND3700v2 # " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6362=y @@ -59,7 +60,6 @@ CONFIG_PHY=y CONFIG_BCM6368_USBH_PHY=y CONFIG_POWER_DOMAIN=y CONFIG_BCM6328_POWER_DOMAIN=y -CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y CONFIG_BCM6345_SERIAL=y diff --git a/configs/netspace_lite_v2_defconfig b/configs/netspace_lite_v2_defconfig index dfdb06b237..02cf49c2e2 100644 --- a/configs/netspace_lite_v2_defconfig +++ b/configs/netspace_lite_v2_defconfig @@ -6,6 +6,7 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage-ns2l.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_NETSPACE_LITE_V2=y CONFIG_ENV_SIZE=0x1000 @@ -16,8 +17,6 @@ CONFIG_SYS_PROMPT="ns2> " CONFIG_IDENT_STRING=" NS v2 Lite" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/netspace_max_v2_defconfig b/configs/netspace_max_v2_defconfig index 995c0ccb1b..6683bc0682 100644 --- a/configs/netspace_max_v2_defconfig +++ b/configs/netspace_max_v2_defconfig @@ -6,6 +6,7 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_NETSPACE_MAX_V2=y CONFIG_ENV_SIZE=0x1000 @@ -16,8 +17,6 @@ CONFIG_SYS_PROMPT="ns2> " CONFIG_IDENT_STRING=" NS Max v2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/netspace_mini_v2_defconfig b/configs/netspace_mini_v2_defconfig index 877a39cfa7..e810ccb2b2 100644 --- a/configs/netspace_mini_v2_defconfig +++ b/configs/netspace_mini_v2_defconfig @@ -6,6 +6,7 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage-ns2l.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_NETSPACE_MINI_V2=y CONFIG_ENV_SIZE=0x1000 @@ -16,8 +17,6 @@ CONFIG_SYS_PROMPT="ns2> " CONFIG_IDENT_STRING=" NS v2 Mini" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/netspace_v2_defconfig b/configs/netspace_v2_defconfig index 24f7d8b4bc..6147152bf3 100644 --- a/configs/netspace_v2_defconfig +++ b/configs/netspace_v2_defconfig @@ -6,6 +6,7 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/LaCie/netspace_v2/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_NETSPACE_V2=y CONFIG_NETSPACE_V2=y CONFIG_ENV_SIZE=0x1000 @@ -16,8 +17,6 @@ CONFIG_SYS_PROMPT="ns2> " CONFIG_IDENT_STRING=" NS v2" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_ENV_ADDR=0x70000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/nsa310s_defconfig b/configs/nsa310s_defconfig index ab896ff54e..76839e62dd 100644 --- a/configs/nsa310s_defconfig +++ b/configs/nsa310s_defconfig @@ -50,8 +50,6 @@ CONFIG_MTD_RAW_NAND=y CONFIG_PHY_MARVELL=y CONFIG_MVGBE=y CONFIG_MII=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_UBIFS_SILENCE_MSG=y diff --git a/configs/nsim_700_defconfig b/configs/nsim_700_defconfig index 970bdbddc8..d4fd21b18d 100644 --- a/configs/nsim_700_defconfig +++ b/configs/nsim_700_defconfig @@ -4,6 +4,8 @@ CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=arc700 -mlock -mswape" CONFIG_TEXT_BASE=0x81000000 CONFIG_SYS_MALLOC_LEN=0x0200000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_SYS_PROMPT="nsim# " CONFIG_DEBUG_UART_BASE=0xf0000000 @@ -11,8 +13,6 @@ CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/nsim_700be_defconfig b/configs/nsim_700be_defconfig index f5e88d8dda..2e71b79deb 100644 --- a/configs/nsim_700be_defconfig +++ b/configs/nsim_700be_defconfig @@ -5,6 +5,8 @@ CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=arc700 -mlock -mswape" CONFIG_TEXT_BASE=0x81000000 CONFIG_SYS_MALLOC_LEN=0x0200000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_SYS_PROMPT="nsim# " CONFIG_DEBUG_UART_BASE=0xf0000000 @@ -12,8 +14,6 @@ CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/nsim_hs38_defconfig b/configs/nsim_hs38_defconfig index 1afabe6717..5cc61b0540 100644 --- a/configs/nsim_hs38_defconfig +++ b/configs/nsim_hs38_defconfig @@ -5,6 +5,8 @@ CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=archs" CONFIG_TEXT_BASE=0x81000000 CONFIG_SYS_MALLOC_LEN=0x0200000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_SYS_PROMPT="nsim# " CONFIG_DEBUG_UART_BASE=0xf0000000 @@ -12,8 +14,6 @@ CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/nsim_hs38be_defconfig b/configs/nsim_hs38be_defconfig index 3ef599f232..42aca2ad81 100644 --- a/configs/nsim_hs38be_defconfig +++ b/configs/nsim_hs38be_defconfig @@ -6,6 +6,8 @@ CONFIG_NSIM_BOARD_CPPFLAGS="-mcpu=archs" CONFIG_TEXT_BASE=0x81000000 CONFIG_SYS_MALLOC_LEN=0x0200000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_DEFAULT_DEVICE_TREE="nsim" CONFIG_SYS_PROMPT="nsim# " CONFIG_DEBUG_UART_BASE=0xf0000000 @@ -13,8 +15,6 @@ CONFIG_DEBUG_UART_CLOCK=70000000 CONFIG_SYS_CLK_FREQ=70000000 CONFIG_SYS_LOAD_ADDR=0x82000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index e2e8bebf6d..6d6d8903c2 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra124-nyan-big" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Tegra124 (Nyan-big) # " +CONFIG_SPL_STACK=0x800ffffc CONFIG_BOOTSTAGE_STASH_ADDR=0x83000000 CONFIG_DEBUG_UART_BASE=0x70006000 CONFIG_DEBUG_UART_CLOCK=408000000 @@ -28,7 +29,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0xef8100 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig index 5fdc397037..7b744e324c 100644 --- a/configs/octeontx2_95xx_defconfig +++ b/configs/octeontx2_95xx_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x04000000 CONFIG_SYS_MALLOC_LEN=0x4008000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40ffff0 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0xF00000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -18,8 +20,6 @@ CONFIG_SYS_LOAD_ADDR=0x4000000 CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x04000000 CONFIG_SYS_MEMTEST_END=0x040f0000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40ffff0 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig index 061464d790..7aeca7a198 100644 --- a/configs/octeontx2_96xx_defconfig +++ b/configs/octeontx2_96xx_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x04000000 CONFIG_SYS_MALLOC_LEN=0x4008000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40ffff0 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0xF00000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -17,8 +19,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x4000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40ffff0 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig index 97c2c836f4..d88b1b209f 100644 --- a/configs/octeontx_81xx_defconfig +++ b/configs/octeontx_81xx_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x2800000 CONFIG_SYS_MALLOC_LEN=0x4008000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x28ffff0 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0xF00000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -19,8 +21,6 @@ CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_SYS_MEMTEST_START=0x2800000 CONFIG_SYS_MEMTEST_END=0x28f0000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x28ffff0 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig index 1afa6a36b1..bcd82e45e2 100644 --- a/configs/octeontx_83xx_defconfig +++ b/configs/octeontx_83xx_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x2800000 CONFIG_SYS_MALLOC_LEN=0x4008000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x28ffff0 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0xF00000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -17,8 +19,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x2800000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x28ffff0 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/odroid-c2_defconfig b/configs/odroid-c2_defconfig index a4c4fc7906..8c06165bef 100644 --- a/configs/odroid-c2_defconfig +++ b/configs/odroid-c2_defconfig @@ -2,16 +2,17 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-odroidc2" +CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-c2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -45,7 +46,6 @@ CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/odroid-c4_defconfig b/configs/odroid-c4_defconfig index 2c449a1f42..38b774e27d 100644 --- a/configs/odroid-c4_defconfig +++ b/configs/odroid-c4_defconfig @@ -3,17 +3,18 @@ CONFIG_SYS_BOARD="odroid-n2" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-c4" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-c4/hc4" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -45,7 +46,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/odroid-go-ultra_defconfig b/configs/odroid-go-ultra_defconfig index a4d349fba4..dca3a3a1d0 100644 --- a/configs/odroid-go-ultra_defconfig +++ b/configs/odroid-go-ultra_defconfig @@ -3,17 +3,18 @@ CONFIG_SYS_BOARD="w400" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-go-ultra" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-go-ultra" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -48,7 +49,6 @@ CONFIG_PMIC_RK8XX=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_RESET=y CONFIG_REGULATOR_RK8XX=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/configs/odroid-go2_defconfig b/configs/odroid-go2_defconfig index 33adcc952c..459ae3d59c 100644 --- a/configs/odroid-go2_defconfig +++ b/configs/odroid-go2_defconfig @@ -7,23 +7,25 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x4000 CONFIG_DEFAULT_DEVICE_TREE="rk3326-odroid-go2" CONFIG_SPL_TEXT_BASE=0x00000000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_ODROID_GO2=y CONFIG_DEBUG_UART_CHANNEL=1 CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -42,7 +44,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y @@ -100,7 +101,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y CONFIG_ROCKCHIP_SDRAM_COMMON=y -CONFIG_DM_RESET=y # CONFIG_SPECIFY_CONSOLE_INDEX is not set CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/configs/odroid-hc4_defconfig b/configs/odroid-hc4_defconfig index 2893802f22..2cf524142f 100644 --- a/configs/odroid-hc4_defconfig +++ b/configs/odroid-hc4_defconfig @@ -3,9 +3,12 @@ CONFIG_SYS_BOARD="odroid-n2" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-odroid-hc4" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -13,8 +16,6 @@ CONFIG_IDENT_STRING=" odroid-hc4" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -58,7 +59,6 @@ CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_DM_RESET=y CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/odroid-n2_defconfig b/configs/odroid-n2_defconfig index 190645da25..abf642c5e1 100644 --- a/configs/odroid-n2_defconfig +++ b/configs/odroid-n2_defconfig @@ -3,17 +3,18 @@ CONFIG_SYS_BOARD="odroid-n2" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-n2/n2-plus" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -45,7 +46,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/odroid-n2l_defconfig b/configs/odroid-n2l_defconfig index 7f9e64d942..d5d30b80c6 100644 --- a/configs/odroid-n2l_defconfig +++ b/configs/odroid-n2l_defconfig @@ -3,17 +3,18 @@ CONFIG_SYS_BOARD="w400" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12b-odroid-n2l" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" odroid-n2l" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -40,7 +41,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index 7593d1fbcd..58ae7c975e 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -8,6 +8,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS5=y # CONFIG_EXYNOS_TMU is not set CONFIG_NR_DRAM_BANKS=8 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x42e00000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x310000 CONFIG_DEFAULT_DEVICE_TREE="exynos5422-odroidxu3" @@ -16,8 +18,6 @@ CONFIG_IDENT_STRING=" for ODROID-XU3/XU4/HC1/HC2" CONFIG_SYS_MEM_TOP_HIDE=0x01600000 CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x42e00000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index 6e1c29b355..469788e420 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -10,6 +10,8 @@ CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_ODROID=y CONFIG_EXYNOS_ACE_SHA=y CONFIG_NR_DRAM_BANKS=8 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43dfff10 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x140000 CONFIG_DEFAULT_DEVICE_TREE="exynos4412-odroid" @@ -17,8 +19,6 @@ CONFIG_SYS_PROMPT="Odroid # " CONFIG_SYS_MEM_TOP_HIDE=0x00100000 CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43dfff10 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SYS_MONITOR_LEN=262144 CONFIG_FIT=y diff --git a/configs/omap35_logic_defconfig b/configs/omap35_logic_defconfig index 84e267da58..dea6abf832 100644 --- a/configs/omap35_logic_defconfig +++ b/configs/omap35_logic_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO is not set CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-35xx-devkit" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y @@ -15,8 +17,6 @@ CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_BOOTCOMMAND="run autoboot" diff --git a/configs/omap35_logic_somlv_defconfig b/configs/omap35_logic_somlv_defconfig index fb9430b454..6e34a34cac 100644 --- a/configs/omap35_logic_somlv_defconfig +++ b/configs/omap35_logic_somlv_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO is not set CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-35xx-devkit" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y @@ -15,8 +17,6 @@ CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_SYS_MONITOR_BASE=0x10000000 diff --git a/configs/omap3_beagle_defconfig b/configs/omap3_beagle_defconfig index 9d8420996d..b612ed78a7 100644 --- a/configs/omap3_beagle_defconfig +++ b/configs/omap3_beagle_defconfig @@ -4,6 +4,8 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="omap3-beagle" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_BEAGLE=y @@ -11,8 +13,6 @@ CONFIG_SYS_PROMPT="BeagleBoard # " CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_BOOTCOMMAND="run findfdt; run distro_bootcmd" CONFIG_USE_PREBOOT=y diff --git a/configs/omap3_evm_defconfig b/configs/omap3_evm_defconfig index 891e144cfc..453fca354d 100644 --- a/configs/omap3_evm_defconfig +++ b/configs/omap3_evm_defconfig @@ -4,6 +4,8 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="omap3-evm" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_EVM=y @@ -11,8 +13,6 @@ CONFIG_SYS_PROMPT="OMAP3_EVM # " CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then setenv boot mmc; setenv addr_fit 0x8b000000; run update_to_fit; run mmcboot; fi; run envboot; run distro_bootcmd" CONFIG_USE_PREBOOT=y diff --git a/configs/omap3_logic_defconfig b/configs/omap3_logic_defconfig index 67db3afd7f..a7e9b507d0 100644 --- a/configs/omap3_logic_defconfig +++ b/configs/omap3_logic_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO is not set CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="logicpd-torpedo-37xx-devkit" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y @@ -15,8 +17,6 @@ CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_BOOTCOMMAND="run autoboot" diff --git a/configs/omap3_logic_somlv_defconfig b/configs/omap3_logic_somlv_defconfig index 37708516f1..5699e5dc9d 100644 --- a/configs/omap3_logic_somlv_defconfig +++ b/configs/omap3_logic_somlv_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_TI_COMMON_CMD_OPTIONS=y # CONFIG_SPL_GPIO is not set CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_DEFAULT_DEVICE_TREE="logicpd-som-lv-37xx-devkit" CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_OMAP3_LOGIC=y @@ -15,8 +17,6 @@ CONFIG_SYS_PROMPT="OMAP Logic # " CONFIG_SPL=y CONFIG_LTO=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_SYS_MONITOR_BASE=0x10000000 diff --git a/configs/omap4_panda_defconfig b/configs/omap4_panda_defconfig index 79807f104f..e27e27d014 100644 --- a/configs/omap4_panda_defconfig +++ b/configs/omap4_panda_defconfig @@ -2,14 +2,14 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030df00 CONFIG_DEFAULT_DEVICE_TREE="omap4-panda" CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_OMAP44XX=y CONFIG_TARGET_OMAP4_PANDA=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030df00 CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="omap4-panda.dtb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/omap4_sdp4430_defconfig b/configs/omap4_sdp4430_defconfig index e2f1bc67df..909f10ee79 100644 --- a/configs/omap4_sdp4430_defconfig +++ b/configs/omap4_sdp4430_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_L2_PL310=y # CONFIG_SPL_USE_ARCH_MEMSET is not set CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030df00 CONFIG_ENV_OFFSET=0xE0000 CONFIG_DEFAULT_DEVICE_TREE="omap4-sdp" CONFIG_SPL_TEXT_BASE=0x40300000 @@ -12,8 +14,6 @@ CONFIG_TARGET_OMAP4_SDP4430=y CONFIG_CMD_BAT=y CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030df00 CONFIG_BOOTCOMMAND="if test ${boot_fit} -eq 1; then run update_to_fit; fi; run findfdt; run init_console; run envboot; run distro_bootcmd" CONFIG_DEFAULT_FDT_FILE="omap4-sdp.dtb" CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/omap5_uevm_defconfig b/configs/omap5_uevm_defconfig index 9d5c515a44..c1ac60ebb0 100644 --- a/configs/omap5_uevm_defconfig +++ b/configs/omap5_uevm_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SYS_MALLOC_F_LEN=0x4000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4031ff00 CONFIG_DEFAULT_DEVICE_TREE="omap5-uevm" CONFIG_SPL_TEXT_BASE=0x40300000 CONFIG_OMAP54XX=y @@ -11,8 +13,6 @@ CONFIG_ENV_OFFSET_REDUND=0x280000 CONFIG_ARMV7_LPAE=y CONFIG_AHCI=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4031ff00 CONFIG_BOOTCOMMAND="if test ${dofastboot} -eq 1; then echo Boot fastboot requested, resetting dofastboot ...;setenv dofastboot 0; saveenv;echo Booting into fastboot ...; fastboot 1;fi;if test ${boot_fit} -eq 1; then run update_to_fit;fi;run findfdt; run finduuid; run distro_bootcmd;run emmc_android_boot; " CONFIG_DEFAULT_FDT_FILE="omap5-uevm.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/omapl138_lcdk_defconfig b/configs/omapl138_lcdk_defconfig index ff3b5f0857..dec7a4bf31 100644 --- a/configs/omapl138_lcdk_defconfig +++ b/configs/omapl138_lcdk_defconfig @@ -13,6 +13,8 @@ CONFIG_TI_COMMON_CMD_OPTIONS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x0 CONFIG_DM_GPIO=y @@ -20,10 +22,9 @@ CONFIG_DEFAULT_DEVICE_TREE="da850-lcdk" CONFIG_SPL_TEXT_BASE=0x80000000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x8001ff00 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0xc0700000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0000f20 CONFIG_DYNAMIC_SYS_CLK_FREQ=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTCOMMAND=y @@ -40,7 +41,6 @@ CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x8001ff00 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0f70000 @@ -83,7 +83,6 @@ CONFIG_DM_MTD=y CONFIG_MTD_RAW_NAND=y CONFIG_SYS_NAND_USE_FLASH_BBT=y CONFIG_NAND_DAVINCI=y -CONFIG_SYS_NAND_HW_ECC_OOBFIRST=y CONFIG_SYS_NAND_BLOCK_SIZE=0x20000 CONFIG_SYS_NAND_PAGE_COUNT=0x40 CONFIG_SYS_NAND_PAGE_SIZE=0x800 @@ -91,6 +90,7 @@ CONFIG_SYS_NAND_OOBSIZE=0x40 CONFIG_SYS_NAND_BUSWIDTH_16BIT=y CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y CONFIG_SYS_NAND_U_BOOT_OFFS=0x28000 +CONFIG_SYS_NAND_HW_ECC_OOBFIRST=y CONFIG_MII=y CONFIG_DRIVER_TI_EMAC=y CONFIG_PHY=y diff --git a/configs/openpiton_riscv64_defconfig b/configs/openpiton_riscv64_defconfig index 04c37f48c1..4f7f377897 100644 --- a/configs/openpiton_riscv64_defconfig +++ b/configs/openpiton_riscv64_defconfig @@ -2,6 +2,8 @@ CONFIG_RISCV=y CONFIG_TEXT_BASE=0x80200000 CONFIG_SYS_MALLOC_LEN=0x10000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82000000 CONFIG_DEFAULT_DEVICE_TREE="openpiton-riscv64" CONFIG_SYS_PROMPT="openpiton$ " CONFIG_SYS_LOAD_ADDR=0x87000000 @@ -12,8 +14,6 @@ CONFIG_RISCV_SMODE=y CONFIG_OF_BOARD_FIXUP=y # CONFIG_LOCALVERSION_AUTO is not set CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82000000 # CONFIG_EXPERT is not set # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set diff --git a/configs/openpiton_riscv64_spl_defconfig b/configs/openpiton_riscv64_spl_defconfig index b7ccb68342..71a98e94d8 100644 --- a/configs/openpiton_riscv64_spl_defconfig +++ b/configs/openpiton_riscv64_spl_defconfig @@ -2,8 +2,11 @@ CONFIG_RISCV=y CONFIG_TEXT_BASE=0x80000000 CONFIG_SYS_MALLOC_LEN=0x10000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82000000 CONFIG_DEFAULT_DEVICE_TREE="openpiton-riscv64" CONFIG_SYS_PROMPT="openpiton$ " +CONFIG_SPL_STACK=0x83fffe80 CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 CONFIG_SPL=y CONFIG_SPL_LIBDISK_SUPPORT=y @@ -16,8 +19,6 @@ CONFIG_CMODEL_MEDANY=y CONFIG_RISCV_SMODE=y # CONFIG_LOCALVERSION_AUTO is not set CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x82000000 # CONFIG_EXPERT is not set # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set @@ -28,7 +29,6 @@ CONFIG_SPL_BSS_START_ADDR=0x82000000 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x83fffe80 CONFIG_SYS_SPL_MALLOC=y # CONFIG_SPL_BANNER_PRINT is not set CONFIG_SPL_CPU=y diff --git a/configs/openrd_base_defconfig b/configs/openrd_base_defconfig index 45bd307a1c..eb2be2426c 100644 --- a/configs/openrd_base_defconfig +++ b/configs/openrd_base_defconfig @@ -7,14 +7,13 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_OPENRD=y CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-base" CONFIG_IDENT_STRING="\nOpenRD-Base" CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 diff --git a/configs/openrd_client_defconfig b/configs/openrd_client_defconfig index 9c9f6c463d..6e35e8b186 100644 --- a/configs/openrd_client_defconfig +++ b/configs/openrd_client_defconfig @@ -7,6 +7,7 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_OPENRD=y CONFIG_BOARD_IS_OPENRD_CLIENT=y CONFIG_ENV_SIZE=0x20000 @@ -14,8 +15,6 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-client" CONFIG_IDENT_STRING="\nOpenRD-Client" CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 diff --git a/configs/openrd_ultimate_defconfig b/configs/openrd_ultimate_defconfig index fbcdf4b363..7ef47044cd 100644 --- a/configs/openrd_ultimate_defconfig +++ b/configs/openrd_ultimate_defconfig @@ -7,6 +7,7 @@ CONFIG_ARCH_KIRKWOOD=y CONFIG_SYS_KWD_CONFIG="board/Marvell/openrd/kwbimage.cfg" CONFIG_TEXT_BASE=0x600000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 CONFIG_TARGET_OPENRD=y CONFIG_BOARD_IS_OPENRD_ULTIMATE=y CONFIG_ENV_SIZE=0x20000 @@ -14,8 +15,6 @@ CONFIG_ENV_OFFSET=0x80000 CONFIG_DEFAULT_DEVICE_TREE="kirkwood-openrd-ultimate" CONFIG_IDENT_STRING="\nOpenRD-Ultimate" CONFIG_SYS_LOAD_ADDR=0x800000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc8012000 # CONFIG_SYS_MALLOC_F is not set CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=524288 diff --git a/configs/orangepi-rk3399_defconfig b/configs/orangepi-rk3399_defconfig index 0980d81569..0f814b1b28 100644 --- a/configs/orangepi-rk3399_defconfig +++ b/configs/orangepi-rk3399_defconfig @@ -4,16 +4,17 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-orangepi" CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-orangepi.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x2e000 @@ -23,7 +24,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y diff --git a/configs/origen_defconfig b/configs/origen_defconfig index 0aaf899061..9a9fbfc409 100644 --- a/configs/origen_defconfig +++ b/configs/origen_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_MALLOC_LEN=0x5004000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_ORIGEN=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2040000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x4200 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-origen" @@ -19,8 +21,6 @@ CONFIG_IDENT_STRING=" for ORIGEN" CONFIG_SYS_MEM_TOP_HIDE=0x100000 CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2040000 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_BOOTCOMMAND="if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootenv; then echo Loaded environment from ${bootenv};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;if run loadbootscript; then run bootscript; fi; fi;load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} " CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/p200_defconfig b/configs/p200_defconfig index 41f9079c21..51add0cb93 100644 --- a/configs/p200_defconfig +++ b/configs/p200_defconfig @@ -2,16 +2,17 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p200" +CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p200" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -36,7 +37,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXBB=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/p201_defconfig b/configs/p201_defconfig index 32f47dbf86..48e53c0ebe 100644 --- a/configs/p201_defconfig +++ b/configs/p201_defconfig @@ -3,16 +3,17 @@ CONFIG_SYS_BOARD="p201" CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxbb-p201" +CONFIG_DM_RESET=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p201" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -37,7 +38,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXBB=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/p212_defconfig b/configs/p212_defconfig index ffd003a158..2b76437894 100644 --- a/configs/p212_defconfig +++ b/configs/p212_defconfig @@ -2,17 +2,18 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxl-s905x-p212" +CONFIG_DM_RESET=y CONFIG_MESON_GXL=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" p212" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_CONSOLE_MUX=y @@ -40,7 +41,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_GXL=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/paz00_defconfig b/configs/paz00_defconfig index 558375da9f..fadf7fdeb0 100644 --- a/configs/paz00_defconfig +++ b/configs/paz00_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra20-paz00" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (Paz00) MOD # " +CONFIG_SPL_STACK=0xffffc CONFIG_TEGRA20=y CONFIG_TARGET_PAZ00=y CONFIG_SYS_LOAD_ADDR=0x1000000 @@ -16,7 +17,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig index 3ed55916d2..17f365fe4d 100644 --- a/configs/pcm051_rev3_defconfig +++ b/configs/pcm051_rev3_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" CONFIG_AM33XX=y CONFIG_TARGET_PCM051=y @@ -12,8 +14,6 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="am335x-wega-rdk.dtb" CONFIG_SYS_CONSOLE_INFO_QUIET=y diff --git a/configs/peach-pi_defconfig b/configs/peach-pi_defconfig index 007f7bbeac..f8a49db592 100644 --- a/configs/peach-pi_defconfig +++ b/configs/peach-pi_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_PEACH_PI=y CONFIG_NR_DRAM_BANKS=7 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2073800 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 @@ -19,8 +21,6 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for Peach-Pi" CONFIG_SYS_LOAD_ADDR=0x23e00000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2073800 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/peach-pit_defconfig b/configs/peach-pit_defconfig index c0f5a013cf..a71c417b4b 100644 --- a/configs/peach-pit_defconfig +++ b/configs/peach-pit_defconfig @@ -8,6 +8,8 @@ CONFIG_SYS_MALLOC_LEN=0x5004000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_PEACH_PIT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2073800 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 @@ -18,8 +20,6 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for Peach-Pit" CONFIG_SYS_LOAD_ADDR=0x23e00000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2073800 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig index acbef25d04..9ee742fa38 100644 --- a/configs/pg_wcom_expu1_defconfig +++ b/configs/pg_wcom_expu1_defconfig @@ -103,5 +103,5 @@ CONFIG_SYS_QE_FW_ADDR=0x60020000 CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y -CONFIG_POST=y CONFIG_LZO=y +CONFIG_POST=y diff --git a/configs/pg_wcom_expu1_update_defconfig b/configs/pg_wcom_expu1_update_defconfig index 3d9581abd6..06f8bf7569 100644 --- a/configs/pg_wcom_expu1_update_defconfig +++ b/configs/pg_wcom_expu1_update_defconfig @@ -101,5 +101,5 @@ CONFIG_SYS_QE_FW_ADDR=0x60020000 CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y -CONFIG_POST=y CONFIG_LZO=y +CONFIG_POST=y diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig index 0d7299efad..4b49aaf691 100644 --- a/configs/pg_wcom_seli8_defconfig +++ b/configs/pg_wcom_seli8_defconfig @@ -103,5 +103,5 @@ CONFIG_SYS_QE_FW_ADDR=0x60020000 CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y -CONFIG_POST=y CONFIG_LZO=y +CONFIG_POST=y diff --git a/configs/pg_wcom_seli8_update_defconfig b/configs/pg_wcom_seli8_update_defconfig index d677b13a59..6b4e91f287 100644 --- a/configs/pg_wcom_seli8_update_defconfig +++ b/configs/pg_wcom_seli8_update_defconfig @@ -101,5 +101,5 @@ CONFIG_SYS_QE_FW_ADDR=0x60020000 CONFIG_SPECIFY_CONSOLE_INDEX=y CONFIG_DM_SERIAL=y CONFIG_SYS_NS16550=y -CONFIG_POST=y CONFIG_LZO=y +CONFIG_POST=y diff --git a/configs/phycore-am335x-r2-regor_defconfig b/configs/phycore-am335x-r2-regor_defconfig index 1b31676568..d74078c7be 100644 --- a/configs/phycore-am335x-r2-regor_defconfig +++ b/configs/phycore-am335x-r2-regor_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_OFFSET=0xA0000 CONFIG_DEFAULT_DEVICE_TREE="am335x-regor-rdk" CONFIG_AM33XX=y @@ -15,8 +17,6 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/phycore-am335x-r2-wega_defconfig b/configs/phycore-am335x-r2-wega_defconfig index c5ffb41274..0f75d56c88 100644 --- a/configs/phycore-am335x-r2-wega_defconfig +++ b/configs/phycore-am335x-r2-wega_defconfig @@ -4,6 +4,8 @@ CONFIG_ARCH_OMAP2PLUS=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_OFFSET=0xA0000 CONFIG_DEFAULT_DEVICE_TREE="am335x-wega-rdk" CONFIG_AM33XX=y @@ -15,8 +17,6 @@ CONFIG_SPL=y CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SPL_PAYLOAD="u-boot.img" -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 # CONFIG_FIT is not set CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig index fab2550536..c73a7d983f 100644 --- a/configs/phycore-imx8mm_defconfig +++ b/configs/phycore-imx8mm_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x3E0000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -22,7 +23,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;" @@ -32,7 +32,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig index 82e4f1ed97..846c8793cc 100644 --- a/configs/phycore-imx8mp_defconfig +++ b/configs/phycore-imx8mp_defconfig @@ -16,6 +16,7 @@ CONFIG_SYS_PROMPT="u-boot=> " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x960000 CONFIG_SPL=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -23,7 +24,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadimage; then run mmcboot; else run netboot; fi; fi;" @@ -37,7 +37,6 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x960000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/phycore-rk3288_defconfig b/configs/phycore-rk3288_defconfig index 0632a928bc..cfe1a397df 100644 --- a/configs/phycore-rk3288_defconfig +++ b/configs/phycore-rk3288_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-phycore-rdk" CONFIG_SPL_TEXT_BASE=0xff704000 @@ -11,12 +13,11 @@ CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_PHYCORE_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_SPL_STACK=0xff718000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y @@ -27,7 +28,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SYS_BOOTM_LEN=0x4000000 diff --git a/configs/pic32mzdask_defconfig b/configs/pic32mzdask_defconfig index 863c749910..d916cc4ada 100644 --- a/configs/pic32mzdask_defconfig +++ b/configs/pic32mzdask_defconfig @@ -2,6 +2,8 @@ CONFIG_MIPS=y CONFIG_TEXT_BASE=0x9D004000 CONFIG_SYS_MALLOC_LEN=0x40000 CONFIG_SYS_MALLOC_F_LEN=0x600 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007ffff CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="pic32mzda_sk" @@ -14,8 +16,6 @@ CONFIG_MIPS_BOOT_FDT=y CONFIG_SYS_MEMTEST_START=0x88000000 CONFIG_SYS_MEMTEST_END=0x88080000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007ffff CONFIG_SYS_MONITOR_LEN=196608 CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=5 diff --git a/configs/pico-dwarf-imx7d_defconfig b/configs/pico-dwarf-imx7d_defconfig index 13e8d0c27f..34a3bf2d34 100644 --- a/configs/pico-dwarf-imx7d_defconfig +++ b/configs/pico-dwarf-imx7d_defconfig @@ -74,7 +74,6 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y -CONFIG_POWER_PFUZE3000=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_SERIAL=y diff --git a/configs/pico-hobbit-imx7d_defconfig b/configs/pico-hobbit-imx7d_defconfig index 63c168eeab..2e6a3e00b8 100644 --- a/configs/pico-hobbit-imx7d_defconfig +++ b/configs/pico-hobbit-imx7d_defconfig @@ -75,8 +75,6 @@ CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_PFUZE100=y -CONFIG_POWER_PFUZE3000=y -CONFIG_POWER_I2C=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig index a6ed013f8b..3f1b07bf9e 100644 --- a/configs/pico-imx6_defconfig +++ b/configs/pico-imx6_defconfig @@ -24,7 +24,6 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTCOMMAND="run default_boot" CONFIG_DEFAULT_FDT_FILE="ask" CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE=y diff --git a/configs/pico-imx7d_bl33_defconfig b/configs/pico-imx7d_bl33_defconfig index bfe0149bef..a994337da2 100644 --- a/configs/pico-imx7d_bl33_defconfig +++ b/configs/pico-imx7d_bl33_defconfig @@ -71,8 +71,6 @@ CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_PFUZE100=y -CONFIG_POWER_PFUZE3000=y -CONFIG_POWER_I2C=y CONFIG_CONS_INDEX=4 CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y diff --git a/configs/pico-imx7d_defconfig b/configs/pico-imx7d_defconfig index a4367db461..56434c9ede 100644 --- a/configs/pico-imx7d_defconfig +++ b/configs/pico-imx7d_defconfig @@ -74,7 +74,6 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y -CONFIG_POWER_PFUZE3000=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_SERIAL=y diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig index 1b49eb2ed9..5c7311c38c 100644 --- a/configs/pico-imx8mq_defconfig +++ b/configs/pico-imx8mq_defconfig @@ -14,9 +14,11 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx8mq-pico-pi" CONFIG_SPL_TEXT_BASE=0x7E1000 CONFIG_TARGET_PICO_IMX8MQ=y +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x187ff0 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x40480000 @@ -25,7 +27,6 @@ CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="mmc dev ${mmcdev}; if mmc rescan; then if run loadbootscript; then run bootscript; else if run loadimage; then run mmcboot; else run netboot; fi; fi; else booti ${loadaddr} - ${fdt_addr}; fi" @@ -37,7 +38,6 @@ CONFIG_SPL_BSS_START_ADDR=0x180000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x187ff0 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 @@ -94,7 +94,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y CONFIG_SPL_POWER_I2C=y -CONFIG_DM_RESET=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_DM_THERMAL=y diff --git a/configs/pico-nymph-imx7d_defconfig b/configs/pico-nymph-imx7d_defconfig index 13e8d0c27f..34a3bf2d34 100644 --- a/configs/pico-nymph-imx7d_defconfig +++ b/configs/pico-nymph-imx7d_defconfig @@ -74,7 +74,6 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y -CONFIG_POWER_PFUZE3000=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_SERIAL=y diff --git a/configs/pico-pi-imx7d_defconfig b/configs/pico-pi-imx7d_defconfig index 4f07e53b80..f353b00278 100644 --- a/configs/pico-pi-imx7d_defconfig +++ b/configs/pico-pi-imx7d_defconfig @@ -74,7 +74,6 @@ CONFIG_RGMII=y CONFIG_MII=y CONFIG_PINCTRL=y CONFIG_PINCTRL_IMX7=y -CONFIG_POWER_PFUZE3000=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_SERIAL=y diff --git a/configs/pinebook-pro-rk3399_defconfig b/configs/pinebook-pro-rk3399_defconfig index c885cbaf5a..dff4695e37 100644 --- a/configs/pinebook-pro-rk3399_defconfig +++ b/configs/pinebook-pro-rk3399_defconfig @@ -4,19 +4,21 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinebook-pro" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_PINEBOOK_PRO_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinebook-pro.dtb" @@ -29,7 +31,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_SPI_LOAD=y @@ -75,7 +76,6 @@ CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM_ROCKCHIP_LPDDR4=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 diff --git a/configs/pinephone-pro-rk3399_defconfig b/configs/pinephone-pro-rk3399_defconfig index eb979f6c05..54f9b90536 100644 --- a/configs/pinephone-pro-rk3399_defconfig +++ b/configs/pinephone-pro-rk3399_defconfig @@ -4,19 +4,21 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-pinephone-pro" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_PINEPHONE_PRO_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_BOOTDELAY=3 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-pinephone-pro.dtb" @@ -29,7 +31,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_SPI_LOAD=y @@ -52,7 +53,6 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_DM_KEYBOARD=y CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_MISC=y @@ -69,13 +69,10 @@ CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_DM_PMIC_FAN53555=y -CONFIG_DM_REGULATOR_FAN53555=y CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_RAM_RK3399_LPDDR4=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 @@ -96,8 +93,8 @@ CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_ETHER_RTL8152=y -CONFIG_DISPLAY=y CONFIG_VIDEO=y +CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_EDP=y CONFIG_SPL_TINY_MEMSET=y diff --git a/configs/plutux_defconfig b/configs/plutux_defconfig index 789b5d9398..4fee9df94f 100644 --- a/configs/plutux_defconfig +++ b/configs/plutux_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_OFFSET=0x1FFE0000 CONFIG_DEFAULT_DEVICE_TREE="tegra20-plutux" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (Plutux) # " +CONFIG_SPL_STACK=0xffffc CONFIG_TEGRA20=y CONFIG_TARGET_PLUTUX=y CONFIG_TEGRA_ENABLE_UARTD=y @@ -19,7 +20,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 diff --git a/configs/pm9261_defconfig b/configs/pm9261_defconfig index d30d07bcbf..4221c63cee 100644 --- a/configs/pm9261_defconfig +++ b/configs/pm9261_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0 CONFIG_SYS_MALLOC_LEN=0x50000 CONFIG_TARGET_PM9261=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003f00 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y @@ -12,8 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="at91sam9261ek" CONFIG_SYS_PROMPT="pm9261> " CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_ENV_ADDR=0x10040000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003f00 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 " diff --git a/configs/pm9263_defconfig b/configs/pm9263_defconfig index 11ec775b38..f8ad2fc132 100644 --- a/configs/pm9263_defconfig +++ b/configs/pm9263_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0 CONFIG_SYS_MALLOC_LEN=0x50000 CONFIG_TARGET_PM9263=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003f00 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y @@ -12,8 +14,6 @@ CONFIG_DEFAULT_DEVICE_TREE="at91sam9263ek" CONFIG_SYS_PROMPT="u-boot-pm9263> " CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_ENV_ADDR=0x10040000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003f00 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="root=/dev/mtdblock4 rootfstype=jffs2 fbcon=rotate:3 " diff --git a/configs/pm9g45_defconfig b/configs/pm9g45_defconfig index 98a79b2416..e7b4d967f2 100644 --- a/configs/pm9g45_defconfig +++ b/configs/pm9g45_defconfig @@ -6,6 +6,8 @@ CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_TARGET_PM9G45=y CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70003f00 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9m10g45ek" CONFIG_SYS_PROMPT="U-Boot> " @@ -14,8 +16,6 @@ CONFIG_DEBUG_UART_CLOCK=132000000 CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x70003f00 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/pogo_e02_defconfig b/configs/pogo_e02_defconfig index 067fb9e13b..469752cd83 100644 --- a/configs/pogo_e02_defconfig +++ b/configs/pogo_e02_defconfig @@ -52,8 +52,6 @@ CONFIG_MTD_RAW_NAND=y CONFIG_PHY_MARVELL=y CONFIG_MVGBE=y CONFIG_MII=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/pogo_v4_defconfig b/configs/pogo_v4_defconfig index 3860ad30d3..cda7a32fec 100644 --- a/configs/pogo_v4_defconfig +++ b/configs/pogo_v4_defconfig @@ -70,8 +70,6 @@ CONFIG_PCI=y CONFIG_PCI_MVEBU=y CONFIG_DM_RTC=y CONFIG_RTC_EMULATION=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_PCI=y diff --git a/configs/poleg_evb_defconfig b/configs/poleg_evb_defconfig index 2d5bfa5e04..b00fb48a5a 100644 --- a/configs/poleg_evb_defconfig +++ b/configs/poleg_evb_defconfig @@ -6,17 +6,18 @@ CONFIG_TEXT_BASE=0x8200 CONFIG_SYS_MALLOC_LEN=0x240000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7f10 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="nuvoton-npcm750-evb" CONFIG_SYS_PROMPT="U-Boot>" +CONFIG_DM_RESET=y CONFIG_TARGET_POLEG=y CONFIG_SYS_LOAD_ADDR=0x10000000 CONFIG_ENV_ADDR=0x80100000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7f10 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run common_bootargs; run romboot" CONFIG_SYS_MAXARGS=32 @@ -40,14 +41,14 @@ CONFIG_CMD_HASH=y CONFIG_CMD_FAT=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y -CONFIG_REGMAP=y -CONFIG_SYSCON=y CONFIG_USE_IPADDR=y CONFIG_IPADDR="192.168.0.2" CONFIG_USE_NETMASK=y CONFIG_NETMASK="255.255.255.0" CONFIG_USE_SERVERIP=y CONFIG_SERVERIP="192.168.0.1" +CONFIG_REGMAP=y +CONFIG_SYSCON=y CONFIG_CLK=y CONFIG_NPCM_AES=y CONFIG_NPCM_SHA=y @@ -63,7 +64,6 @@ CONFIG_SPI_FLASH_MACRONIX=y CONFIG_SPI_FLASH_WINBOND=y CONFIG_PHY_BROADCOM=y CONFIG_PHY_FIXED=y -CONFIG_DM_ETH=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_NET_NPCM750=y @@ -74,7 +74,6 @@ CONFIG_PHY_NPCM_USB=y CONFIG_PINCTRL=y CONFIG_PINCONF=y CONFIG_PINCTRL_NPCM7XX=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_NPCM=y CONFIG_DM_SERIAL=y @@ -103,5 +102,3 @@ CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_WDT_NPCM=y CONFIG_LIB_HW_RAND=y CONFIG_SHA_HW_ACCEL=y -CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=1 - diff --git a/configs/pomelo_defconfig b/configs/pomelo_defconfig index be6806f8b9..3b3fe59583 100644 --- a/configs/pomelo_defconfig +++ b/configs/pomelo_defconfig @@ -4,13 +4,13 @@ CONFIG_TEXT_BASE=0x180000 CONFIG_SYS_MALLOC_LEN=0x101000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2981a000 CONFIG_DEFAULT_DEVICE_TREE="phytium-pomelo" CONFIG_SYS_PROMPT="pomelo#" CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_SYS_PCI_64BIT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2981a000 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyAMA0,115200 earlycon=pl011,0x28001000 root=/dev/sda2 rw" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/poplar_defconfig b/configs/poplar_defconfig index 70dde31c83..c7f2a6cab2 100644 --- a/configs/poplar_defconfig +++ b/configs/poplar_defconfig @@ -4,6 +4,8 @@ CONFIG_TEXT_BASE=0x37000000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x200000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x1F0000 CONFIG_DEFAULT_DEVICE_TREE="hi3798cv200-poplar" @@ -11,8 +13,6 @@ CONFIG_SYS_PROMPT="poplar# " CONFIG_IDENT_STRING="poplar" CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x200000 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_SYS_MAXARGS=64 CONFIG_SYS_CBSIZE=512 diff --git a/configs/popmetal-rk3288_defconfig b/configs/popmetal-rk3288_defconfig index 91123784b5..7857f391c5 100644 --- a/configs/popmetal-rk3288_defconfig +++ b/configs/popmetal-rk3288_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-popmetal" CONFIG_SPL_TEXT_BASE=0xff704000 @@ -11,12 +13,11 @@ CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_POPMETAL_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_SPL_STACK=0xff718000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y @@ -27,7 +28,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SYS_BOOTM_LEN=0x4000000 diff --git a/configs/porter_defconfig b/configs/porter_defconfig index ca56008cb5..1d7462159d 100644 --- a/configs/porter_defconfig +++ b/configs/porter_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -20,14 +22,13 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Porter" CONFIG_R8A7791=y CONFIG_TARGET_PORTER=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_FIT=y CONFIG_BOOTDELAY=3 @@ -36,7 +37,6 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/puma-rk3399_defconfig b/configs/puma-rk3399_defconfig index 0da706e03b..9e3e23f825 100644 --- a/configs/puma-rk3399_defconfig +++ b/configs/puma-rk3399_defconfig @@ -5,21 +5,23 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_SIZE=0x3000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-puma-haikou" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0 CONFIG_ROCKCHIP_SPI_IMAGE=y CONFIG_TARGET_PUMA_RK3399=y +CONFIG_SPL_STACK=0xff8effff CONFIG_DEBUG_UART_BASE=0xFF180000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-puma-haikou.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_MISC_INIT_R=y @@ -30,7 +32,6 @@ CONFIG_SPL_BSS_START_ADDR=0xff8e0000 CONFIG_SPL_BSS_MAX_SIZE=0x10000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff8effff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 @@ -89,7 +90,6 @@ CONFIG_SPL_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_DM_RESET=y CONFIG_DM_RTC=y CONFIG_RTC_ISL1208=y CONFIG_DEBUG_UART_SHIFT=2 diff --git a/configs/px30-core-ctouch2-of10-px30_defconfig b/configs/px30-core-ctouch2-of10-px30_defconfig index 9c36750bde..abe6cfbd57 100644 --- a/configs/px30-core-ctouch2-of10-px30_defconfig +++ b/configs/px30-core-ctouch2-of10-px30_defconfig @@ -7,21 +7,23 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_DEFAULT_DEVICE_TREE="px30-engicam-px30-core-ctouch2-of10" CONFIG_SPL_TEXT_BASE=0x00000000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_PX30_CORE=y CONFIG_DEBUG_UART_CHANNEL=1 CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -39,7 +41,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set @@ -94,7 +95,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y CONFIG_ROCKCHIP_SDRAM_COMMON=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y # CONFIG_SPECIFY_CONSOLE_INDEX is not set diff --git a/configs/px30-core-ctouch2-px30_defconfig b/configs/px30-core-ctouch2-px30_defconfig index db1ceaa31f..e839dcb5f6 100644 --- a/configs/px30-core-ctouch2-px30_defconfig +++ b/configs/px30-core-ctouch2-px30_defconfig @@ -7,21 +7,23 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_DEFAULT_DEVICE_TREE="px30-engicam-px30-core-ctouch2" CONFIG_SPL_TEXT_BASE=0x00000000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_PX30_CORE=y CONFIG_DEBUG_UART_CHANNEL=1 CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -39,7 +41,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set @@ -94,7 +95,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y CONFIG_ROCKCHIP_SDRAM_COMMON=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y # CONFIG_SPECIFY_CONSOLE_INDEX is not set diff --git a/configs/px30-core-edimm2.2-px30_defconfig b/configs/px30-core-edimm2.2-px30_defconfig index d2cca48304..92540e73be 100644 --- a/configs/px30-core-edimm2.2-px30_defconfig +++ b/configs/px30-core-edimm2.2-px30_defconfig @@ -7,21 +7,23 @@ CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_DEFAULT_DEVICE_TREE="px30-engicam-px30-core-edimm2.2" CONFIG_SPL_TEXT_BASE=0x00000000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_PX30_CORE=y CONFIG_DEBUG_UART_CHANNEL=1 CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_DEBUG_UART_BASE=0xFF160000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -39,7 +41,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y # CONFIG_TPL_FRAMEWORK is not set @@ -94,7 +95,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y CONFIG_ROCKCHIP_SDRAM_COMMON=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y # CONFIG_SPECIFY_CONSOLE_INDEX is not set diff --git a/configs/pxm2_defconfig b/configs/pxm2_defconfig index e655b18f02..88a6dbd7db 100644 --- a/configs/pxm2_defconfig +++ b/configs/pxm2_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am335x-pxm50" @@ -23,8 +25,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" diff --git a/configs/qcs404evb_defconfig b/configs/qcs404evb_defconfig index d64cd74269..9e72f64f78 100644 --- a/configs/qcs404evb_defconfig +++ b/configs/qcs404evb_defconfig @@ -4,6 +4,7 @@ CONFIG_COUNTER_FREQUENCY=19000000 CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_SNAPDRAGON=y CONFIG_DEFAULT_DEVICE_TREE="qcs404-evb" +CONFIG_DM_RESET=y CONFIG_TARGET_QCS404EVB=y CONFIG_IDENT_STRING="\nQualcomm QCS404-EVB" CONFIG_SYS_LOAD_ADDR=0x80000000 @@ -30,6 +31,7 @@ CONFIG_CMD_FAT=y CONFIG_CMD_FS_GENERIC=y # CONFIG_NET is not set CONFIG_CLK=y +CONFIG_MSM_GPIO=y CONFIG_QCOM_PMIC_GPIO=y CONFIG_MISC=y CONFIG_MMC_HS400_SUPPORT=y @@ -42,9 +44,7 @@ CONFIG_PHY_QCOM_USB_SS=y CONFIG_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_QCOM=y -CONFIG_DM_RESET=y CONFIG_MSM_SERIAL=y -CONFIG_MSM_GPIO=y CONFIG_SPMI_MSM=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 844c95380e..e73951c3a2 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -1,13 +1,13 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt32" CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_TARGET_QEMU_VIRT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_SYS_MONITOR_LEN=786432 CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 2be349ada7..3618bc5b0f 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -1,14 +1,14 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt32" CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_TARGET_QEMU_VIRT=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_SYS_MONITOR_LEN=786432 CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index 894b6d5d17..9b93949ed3 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -1,6 +1,8 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt32" CONFIG_SPL=y @@ -9,8 +11,6 @@ CONFIG_TARGET_QEMU_VIRT=y CONFIG_RISCV_SMODE=y # CONFIG_OF_BOARD_FIXUP is not set CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_SYS_MONITOR_LEN=786432 CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index 8b558e6bc2..9d2e1c0d99 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -1,14 +1,14 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt64" CONFIG_SYS_LOAD_ADDR=0x80200000 CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_DISPLAY_CPUINFO=y diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 6ed88de234..df8bb968a9 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -1,6 +1,8 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt64" CONFIG_SYS_LOAD_ADDR=0x80200000 @@ -8,8 +10,6 @@ CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_USE_PREBOOT=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index adc6f730d2..1b4300321d 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -1,6 +1,8 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="qemu-virt64" CONFIG_SPL=y @@ -9,8 +11,6 @@ CONFIG_TARGET_QEMU_VIRT=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x80200000 diff --git a/configs/qemu-x86_64_defconfig b/configs/qemu-x86_64_defconfig index 9f1cb2675d..a63a2fd26d 100644 --- a/configs/qemu-x86_64_defconfig +++ b/configs/qemu-x86_64_defconfig @@ -19,7 +19,6 @@ CONFIG_X86_OFFSET_U_BOOT=0xfff00000 CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_SYS_MONITOR_BASE=0x01110000 CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y diff --git a/configs/qemu_arm64_defconfig b/configs/qemu_arm64_defconfig index f66ad32fc9..d2c3372004 100644 --- a/configs/qemu_arm64_defconfig +++ b/configs/qemu_arm64_defconfig @@ -3,6 +3,8 @@ CONFIG_POSITION_INDEPENDENT=y CONFIG_ARCH_QEMU=y CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="qemu-arm64" @@ -13,8 +15,6 @@ CONFIG_SYS_LOAD_ADDR=0x40200000 CONFIG_ENV_ADDR=0x4000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -26,6 +26,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y +CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y @@ -72,4 +73,3 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_PCI=y CONFIG_TPM=y -CONFIG_HUSH_PARSER=y diff --git a/configs/qemu_arm_defconfig b/configs/qemu_arm_defconfig index c2e25c1d6b..aa6bf931b5 100644 --- a/configs/qemu_arm_defconfig +++ b/configs/qemu_arm_defconfig @@ -3,6 +3,8 @@ CONFIG_ARM_SMCCC=y CONFIG_ARCH_QEMU=y CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="qemu-arm" @@ -14,8 +16,6 @@ CONFIG_SYS_LOAD_ADDR=0x40200000 CONFIG_ENV_ADDR=0x4000000 CONFIG_DEBUG_UART=y CONFIG_AHCI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40200000 CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y @@ -27,6 +27,7 @@ CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set # CONFIG_DISPLAY_BOARDINFO is not set CONFIG_PCI_INIT_R=y +CONFIG_HUSH_PARSER=y CONFIG_SYS_CBSIZE=512 CONFIG_SYS_PBSIZE=532 CONFIG_CMD_BOOTZ=y @@ -74,4 +75,3 @@ CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_PCI=y CONFIG_TPM=y -CONFIG_HUSH_PARSER=y diff --git a/configs/r8a77970_eagle_defconfig b/configs/r8a77970_eagle_defconfig index 62192ad389..efbfd6559e 100644 --- a/configs/r8a77970_eagle_defconfig +++ b/configs/r8a77970_eagle_defconfig @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="r8a77970-eagle-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EAGLE=y +CONFIG_SPL_STACK=0xe6304000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_LTO=y CONFIG_REMAKE_ELF=y @@ -28,7 +29,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0xe631f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/r8a77980_condor_defconfig b/configs/r8a77980_condor_defconfig index 2e2bb55ba2..0c3493cdf8 100644 --- a/configs/r8a77980_condor_defconfig +++ b/configs/r8a77980_condor_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_COUNTER_FREQUENCY=16666666 CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_RMOBILE=y -CONFIG_TEXT_BASE=0x0 CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x40000 @@ -13,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="r8a77980-condor-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_CONDOR=y +CONFIG_SPL_STACK=0xe6304000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_LTO=y CONFIG_REMAKE_ELF=y @@ -29,7 +29,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0xe631f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 @@ -65,7 +64,6 @@ CONFIG_DFU_SF=y CONFIG_RCAR_GPIO=y CONFIG_DM_I2C=y CONFIG_SYS_I2C_RCAR_I2C=y -CONFIG_DM_MMC=y CONFIG_MMC_IO_VOLTAGE=y CONFIG_MMC_UHS_SUPPORT=y CONFIG_MMC_HS200_SUPPORT=y diff --git a/configs/r8a77990_ebisu_defconfig b/configs/r8a77990_ebisu_defconfig index ecc797a1b7..9960e7aebb 100644 --- a/configs/r8a77990_ebisu_defconfig +++ b/configs/r8a77990_ebisu_defconfig @@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="r8a77990-ebisu-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_EBISU=y +CONFIG_SPL_STACK=0xe6304000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_LTO=y CONFIG_REMAKE_ELF=y @@ -25,12 +26,10 @@ CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77990-ebisu. CONFIG_DEFAULT_FDT_FILE="r8a77990-ebisu.dtb" # CONFIG_BOARD_EARLY_INIT_F is not set CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_UPDATE_TFTP=y CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0xe631f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 @@ -56,7 +55,6 @@ CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-ex CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SYS_MMC_ENV_DEV=0 CONFIG_SYS_MMC_ENV_PART=2 CONFIG_VERSION_VARIABLE=y CONFIG_REGMAP=y diff --git a/configs/r8a77995_draak_defconfig b/configs/r8a77995_draak_defconfig index c943d11527..4ddb66aef9 100644 --- a/configs/r8a77995_draak_defconfig +++ b/configs/r8a77995_draak_defconfig @@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="r8a77995-draak-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_DRAAK=y +CONFIG_SPL_STACK=0xe6304000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_LTO=y CONFIG_REMAKE_ELF=y @@ -24,12 +25,10 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77995-draak.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77995-draak.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_UPDATE_TFTP=y CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0xe631f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig index 28fef6f16a..083055a1df 100644 --- a/configs/r8a779a0_falcon_defconfig +++ b/configs/r8a779a0_falcon_defconfig @@ -12,6 +12,7 @@ CONFIG_DEFAULT_DEVICE_TREE="r8a779a0-falcon-u-boot" CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_FALCON=y +CONFIG_SPL_STACK=0xe6304000 CONFIG_SYS_CLK_FREQ=16666666 # CONFIG_PSCI_RESET is not set CONFIG_ARMV8_PSCI=y @@ -31,7 +32,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0xe631f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/radxa-zero_defconfig b/configs/radxa-zero_defconfig index 0c6d3751c5..c9ff1a59cc 100644 --- a/configs/radxa-zero_defconfig +++ b/configs/radxa-zero_defconfig @@ -2,17 +2,18 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-radxa-zero" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" radxa-zero" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -40,7 +41,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/rastaban_defconfig b/configs/rastaban_defconfig index fe09c34d5b..7e4580f2cc 100644 --- a/configs/rastaban_defconfig +++ b/configs/rastaban_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" @@ -24,8 +26,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" diff --git a/configs/rcar3_salvator-x_defconfig b/configs/rcar3_salvator-x_defconfig index cba0ce5dea..32b213f7e5 100644 --- a/configs/rcar3_salvator-x_defconfig +++ b/configs/rcar3_salvator-x_defconfig @@ -10,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="r8a77950-salvator-x-u-boot" CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_SALVATOR_X=y +CONFIG_SPL_STACK=0xe6304000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_LTO=y CONFIG_REMAKE_ELF=y @@ -23,12 +24,10 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-salvator-x.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77950-salvator-x.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_UPDATE_TFTP=y CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0xe633f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/rcar3_ulcb_defconfig b/configs/rcar3_ulcb_defconfig index 31a79ee7e2..ea523e8885 100644 --- a/configs/rcar3_ulcb_defconfig +++ b/configs/rcar3_ulcb_defconfig @@ -2,7 +2,6 @@ CONFIG_ARM=y CONFIG_COUNTER_FREQUENCY=16666666 CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_RMOBILE=y -CONFIG_TEXT_BASE=0x0 CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_ENV_SIZE=0x20000 @@ -12,6 +11,7 @@ CONFIG_DEFAULT_DEVICE_TREE="r8a77950-ulcb-u-boot" CONFIG_SPL_TEXT_BASE=0xe6338000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_ULCB=y +CONFIG_SPL_STACK=0xe6304000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_LTO=y CONFIG_REMAKE_ELF=y @@ -24,12 +24,10 @@ CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="tftp 0x48080000 Image; tftp 0x48000000 Image-r8a77950-ulcb.dtb; booti 0x48080000 - 0x48000000" CONFIG_DEFAULT_FDT_FILE="r8a77950-ulcb.dtb" CONFIG_SYS_MALLOC_BOOTPARAMS=y -CONFIG_UPDATE_TFTP=y CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0xe633f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 @@ -58,7 +56,6 @@ CONFIG_OF_REMOVE_PROPS="dmas dma-names interrupt-parent interrupts interrupts-ex CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_SYS_MMC_ENV_DEV=0 CONFIG_SYS_MMC_ENV_PART=2 CONFIG_VERSION_VARIABLE=y CONFIG_REGMAP=y diff --git a/configs/ringneck-px30_defconfig b/configs/ringneck-px30_defconfig index dd332ece72..34aee4e59c 100644 --- a/configs/ringneck-px30_defconfig +++ b/configs/ringneck-px30_defconfig @@ -8,21 +8,23 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 CONFIG_DEFAULT_DEVICE_TREE="px30-ringneck-haikou" CONFIG_SPL_TEXT_BASE=0x00000000 +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_PX30=y CONFIG_TARGET_RINGNECK_PX30=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 CONFIG_DEBUG_UART_BASE=0xFF030000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_TPL_MAX_SIZE=0x20000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x400000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x600 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -39,7 +41,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOOTROM_SUPPORT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x200 @@ -106,8 +107,6 @@ CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y CONFIG_ROCKCHIP_SDRAM_COMMON=y -CONFIG_RAM_PX30_DDR4=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y # CONFIG_SPECIFY_CONSOLE_INDEX is not set diff --git a/configs/roc-cc-rk3308_defconfig b/configs/roc-cc-rk3308_defconfig index 0a029c4098..8eafd52a6b 100644 --- a/configs/roc-cc-rk3308_defconfig +++ b/configs/roc-cc-rk3308_defconfig @@ -6,18 +6,20 @@ CONFIG_TEXT_BASE=0x00600000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_DEFAULT_DEVICE_TREE="rk3308-roc-cc" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3308=y CONFIG_ROCKCHIP_SPL_RESERVE_IRAM=0x0 CONFIG_SPL_DRIVERS_MISC=y CONFIG_TARGET_ROC_RK3308_CC=y CONFIG_SPL_STACK_R_ADDR=0xc00000 +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF0C0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -30,7 +32,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y # CONFIG_CMD_BDI is not set # CONFIG_CMD_CONSOLE is not set @@ -70,7 +71,6 @@ CONFIG_REGULATOR_PWM=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y -CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_SKIP_INIT=y diff --git a/configs/roc-cc-rk3328_defconfig b/configs/roc-cc-rk3328_defconfig index 8172ed0ad2..4fc6dc74d8 100644 --- a/configs/roc-cc-rk3328_defconfig +++ b/configs/roc-cc-rk3328_defconfig @@ -5,21 +5,23 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3328-roc-cc" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -35,7 +37,6 @@ CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y @@ -92,7 +93,6 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y -CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/roc-pc-mezzanine-rk3399_defconfig b/configs/roc-pc-mezzanine-rk3399_defconfig index 00239c2582..8b04125305 100644 --- a/configs/roc-pc-mezzanine-rk3399_defconfig +++ b/configs/roc-pc-mezzanine-rk3399_defconfig @@ -5,20 +5,22 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc-mezzanine" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROC_PC_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc-mezzanine.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -30,7 +32,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 CONFIG_SPL_ENV_SUPPORT=y @@ -70,7 +71,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y # CONFIG_RAM_ROCKCHIP_DEBUG is not set CONFIG_RAM_ROCKCHIP_LPDDR4=y -CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/roc-pc-rk3399_defconfig b/configs/roc-pc-rk3399_defconfig index ed70ce0cdd..effffeec9a 100644 --- a/configs/roc-pc-rk3399_defconfig +++ b/configs/roc-pc-rk3399_defconfig @@ -5,20 +5,22 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-roc-pc" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROC_PC_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-roc-pc.dtb" @@ -31,7 +33,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x20000 CONFIG_SPL_ENV_SUPPORT=y @@ -69,7 +70,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y # CONFIG_RAM_ROCKCHIP_DEBUG is not set CONFIG_RAM_ROCKCHIP_LPDDR4=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 diff --git a/configs/rock-pi-4-rk3399_defconfig b/configs/rock-pi-4-rk3399_defconfig index ac182eeef0..4ecc06d92b 100644 --- a/configs/rock-pi-4-rk3399_defconfig +++ b/configs/rock-pi-4-rk3399_defconfig @@ -4,16 +4,18 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4b" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4b.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -25,7 +27,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y @@ -65,7 +66,6 @@ CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM_ROCKCHIP_LPDDR4=y -CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/rock-pi-4c-rk3399_defconfig b/configs/rock-pi-4c-rk3399_defconfig index 292436b637..899a66679c 100644 --- a/configs/rock-pi-4c-rk3399_defconfig +++ b/configs/rock-pi-4c-rk3399_defconfig @@ -4,16 +4,18 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock-pi-4c" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock-pi-4c.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -25,7 +27,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y @@ -65,7 +66,6 @@ CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM_ROCKCHIP_LPDDR4=y -CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/rock-pi-e-rk3328_defconfig b/configs/rock-pi-e-rk3328_defconfig index 0ffb073f31..4b0f5175a3 100644 --- a/configs/rock-pi-e-rk3328_defconfig +++ b/configs/rock-pi-e-rk3328_defconfig @@ -5,22 +5,24 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock-pi-e" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x4000000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 CONFIG_SPL_SYS_MALLOC_F_LEN=0x4000 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -36,7 +38,6 @@ CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_I2C=y @@ -91,7 +92,6 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y -CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_DEBUG_UART_ANNOUNCE=y diff --git a/configs/rock-pi-n10-rk3399pro_defconfig b/configs/rock-pi-n10-rk3399pro_defconfig index 2443f29246..1a0380dc7b 100644 --- a/configs/rock-pi-n10-rk3399pro_defconfig +++ b/configs/rock-pi-n10-rk3399pro_defconfig @@ -5,16 +5,18 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399pro-rock-pi-n10" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399pro-rock-pi-n10.dtb" # CONFIG_CONSOLE_MUX is not set @@ -27,7 +29,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y @@ -60,7 +61,6 @@ CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y # CONFIG_RAM_ROCKCHIP_DEBUG is not set -CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/rock-pi-n8-rk3288_defconfig b/configs/rock-pi-n8-rk3288_defconfig index 612663845c..1e7613c17f 100644 --- a/configs/rock-pi-n8-rk3288_defconfig +++ b/configs/rock-pi-n8-rk3288_defconfig @@ -7,17 +7,19 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock-pi-n8" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_EVB_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_SPL_STACK=0xff718000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y @@ -26,7 +28,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SYS_BOOTM_LEN=0x4000000 @@ -73,7 +74,6 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y # CONFIG_RAM_ROCKCHIP_DEBUG is not set -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y diff --git a/configs/rock2_defconfig b/configs/rock2_defconfig index 54d01456b1..25a9757013 100644 --- a/configs/rock2_defconfig +++ b/configs/rock2_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-rock2-square" CONFIG_SPL_TEXT_BASE=0xff704000 @@ -11,12 +13,11 @@ CONFIG_ROCKCHIP_RK3288=y CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y CONFIG_TARGET_ROCK2=y CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_SPL_STACK=0xff718000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y @@ -27,7 +28,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SYS_BOOTM_LEN=0x4000000 diff --git a/configs/rock64-rk3328_defconfig b/configs/rock64-rk3328_defconfig index 73a4f06eb9..39b39c9c60 100644 --- a/configs/rock64-rk3328_defconfig +++ b/configs/rock64-rk3328_defconfig @@ -5,21 +5,23 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3328-rock64" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3328=y CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y CONFIG_TPL_LIBCOMMON_SUPPORT=y CONFIG_TPL_LIBGENERIC_SUPPORT=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 CONFIG_DEBUG_UART_BASE=0xFF130000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 -CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y @@ -35,7 +37,6 @@ CONFIG_SPL_BSS_START_ADDR=0x2000000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_I2C=y CONFIG_SPL_POWER=y @@ -89,7 +90,6 @@ CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y CONFIG_TPL_RAM=y -CONFIG_DM_RESET=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y diff --git a/configs/rock960-rk3399_defconfig b/configs/rock960-rk3399_defconfig index f2c914f41f..6fefa15eb5 100644 --- a/configs/rock960-rk3399_defconfig +++ b/configs/rock960-rk3399_defconfig @@ -3,17 +3,19 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-rock960" CONFIG_SYS_PROMPT="rock960 => " +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROCK960_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-rock960.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y @@ -25,7 +27,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_TPL=y @@ -60,7 +61,6 @@ CONFIG_PMIC_RK8XX=y CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y CONFIG_BAUDRATE=1500000 diff --git a/configs/rock_defconfig b/configs/rock_defconfig index 26638405bf..b1f09df320 100644 --- a/configs/rock_defconfig +++ b/configs/rock_defconfig @@ -7,6 +7,8 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x60000000 CONFIG_SYS_MALLOC_F_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3188-radxarock" CONFIG_SPL_TEXT_BASE=0x10080800 @@ -14,12 +16,11 @@ CONFIG_ROCKCHIP_RK3188=y # CONFIG_ROCKCHIP_STIMER is not set CONFIG_TARGET_ROCK=y CONFIG_SPL_STACK_R_ADDR=0x60080000 +CONFIG_SPL_STACK=0x10087fff CONFIG_DEBUG_UART_BASE=0x20064000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x60800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60100000 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3188-radxarock.dtb" # CONFIG_DISPLAY_CPUINFO is not set @@ -28,7 +29,6 @@ CONFIG_SPL_MAX_SIZE=0x7800 CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x10087fff CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_RANDOM_UUID=y diff --git a/configs/rockpro64-rk3399_defconfig b/configs/rockpro64-rk3399_defconfig index 3b4820ce55..dd67f9dff6 100644 --- a/configs/rockpro64-rk3399_defconfig +++ b/configs/rockpro64-rk3399_defconfig @@ -4,11 +4,15 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_SIZE=0x8000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-rockpro64" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_ROCKPRO64_RK3399=y +CONFIG_SPL_STACK=0x400000 CONFIG_BOOTSTAGE_STASH_ADDR=0xff8e0000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -16,8 +20,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_BOOTSTAGE=y CONFIG_SPL_BOOTSTAGE=y CONFIG_TPL_BOOTSTAGE=y @@ -35,7 +37,6 @@ CONFIG_SPL_BSS_START_ADDR=0x400000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x400000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_SPI_LOAD=y @@ -80,7 +81,6 @@ CONFIG_REGULATOR_PWM=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM_ROCKCHIP_LPDDR4=y -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_ROCKCHIP=y CONFIG_SCSI=y diff --git a/configs/rpi_0_w_defconfig b/configs/rpi_0_w_defconfig index baa8c37810..5249b29d76 100644 --- a/configs/rpi_0_w_defconfig +++ b/configs/rpi_0_w_defconfig @@ -5,13 +5,13 @@ CONFIG_TEXT_BASE=0x00008000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TARGET_RPI_0_W=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-zero-w" CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rpi_2_defconfig b/configs/rpi_2_defconfig index baae6d4871..154284765f 100644 --- a/configs/rpi_2_defconfig +++ b/configs/rpi_2_defconfig @@ -6,13 +6,13 @@ CONFIG_TEXT_BASE=0x00008000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TARGET_RPI_2=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2836-rpi-2-b" CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rpi_3_32b_defconfig b/configs/rpi_3_32b_defconfig index f51f3de596..ef1f25d2ad 100644 --- a/configs/rpi_3_32b_defconfig +++ b/configs/rpi_3_32b_defconfig @@ -5,13 +5,13 @@ CONFIG_ARCH_BCM283X=y CONFIG_TEXT_BASE=0x00008000 CONFIG_TARGET_RPI_3_32B=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rpi_3_b_plus_defconfig b/configs/rpi_3_b_plus_defconfig index 8fd74fc1f6..154615d78a 100644 --- a/configs/rpi_3_b_plus_defconfig +++ b/configs/rpi_3_b_plus_defconfig @@ -4,13 +4,13 @@ CONFIG_ARCH_BCM283X=y CONFIG_TEXT_BASE=0x00080000 CONFIG_TARGET_RPI_3=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe40 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b-plus" CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe40 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rpi_3_defconfig b/configs/rpi_3_defconfig index bc1a318db4..f0cf7f8e23 100644 --- a/configs/rpi_3_defconfig +++ b/configs/rpi_3_defconfig @@ -4,13 +4,13 @@ CONFIG_ARCH_BCM283X=y CONFIG_TEXT_BASE=0x00080000 CONFIG_TARGET_RPI_3=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe40 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2837-rpi-3-b" CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe40 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rpi_4_32b_defconfig b/configs/rpi_4_32b_defconfig index 5207e561ee..713b2ee231 100644 --- a/configs/rpi_4_32b_defconfig +++ b/configs/rpi_4_32b_defconfig @@ -2,13 +2,14 @@ CONFIG_ARM=y CONFIG_ARCH_BCM283X=y CONFIG_TEXT_BASE=0x00008000 CONFIG_TARGET_RPI_4_32B=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffee0 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b" CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffee0 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="pci enum; usb start;" @@ -40,7 +41,6 @@ CONFIG_PCI=y CONFIG_PCI_BRCMSTB=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_IPROC200=y # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/rpi_4_defconfig b/configs/rpi_4_defconfig index a6fe2feab2..24f70b14fe 100644 --- a/configs/rpi_4_defconfig +++ b/configs/rpi_4_defconfig @@ -2,13 +2,14 @@ CONFIG_ARM=y CONFIG_ARCH_BCM283X=y CONFIG_TEXT_BASE=0x00080000 CONFIG_TARGET_RPI_4=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe30 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b" CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe30 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="pci enum; usb start;" @@ -40,7 +41,6 @@ CONFIG_PCI=y CONFIG_PCI_BRCMSTB=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_IPROC200=y # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/rpi_arm64_defconfig b/configs/rpi_arm64_defconfig index 031ed69ff0..1d1ff12a58 100644 --- a/configs/rpi_arm64_defconfig +++ b/configs/rpi_arm64_defconfig @@ -2,13 +2,14 @@ CONFIG_ARM=y CONFIG_ARCH_BCM283X=y CONFIG_TEXT_BASE=0x00080000 CONFIG_TARGET_RPI_ARM64=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe30 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2711-rpi-4-b" CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7fffe30 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y CONFIG_PREBOOT="pci enum; usb start;" @@ -35,7 +36,6 @@ CONFIG_PCI=y CONFIG_PCI_BRCMSTB=y CONFIG_PINCTRL=y # CONFIG_PINCTRL_GENERIC is not set -CONFIG_DM_RESET=y CONFIG_DM_RNG=y CONFIG_RNG_IPROC200=y # CONFIG_REQUIRE_SERIAL_CONSOLE is not set diff --git a/configs/rpi_defconfig b/configs/rpi_defconfig index 1d356b4b2e..28b92b1445 100644 --- a/configs/rpi_defconfig +++ b/configs/rpi_defconfig @@ -5,13 +5,13 @@ CONFIG_TEXT_BASE=0x00008000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TARGET_RPI=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="bcm2835-rpi-b" CONFIG_SYS_PROMPT="U-Boot> " CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7ffff00 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/rut_defconfig b/configs/rut_defconfig index 6c3ba4cc72..ba89b4d24c 100644 --- a/configs/rut_defconfig +++ b/configs/rut_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am335x-rut" @@ -23,8 +25,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" diff --git a/configs/s400_defconfig b/configs/s400_defconfig index 91930d7f48..c3c7dda6d6 100644 --- a/configs/s400_defconfig +++ b/configs/s400_defconfig @@ -2,17 +2,18 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-axg-s400" +CONFIG_DM_RESET=y CONFIG_MESON_AXG=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" s400" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -37,7 +38,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_AXG=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/s5p4418_nanopi2_defconfig b/configs/s5p4418_nanopi2_defconfig index 0645b09f78..12688e1667 100644 --- a/configs/s5p4418_nanopi2_defconfig +++ b/configs/s5p4418_nanopi2_defconfig @@ -6,6 +6,8 @@ CONFIG_TEXT_BASE=0x74C00000 CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x74c00000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x2E0200 CONFIG_DM_GPIO=y @@ -22,8 +24,6 @@ CONFIG_SYS_LOAD_ADDR=0x71080000 CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x71000000 CONFIG_SYS_MEMTEST_END=0xb0000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x74c00000 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SUPPORT_RAW_INITRD=y diff --git a/configs/s5p_goni_defconfig b/configs/s5p_goni_defconfig index f2cfed5630..24c996b34f 100644 --- a/configs/s5p_goni_defconfig +++ b/configs/s5p_goni_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x34800000 CONFIG_SYS_MALLOC_LEN=0x5001000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x33000000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-goni" @@ -12,8 +14,6 @@ CONFIG_SYS_PROMPT="Goni # " CONFIG_TARGET_S5P_GONI=y CONFIG_SYS_LOAD_ADDR=0x34000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x33000000 CONFIG_SYS_MONITOR_LEN=262144 # CONFIG_AUTOBOOT is not set CONFIG_USE_BOOTARGS=y diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig index 160e33881c..b84e482356 100644 --- a/configs/s5pc210_universal_defconfig +++ b/configs/s5pc210_universal_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_S5PC210_UNIVERSAL=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x447fff10 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210" @@ -16,8 +18,6 @@ CONFIG_SYS_PROMPT="Universal # " CONFIG_SYS_MEM_TOP_HIDE=0x100000 CONFIG_SYS_LOAD_ADDR=0x44800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x447fff10 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="Please use defined boot" diff --git a/configs/sagem_f@st1704_ram_defconfig b/configs/sagem_f@st1704_ram_defconfig index ac3719ca43..f8712dd847 100644 --- a/configs/sagem_f@st1704_ram_defconfig +++ b/configs/sagem_f@st1704_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sagem,f@st1704" CONFIG_SYS_PROMPT="F@ST1704 # " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6338=y @@ -56,7 +57,6 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_FIXED=y CONFIG_PHY_RESET_DELAY=20 CONFIG_BCM6348_ETH=y -CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y CONFIG_BCM6345_SERIAL=y diff --git a/configs/sam9x60_curiosity_mmc1_defconfig b/configs/sam9x60_curiosity_mmc1_defconfig index 42aba3d630..d076ea8b19 100644 --- a/configs/sam9x60_curiosity_mmc1_defconfig +++ b/configs/sam9x60_curiosity_mmc1_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_TARGET_SAM9X60_CURIOSITY=y CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=8 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity" @@ -16,8 +18,6 @@ CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 @@ -51,7 +51,6 @@ CONFIG_OF_CONTROL=y CONFIG_ENV_IS_IN_FAT=y CONFIG_ENV_FAT_DEVICE_AND_PART="1:1" CONFIG_SYS_RELOC_GD_ENV_ADDR=y -CONFIG_DM=y CONFIG_REGMAP=y CONFIG_SYSCON=y CONFIG_CLK=y diff --git a/configs/sam9x60_curiosity_mmc_defconfig b/configs/sam9x60_curiosity_mmc_defconfig index 732b5adf26..6e550dc34d 100644 --- a/configs/sam9x60_curiosity_mmc_defconfig +++ b/configs/sam9x60_curiosity_mmc_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_TARGET_SAM9X60_CURIOSITY=y CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=8 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sam9x60_curiosity" @@ -16,8 +18,6 @@ CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sam9x60ek_mmc_defconfig b/configs/sam9x60ek_mmc_defconfig index 268a485456..2caeacc230 100644 --- a/configs/sam9x60ek_mmc_defconfig +++ b/configs/sam9x60ek_mmc_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_TARGET_SAM9X60EK=y CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=8 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" @@ -16,8 +18,6 @@ CONFIG_DEBUG_UART_CLOCK=200000000 CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sam9x60ek_nandflash_defconfig b/configs/sam9x60ek_nandflash_defconfig index a9cbb6e953..d1fd5e8723 100644 --- a/configs/sam9x60ek_nandflash_defconfig +++ b/configs/sam9x60ek_nandflash_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_TARGET_SAM9X60EK=y CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=8 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" CONFIG_SYS_PROMPT="U-Boot> " @@ -16,8 +18,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sam9x60ek_qspiflash_defconfig b/configs/sam9x60ek_qspiflash_defconfig index 72f08f1375..9d2f97551a 100644 --- a/configs/sam9x60ek_qspiflash_defconfig +++ b/configs/sam9x60ek_qspiflash_defconfig @@ -7,6 +7,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_TARGET_SAM9X60EK=y CONFIG_ATMEL_LEGACY=y CONFIG_NR_DRAM_BANKS=8 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sam9x60ek" @@ -17,8 +19,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2000bf00 CONFIG_FIT=y CONFIG_QSPI_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d27_giantboard_defconfig b/configs/sama5d27_giantboard_defconfig index d08a42d911..39d1dcdbb7 100644 --- a/configs/sama5d27_giantboard_defconfig +++ b/configs/sama5d27_giantboard_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ef0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_giantboard" @@ -15,6 +17,7 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 @@ -24,8 +27,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ef0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SD_BOOT=y @@ -44,7 +45,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d27_som1_ek_mmc1_defconfig b/configs/sama5d27_som1_ek_mmc1_defconfig index 93ae714b62..cdb000fe1e 100644 --- a/configs/sama5d27_som1_ek_mmc1_defconfig +++ b/configs/sama5d27_som1_ek_mmc1_defconfig @@ -7,6 +7,8 @@ CONFIG_TARGET_SAMA5D27_SOM1_EK=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" @@ -14,6 +16,7 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 @@ -23,8 +26,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SD_BOOT=y @@ -40,7 +41,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d27_som1_ek_mmc_defconfig b/configs/sama5d27_som1_ek_mmc_defconfig index 5096366de7..1471cebaf4 100644 --- a/configs/sama5d27_som1_ek_mmc_defconfig +++ b/configs/sama5d27_som1_ek_mmc_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" @@ -15,6 +17,7 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 @@ -24,8 +27,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SD_BOOT=y @@ -41,7 +42,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d27_som1_ek_qspiflash_defconfig b/configs/sama5d27_som1_ek_qspiflash_defconfig index d7c7f42c93..1c8adfbb7a 100644 --- a/configs/sama5d27_som1_ek_qspiflash_defconfig +++ b/configs/sama5d27_som1_ek_qspiflash_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_som1_ek" @@ -15,6 +17,7 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=82000000 @@ -24,8 +27,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_QSPI_BOOT=y @@ -39,7 +40,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d27_wlsom1_ek_mmc_defconfig b/configs/sama5d27_wlsom1_ek_mmc_defconfig index 7634a6c68f..eeb8d209f2 100644 --- a/configs/sama5d27_wlsom1_ek_mmc_defconfig +++ b/configs/sama5d27_wlsom1_ek_mmc_defconfig @@ -6,6 +6,8 @@ CONFIG_TARGET_SAMA5D27_WLSOM1_EK=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" @@ -13,6 +15,7 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 @@ -22,8 +25,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SD_BOOT=y @@ -40,7 +41,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DISPLAY_PRINT=y diff --git a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig index bb018d4c69..e7445fef0a 100644 --- a/configs/sama5d27_wlsom1_ek_qspiflash_defconfig +++ b/configs/sama5d27_wlsom1_ek_qspiflash_defconfig @@ -6,6 +6,8 @@ CONFIG_TARGET_SAMA5D27_WLSOM1_EK=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_SPL_DM_SPI=y @@ -13,6 +15,7 @@ CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d27_wlsom1_ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=82000000 @@ -22,8 +25,6 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_QSPI_BOOT=y @@ -40,7 +41,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DISPLAY_PRINT=y diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig index 51f7104b35..e1b602d8e5 100644 --- a/configs/sama5d2_icp_mmc_defconfig +++ b/configs/sama5d2_icp_mmc_defconfig @@ -7,12 +7,15 @@ CONFIG_TARGET_SAMA5D2_ICP=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp" CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf801c000 CONFIG_DEBUG_UART_CLOCK=83000000 @@ -22,8 +25,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SD_BOOT=y @@ -39,7 +40,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DISPLAY_PRINT=y diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig index ab7308848f..1fe72e8e50 100644 --- a/configs/sama5d2_icp_qspiflash_defconfig +++ b/configs/sama5d2_icp_qspiflash_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_AT91=y CONFIG_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D2_ICP=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_icp" @@ -16,8 +18,6 @@ CONFIG_SYS_MEMTEST_END=0x40000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y CONFIG_SYS_BOOT_GET_CMDLINE=y CONFIG_SYS_BOOT_GET_KBD=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_QSPI_BOOT=y diff --git a/configs/sama5d2_ptc_ek_mmc_defconfig b/configs/sama5d2_ptc_ek_mmc_defconfig index 8ae20d5a76..3e724442ca 100644 --- a/configs/sama5d2_ptc_ek_mmc_defconfig +++ b/configs/sama5d2_ptc_ek_mmc_defconfig @@ -5,6 +5,8 @@ CONFIG_ARCH_AT91=y CONFIG_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D2_PTC_EK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" @@ -14,8 +16,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d2_ptc_ek_nandflash_defconfig b/configs/sama5d2_ptc_ek_nandflash_defconfig index f987278101..5bfe90b5e6 100644 --- a/configs/sama5d2_ptc_ek_nandflash_defconfig +++ b/configs/sama5d2_ptc_ek_nandflash_defconfig @@ -5,6 +5,8 @@ CONFIG_ARCH_AT91=y CONFIG_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D2_PTC_EK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_ptc_ek" CONFIG_DEBUG_UART_BASE=0xf801c000 @@ -14,8 +16,6 @@ CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_FIT=y CONFIG_NAND_BOOT=y CONFIG_BOOTDELAY=3 diff --git a/configs/sama5d2_xplained_emmc_defconfig b/configs/sama5d2_xplained_emmc_defconfig index 9509091c4e..33f1b691c7 100644 --- a/configs/sama5d2_xplained_emmc_defconfig +++ b/configs/sama5d2_xplained_emmc_defconfig @@ -7,6 +7,8 @@ CONFIG_TARGET_SAMA5D2_XPLAINED=y CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" @@ -14,6 +16,7 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 @@ -23,8 +26,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SD_BOOT=y @@ -39,7 +40,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d2_xplained_mmc_defconfig b/configs/sama5d2_xplained_mmc_defconfig index fe267f33e2..7b6a3d2075 100644 --- a/configs/sama5d2_xplained_mmc_defconfig +++ b/configs/sama5d2_xplained_mmc_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" @@ -15,6 +17,7 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 @@ -24,8 +27,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SD_BOOT=y @@ -41,7 +42,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d2_xplained_qspiflash_defconfig b/configs/sama5d2_xplained_qspiflash_defconfig index 7fc5dad631..b1892239f8 100644 --- a/configs/sama5d2_xplained_qspiflash_defconfig +++ b/configs/sama5d2_xplained_qspiflash_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" @@ -15,6 +17,7 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 @@ -24,8 +27,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_QSPI_BOOT=y @@ -42,7 +43,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d2_xplained_spiflash_defconfig b/configs/sama5d2_xplained_spiflash_defconfig index 95e2b449f9..afa24d9f8e 100644 --- a/configs/sama5d2_xplained_spiflash_defconfig +++ b/configs/sama5d2_xplained_spiflash_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -17,6 +19,7 @@ CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d2_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf8020000 CONFIG_DEBUG_UART_CLOCK=83000000 @@ -26,8 +29,6 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x22003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SPI_BOOT=y @@ -43,7 +44,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/sama5d36ek_cmp_mmc_defconfig b/configs/sama5d36ek_cmp_mmc_defconfig index 22748d28c3..4af21d0c41 100644 --- a/configs/sama5d36ek_cmp_mmc_defconfig +++ b/configs/sama5d36ek_cmp_mmc_defconfig @@ -5,6 +5,8 @@ CONFIG_ARCH_AT91=y CONFIG_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" @@ -14,8 +16,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SD_BOOT=y diff --git a/configs/sama5d36ek_cmp_nandflash_defconfig b/configs/sama5d36ek_cmp_nandflash_defconfig index e6ca89ae40..db2915b4ab 100644 --- a/configs/sama5d36ek_cmp_nandflash_defconfig +++ b/configs/sama5d36ek_cmp_nandflash_defconfig @@ -5,6 +5,8 @@ CONFIG_ARCH_AT91=y CONFIG_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek_cmp" CONFIG_DEBUG_UART_BASE=0xffffee00 @@ -14,8 +16,6 @@ CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_NAND_BOOT=y diff --git a/configs/sama5d36ek_cmp_spiflash_defconfig b/configs/sama5d36ek_cmp_spiflash_defconfig index f1cd95c859..31368136ea 100644 --- a/configs/sama5d36ek_cmp_spiflash_defconfig +++ b/configs/sama5d36ek_cmp_spiflash_defconfig @@ -5,6 +5,8 @@ CONFIG_ARCH_AT91=y CONFIG_TEXT_BASE=0x26f00000 CONFIG_TARGET_SAMA5D3XEK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -16,8 +18,6 @@ CONFIG_DEBUG_UART_BOARD_INIT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SPI_BOOT=y diff --git a/configs/sama5d3_xplained_mmc_defconfig b/configs/sama5d3_xplained_mmc_defconfig index f82103efbc..8bc2b84758 100644 --- a/configs/sama5d3_xplained_mmc_defconfig +++ b/configs/sama5d3_xplained_mmc_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" @@ -15,6 +17,7 @@ CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x318000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 @@ -24,8 +27,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_FIT=y CONFIG_SD_BOOT=y @@ -40,7 +41,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x318000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d3_xplained_nandflash_defconfig b/configs/sama5d3_xplained_nandflash_defconfig index a3bc040495..32c5b3eea4 100644 --- a/configs/sama5d3_xplained_nandflash_defconfig +++ b/configs/sama5d3_xplained_nandflash_defconfig @@ -8,11 +8,14 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d3_xplained" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x318000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 @@ -21,8 +24,6 @@ CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ef0 CONFIG_SYS_MONITOR_LEN=1048576 CONFIG_FIT=y CONFIG_NAND_BOOT=y @@ -37,7 +38,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x318000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/sama5d3xek_mmc_defconfig b/configs/sama5d3xek_mmc_defconfig index ba2e7dd76d..8c501b2380 100644 --- a/configs/sama5d3xek_mmc_defconfig +++ b/configs/sama5d3xek_mmc_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" @@ -15,6 +17,7 @@ CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x318000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 @@ -24,8 +27,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SD_BOOT=y @@ -42,7 +43,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x318000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d3xek_nandflash_defconfig b/configs/sama5d3xek_nandflash_defconfig index 3afb2aaffb..1958f5876e 100644 --- a/configs/sama5d3xek_nandflash_defconfig +++ b/configs/sama5d3xek_nandflash_defconfig @@ -8,11 +8,14 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x318000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 @@ -21,8 +24,6 @@ CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_NAND_BOOT=y @@ -39,7 +40,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x318000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/sama5d3xek_spiflash_defconfig b/configs/sama5d3xek_spiflash_defconfig index 8d71ba7d4f..f56442f9fe 100644 --- a/configs/sama5d3xek_spiflash_defconfig +++ b/configs/sama5d3xek_spiflash_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -17,6 +19,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sama5d36ek" CONFIG_SPL_TEXT_BASE=0x300000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x318000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xffffee00 CONFIG_DEBUG_UART_CLOCK=132000000 @@ -26,8 +29,6 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SPI_BOOT=y @@ -42,7 +43,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x318000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/sama5d4_xplained_mmc_defconfig b/configs/sama5d4_xplained_mmc_defconfig index 061cec94dc..60d8ea2d83 100644 --- a/configs/sama5d4_xplained_mmc_defconfig +++ b/configs/sama5d4_xplained_mmc_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" @@ -15,6 +17,7 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 @@ -24,8 +27,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SD_BOOT=y @@ -41,7 +42,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d4_xplained_nandflash_defconfig b/configs/sama5d4_xplained_nandflash_defconfig index d11d882a31..25bbe287e4 100644 --- a/configs/sama5d4_xplained_nandflash_defconfig +++ b/configs/sama5d4_xplained_nandflash_defconfig @@ -8,11 +8,14 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 @@ -21,8 +24,6 @@ CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_NAND_BOOT=y @@ -38,7 +39,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/sama5d4_xplained_spiflash_defconfig b/configs/sama5d4_xplained_spiflash_defconfig index 5822825999..0485c69852 100644 --- a/configs/sama5d4_xplained_spiflash_defconfig +++ b/configs/sama5d4_xplained_spiflash_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -17,6 +19,7 @@ CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4_xplained" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=100000000 @@ -26,8 +29,6 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SPI_BOOT=y @@ -43,7 +44,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/sama5d4ek_mmc_defconfig b/configs/sama5d4ek_mmc_defconfig index 69a9f6c673..a1b53a4d64 100644 --- a/configs/sama5d4ek_mmc_defconfig +++ b/configs/sama5d4ek_mmc_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" @@ -15,6 +17,7 @@ CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 @@ -24,8 +27,6 @@ CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SD_BOOT=y @@ -42,7 +43,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_HUSH_PARSER=y diff --git a/configs/sama5d4ek_nandflash_defconfig b/configs/sama5d4ek_nandflash_defconfig index 6d8b796c87..e76b18c6e2 100644 --- a/configs/sama5d4ek_nandflash_defconfig +++ b/configs/sama5d4ek_nandflash_defconfig @@ -8,11 +8,14 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 @@ -21,8 +24,6 @@ CONFIG_ENV_OFFSET_REDUND=0x100000 CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_NAND_BOOT=y @@ -39,7 +40,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/sama5d4ek_spiflash_defconfig b/configs/sama5d4ek_spiflash_defconfig index 79b9a7ddfb..022ac915cf 100644 --- a/configs/sama5d4ek_spiflash_defconfig +++ b/configs/sama5d4ek_spiflash_defconfig @@ -8,6 +8,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x6000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -17,6 +19,7 @@ CONFIG_DEFAULT_DEVICE_TREE="at91-sama5d4ek" CONFIG_SPL_TEXT_BASE=0x200000 CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x218000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfc00c000 CONFIG_DEBUG_UART_CLOCK=88000000 @@ -26,8 +29,6 @@ CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_DEBUG_UART=y CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20003ee0 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_FIT=y CONFIG_SPI_BOOT=y @@ -42,7 +43,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x218000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x80000 CONFIG_SPL_DM_SPI_FLASH=y diff --git a/configs/sama7g5ek_mmc1_defconfig b/configs/sama7g5ek_mmc1_defconfig index ecb4dfc785..44b9d15d8f 100644 --- a/configs/sama7g5ek_mmc1_defconfig +++ b/configs/sama7g5ek_mmc1_defconfig @@ -4,6 +4,8 @@ CONFIG_TEXT_BASE=0x66f00000 CONFIG_SYS_MALLOC_F_LEN=0x11000 CONFIG_TARGET_SAMA7G5EK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60014ef0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama7g5ek" @@ -15,8 +17,6 @@ CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x60000000 CONFIG_SYS_MEMTEST_END=0x70000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60014ef0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_USE_BOOTARGS=y diff --git a/configs/sama7g5ek_mmc_defconfig b/configs/sama7g5ek_mmc_defconfig index 1d5bccd15b..bac919dc4f 100644 --- a/configs/sama7g5ek_mmc_defconfig +++ b/configs/sama7g5ek_mmc_defconfig @@ -4,6 +4,8 @@ CONFIG_TEXT_BASE=0x66f00000 CONFIG_SYS_MALLOC_F_LEN=0x11000 CONFIG_TARGET_SAMA7G5EK=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60014ef0 CONFIG_ENV_SIZE=0x4000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="at91-sama7g5ek" @@ -15,8 +17,6 @@ CONFIG_DEBUG_UART=y CONFIG_SYS_MEMTEST_START=0x60000000 CONFIG_SYS_MEMTEST_END=0x70000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60014ef0 CONFIG_FIT=y CONFIG_SD_BOOT=y CONFIG_USE_BOOTARGS=y diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig index ba45ac0b71..ccbc18aad0 100644 --- a/configs/sandbox64_defconfig +++ b/configs/sandbox64_defconfig @@ -2,6 +2,7 @@ CONFIG_TEXT_BASE=0 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox64" +CONFIG_DM_RESET=y CONFIG_PRE_CON_BUF_ADDR=0x100000 CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_SYS_LOAD_ADDR=0x0 @@ -205,7 +206,6 @@ CONFIG_PWM_CROS_EC=y CONFIG_PWM_SANDBOX=y CONFIG_RAM=y CONFIG_REMOTEPROC_SANDBOX=y -CONFIG_DM_RESET=y CONFIG_SANDBOX_RESET=y CONFIG_DM_RTC=y CONFIG_RTC_RV8803=y diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig index 34c342b6f5..77ade1f1d8 100644 --- a/configs/sandbox_defconfig +++ b/configs/sandbox_defconfig @@ -2,6 +2,7 @@ CONFIG_TEXT_BASE=0 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" +CONFIG_DM_RESET=y CONFIG_PRE_CON_BUF_ADDR=0xf0000 CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_SYS_LOAD_ADDR=0x0 @@ -100,7 +101,6 @@ CONFIG_CMD_ETHSW=y CONFIG_CMD_BMP=y CONFIG_CMD_BOOTCOUNT=y CONFIG_CMD_EFIDEBUG=y -CONFIG_CMD_EFICONFIG=y CONFIG_CMD_RTC=y CONFIG_CMD_TIME=y CONFIG_CMD_PAUSE=y @@ -263,7 +263,6 @@ CONFIG_DM_REBOOT_MODE=y CONFIG_DM_REBOOT_MODE_GPIO=y CONFIG_DM_REBOOT_MODE_RTC=y CONFIG_REMOTEPROC_SANDBOX=y -CONFIG_DM_RESET=y CONFIG_SANDBOX_RESET=y CONFIG_RESET_SYSCON=y CONFIG_RESET_SCMI=y @@ -302,7 +301,6 @@ CONFIG_VIDEO=y CONFIG_VIDEO_COPY=y CONFIG_CONSOLE_ROTATION=y CONFIG_CONSOLE_TRUETYPE=y -CONFIG_CONSOLE_TRUETYPE_MAX_METRICS=10 CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y CONFIG_I2C_EDID=y CONFIG_VIDEO_SANDBOX_SDL=y diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig index 477763dc9f..5366b1ff1d 100644 --- a/configs/sandbox_flattree_defconfig +++ b/configs/sandbox_flattree_defconfig @@ -2,6 +2,7 @@ CONFIG_TEXT_BASE=0 CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" +CONFIG_DM_RESET=y CONFIG_BOOTSTAGE_STASH_ADDR=0x0 CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_DEBUG_UART=y @@ -182,7 +183,6 @@ CONFIG_PWM_CROS_EC=y CONFIG_PWM_SANDBOX=y CONFIG_RAM=y CONFIG_REMOTEPROC_SANDBOX=y -CONFIG_DM_RESET=y CONFIG_SANDBOX_RESET=y CONFIG_DM_RTC=y CONFIG_SCSI=y diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig index 59e9a8d24f..0d174db1ea 100644 --- a/configs/sandbox_noinst_defconfig +++ b/configs/sandbox_noinst_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" +CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000 @@ -20,7 +21,6 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_BOOTSTAGE_FDT=y @@ -196,7 +196,6 @@ CONFIG_PWM_CROS_EC=y CONFIG_PWM_SANDBOX=y CONFIG_RAM=y CONFIG_REMOTEPROC_SANDBOX=y -CONFIG_DM_RESET=y CONFIG_SANDBOX_RESET=y CONFIG_DM_RTC=y CONFIG_SPL_DM_RTC=y diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig index 5316e0b6bb..4e0021a76f 100644 --- a/configs/sandbox_spl_defconfig +++ b/configs/sandbox_spl_defconfig @@ -5,6 +5,7 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" +CONFIG_DM_RESET=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y CONFIG_SPL_SYS_MALLOC_F_LEN=0x8000 @@ -20,7 +21,6 @@ CONFIG_FIT=y CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_BOOTSTAGE_FDT=y @@ -199,7 +199,6 @@ CONFIG_PWM_CROS_EC=y CONFIG_PWM_SANDBOX=y CONFIG_RAM=y CONFIG_REMOTEPROC_SANDBOX=y -CONFIG_DM_RESET=y CONFIG_SANDBOX_RESET=y CONFIG_DM_RTC=y CONFIG_SPL_DM_RTC=y diff --git a/configs/sandbox_vpl_defconfig b/configs/sandbox_vpl_defconfig index 1d434ecf85..dcfea05baa 100644 --- a/configs/sandbox_vpl_defconfig +++ b/configs/sandbox_vpl_defconfig @@ -5,6 +5,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="sandbox" CONFIG_SPL_TEXT_BASE=0x100000 +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_TPL_TEXT_BASE=0x100000 @@ -27,7 +28,6 @@ CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_FIT_BEST_MATCH=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTSTAGE=y CONFIG_BOOTSTAGE_REPORT=y CONFIG_BOOTSTAGE_FDT=y @@ -211,7 +211,6 @@ CONFIG_PWM_CROS_EC=y CONFIG_PWM_SANDBOX=y CONFIG_RAM=y CONFIG_REMOTEPROC_SANDBOX=y -CONFIG_DM_RESET=y CONFIG_SANDBOX_RESET=y CONFIG_DM_RTC=y CONFIG_SPL_DM_RTC=y diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index dc9225188f..cf4df06960 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra20-seaboard" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (SeaBoard) # " +CONFIG_SPL_STACK=0xffffc CONFIG_TEGRA20=y CONFIG_TARGET_SEABOARD=y CONFIG_TEGRA_ENABLE_UARTD=y @@ -17,7 +18,6 @@ CONFIG_USE_PREBOOT=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 diff --git a/configs/sei510_defconfig b/configs/sei510_defconfig index 96e114a3be..19362c9f27 100644 --- a/configs/sei510_defconfig +++ b/configs/sei510_defconfig @@ -5,10 +5,13 @@ CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_SYS_MALLOC_LEN=0x8000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-sei510" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -16,8 +19,6 @@ CONFIG_IDENT_STRING=" sei510" # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y @@ -65,7 +66,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/sei610_defconfig b/configs/sei610_defconfig index bba46a87ac..677b618768 100644 --- a/configs/sei610_defconfig +++ b/configs/sei610_defconfig @@ -5,10 +5,13 @@ CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_SYS_MALLOC_LEN=0x8000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0xFFFF0000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-sm1-sei610" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 @@ -16,8 +19,6 @@ CONFIG_IDENT_STRING=" sei610" # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y CONFIG_USE_PREBOOT=y @@ -65,7 +66,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_EE_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/sfr_nb4-ser_ram_defconfig b/configs/sfr_nb4-ser_ram_defconfig index 6140424670..f2b708b9d6 100644 --- a/configs/sfr_nb4-ser_ram_defconfig +++ b/configs/sfr_nb4-ser_ram_defconfig @@ -6,6 +6,7 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="sfr,nb4-ser" CONFIG_SYS_PROMPT="NB4-SER # " +CONFIG_DM_RESET=y CONFIG_SYS_LOAD_ADDR=0x80100000 CONFIG_ARCH_BMIPS=y CONFIG_SOC_BMIPS_BCM6358=y @@ -64,7 +65,6 @@ CONFIG_PHY_RESET_DELAY=20 CONFIG_BCM6348_ETH=y CONFIG_PHY=y CONFIG_BCM6358_USBH_PHY=y -CONFIG_DM_RESET=y CONFIG_RESET_BCM6345=y CONFIG_DM_SERIAL=y CONFIG_BCM6345_SERIAL=y diff --git a/configs/sheep-rk3368_defconfig b/configs/sheep-rk3368_defconfig index 40cd91c045..044e1060a5 100644 --- a/configs/sheep-rk3368_defconfig +++ b/configs/sheep-rk3368_defconfig @@ -4,6 +4,8 @@ CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_DEFAULT_DEVICE_TREE="rk3368-sheep" CONFIG_ROCKCHIP_RK3368=y CONFIG_TARGET_SHEEP=y @@ -11,8 +13,6 @@ CONFIG_DEBUG_UART_BASE=0xFF1b0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3368-sheep.dtb" # CONFIG_DISPLAY_CPUINFO is not set diff --git a/configs/sheevaplug_defconfig b/configs/sheevaplug_defconfig index 40ab16dfa0..2e4901b840 100644 --- a/configs/sheevaplug_defconfig +++ b/configs/sheevaplug_defconfig @@ -67,8 +67,6 @@ CONFIG_MVGBE=y CONFIG_MII=y CONFIG_DM_RTC=y CONFIG_RTC_MV=y -CONFIG_SYS_NS16550_SERIAL=y -CONFIG_SYS_NS16550_REG_SIZE=-4 CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_STORAGE=y diff --git a/configs/sifive_unleashed_defconfig b/configs/sifive_unleashed_defconfig index 6c85962cbb..26a3c4bab9 100644 --- a/configs/sifive_unleashed_defconfig +++ b/configs/sifive_unleashed_defconfig @@ -3,9 +3,13 @@ CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y +CONFIG_SPL_STACK=0x81cfe70 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -14,8 +18,6 @@ CONFIG_TARGET_SIFIVE_UNLEASHED=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000 @@ -28,7 +30,6 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x85000000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x81cfe70 CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y @@ -40,4 +41,3 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_CLK=y CONFIG_DM_MTD=y -CONFIG_DM_RESET=y diff --git a/configs/sifive_unmatched_defconfig b/configs/sifive_unmatched_defconfig index 3d96aa5411..d5ba2b767c 100644 --- a/configs/sifive_unmatched_defconfig +++ b/configs/sifive_unmatched_defconfig @@ -4,9 +4,13 @@ CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_SYS_MALLOC_F_LEN=0x3000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="hifive-unmatched-a00" +CONFIG_DM_RESET=y CONFIG_SPL_MMC=y +CONFIG_SPL_STACK=0x81cfe60 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y @@ -17,8 +21,6 @@ CONFIG_TARGET_SIFIVE_UNMATCHED=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80200000 CONFIG_STANDALONE_LOAD_ADDR=0x80200000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x84000000 @@ -32,7 +34,6 @@ CONFIG_ID_EEPROM=y CONFIG_SPL_MAX_SIZE=0x100000 CONFIG_SPL_BSS_START_ADDR=0x85000000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x81cfe60 CONFIG_SYS_SPL_MALLOC=y CONFIG_SPL_DM_SPI_FLASH=y CONFIG_SPL_DM_RESET=y @@ -57,7 +58,6 @@ CONFIG_E1000=y CONFIG_NVME_PCI=y CONFIG_PCI=y CONFIG_PCIE_DW_SIFIVE=y -CONFIG_DM_RESET=y CONFIG_SCSI=y CONFIG_DM_SCSI=y CONFIG_USB=y diff --git a/configs/silinux_ek874_defconfig b/configs/silinux_ek874_defconfig index 378e175415..65dead7195 100644 --- a/configs/silinux_ek874_defconfig +++ b/configs/silinux_ek874_defconfig @@ -13,6 +13,7 @@ CONFIG_DEFAULT_DEVICE_TREE="r8a774c0-ek874-u-boot" CONFIG_SPL_TEXT_BASE=0xe6318000 CONFIG_RCAR_GEN3=y CONFIG_TARGET_SILINUX_EK874=y +CONFIG_SPL_STACK=0xe6304000 CONFIG_SYS_LOAD_ADDR=0x58000000 CONFIG_REMAKE_ELF=y CONFIG_SYS_MONITOR_LEN=1048576 @@ -29,7 +30,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0xe631f000 CONFIG_SPL_BSS_MAX_SIZE=0x1000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6304000 CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=64 CONFIG_SYS_PBSIZE=2068 diff --git a/configs/silk_defconfig b/configs/silk_defconfig index 5005e1677f..a212098473 100644 --- a/configs/silk_defconfig +++ b/configs/silk_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -20,14 +22,13 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Silk" CONFIG_R8A7794=y CONFIG_TARGET_SILK=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_FIT=y CONFIG_BOOTDELAY=3 @@ -36,7 +37,6 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/sipeed_maix_bitm_defconfig b/configs/sipeed_maix_bitm_defconfig index f3ba042f89..289d9fd4f4 100644 --- a/configs/sipeed_maix_bitm_defconfig +++ b/configs/sipeed_maix_bitm_defconfig @@ -1,13 +1,13 @@ CONFIG_RISCV=y CONFIG_SYS_MALLOC_LEN=0x20000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x803fffff CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0xfff000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SYS_LOAD_ADDR=0x80000000 CONFIG_TARGET_SIPEED_MAIX=y CONFIG_ARCH_RV64I=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x803fffff CONFIG_STACK_SIZE=0x100000 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run k210_bootcmd" diff --git a/configs/sipeed_maix_smode_defconfig b/configs/sipeed_maix_smode_defconfig index 738df1c27f..a656f599e0 100644 --- a/configs/sipeed_maix_smode_defconfig +++ b/configs/sipeed_maix_smode_defconfig @@ -1,6 +1,8 @@ CONFIG_RISCV=y CONFIG_TEXT_BASE=0x80020000 CONFIG_SYS_MALLOC_LEN=0x20000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x803fffff CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0xfff000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -8,8 +10,6 @@ CONFIG_SYS_LOAD_ADDR=0x80000000 CONFIG_TARGET_SIPEED_MAIX=y CONFIG_ARCH_RV64I=y CONFIG_RISCV_SMODE=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x803fffff CONFIG_STACK_SIZE=0x100000 CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run k210_bootcmd" diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig index ed0ed2c7bb..4cbdab0b37 100644 --- a/configs/smartweb_defconfig +++ b/configs/smartweb_defconfig @@ -19,6 +19,7 @@ CONFIG_NR_DRAM_BANKS=1 CONFIG_ENV_OFFSET=0x100000 CONFIG_DEFAULT_DEVICE_TREE="at91sam9260-smartweb" CONFIG_SYS_PROMPT="U-Boot# " +CONFIG_SPL_STACK=0x301000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x180000 @@ -39,7 +40,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x301000 CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x460000 CONFIG_SPL_NAND_SUPPORT=y diff --git a/configs/smdk5250_defconfig b/configs/smdk5250_defconfig index 04549085ac..3fc4c1efdc 100644 --- a/configs/smdk5250_defconfig +++ b/configs/smdk5250_defconfig @@ -11,6 +11,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SMDK5250=y CONFIG_NR_DRAM_BANKS=8 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 @@ -21,8 +23,6 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDK5250" CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/smdk5420_defconfig b/configs/smdk5420_defconfig index 1b86ee60e2..e45d35ee30 100644 --- a/configs/smdk5420_defconfig +++ b/configs/smdk5420_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SMDK5420=y CONFIG_NR_DRAM_BANKS=7 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2073800 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 @@ -19,8 +21,6 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDK5420" CONFIG_SYS_LOAD_ADDR=0x23e00000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2073800 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/smdkc100_defconfig b/configs/smdkc100_defconfig index e525b80062..f261533a31 100644 --- a/configs/smdkc100_defconfig +++ b/configs/smdkc100_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x34800000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2f000000 CONFIG_ENV_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="s5pc1xx-smdkc100" CONFIG_SYS_PROMPT="SMDKC100 # " @@ -13,8 +15,6 @@ CONFIG_IDENT_STRING=" for SMDKC100" CONFIG_SYS_CLK_FREQ=12000000 CONFIG_SYS_LOAD_ADDR=0x30000000 CONFIG_ENV_ADDR=0x40000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2f000000 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/smdkv310_defconfig b/configs/smdkv310_defconfig index 714c111619..15bec55e67 100644 --- a/configs/smdkv310_defconfig +++ b/configs/smdkv310_defconfig @@ -7,6 +7,8 @@ CONFIG_TEXT_BASE=0x43E00000 CONFIG_SYS_MALLOC_LEN=0x5004000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS4=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2040000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x4200 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-smdkv310" @@ -16,8 +18,6 @@ CONFIG_SPL=y CONFIG_IDENT_STRING=" for SMDKC210/V310" CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2040000 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_BOOTCOMMAND="fatload mmc 0 40007000 uImage; bootm 40007000" # CONFIG_SPL_FRAMEWORK is not set diff --git a/configs/sniper_defconfig b/configs/sniper_defconfig index bae9b0e254..f6b59a6e9b 100644 --- a/configs/sniper_defconfig +++ b/configs/sniper_defconfig @@ -5,19 +5,19 @@ CONFIG_TEXT_BASE=0x80100000 CONFIG_SYS_MALLOC_LEN=0x120000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_SPL_TEXT_BASE=0x40200000 CONFIG_TARGET_SNIPER=y CONFIG_SYS_PROMPT="sniper # " +CONFIG_SPL_STACK=0x4020fffc CONFIG_SPL=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4020ff00 CONFIG_BOOTCOMMAND="setenv boot_mmc_part ${kernel_mmc_part}; if test reboot-${reboot-mode} = reboot-r; then echo recovery; setenv boot_mmc_part ${recovery_mmc_part}; fi; if test reboot-${reboot-mode} = reboot-b; then echo fastboot; fastboot 0; fi; part start mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_start; part size mmc ${boot_mmc_dev} ${boot_mmc_part} boot_mmc_size; mmc dev ${boot_mmc_dev}; mmc read ${kernel_addr_r} ${boot_mmc_start} ${boot_mmc_size} && bootm ${kernel_addr_r};" CONFIG_SYS_CONSOLE_IS_IN_ENV=y CONFIG_SPL_MAX_SIZE=0xec00 CONFIG_SPL_BSS_START_ADDR=0x80000000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4020fffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80208000 diff --git a/configs/snow_defconfig b/configs/snow_defconfig index faa3a944c0..5a5d97bb5f 100644 --- a/configs/snow_defconfig +++ b/configs/snow_defconfig @@ -11,6 +11,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SNOW=y CONFIG_NR_DRAM_BANKS=8 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 @@ -24,8 +26,6 @@ CONFIG_IDENT_STRING=" for snow" CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_BOOTSTD_FULL=y diff --git a/configs/socfpga_agilex_atf_defconfig b/configs/socfpga_agilex_atf_defconfig index 9269eccf17..123eb68e4c 100644 --- a/configs/socfpga_agilex_atf_defconfig +++ b/configs/socfpga_agilex_atf_defconfig @@ -5,24 +5,25 @@ CONFIG_TEXT_BASE=0x200000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0xffe3f000 CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x02000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon" @@ -33,7 +34,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffe3f000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 @@ -81,7 +81,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SYS_NS16550_MEM32=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_agilex_defconfig b/configs/socfpga_agilex_defconfig index 48fb067223..8770e64069 100644 --- a/configs/socfpga_agilex_defconfig +++ b/configs/socfpga_agilex_defconfig @@ -4,12 +4,16 @@ CONFIG_ARCH_SOCFPGA=y CONFIG_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0xffe3f000 CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y @@ -17,8 +21,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x3fe00000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000 CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y @@ -30,7 +32,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffe3f000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 @@ -74,7 +75,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SYS_NS16550_MEM32=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_agilex_vab_defconfig b/configs/socfpga_agilex_vab_defconfig index da4545efff..3117f39785 100644 --- a/configs/socfpga_agilex_vab_defconfig +++ b/configs/socfpga_agilex_vab_defconfig @@ -5,25 +5,26 @@ CONFIG_TEXT_BASE=0x200000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_agilex_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SYS_PROMPT="SOCFPGA_AGILEX # " +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0xffe3f000 CONFIG_SOCFPGA_SECURE_VAB_AUTH=y CONFIG_TARGET_SOCFPGA_AGILEX_SOCDK=y CONFIG_IDENT_STRING="socfpga_agilex" CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x02000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon" @@ -34,7 +35,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffe3f000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 @@ -82,7 +82,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SYS_NS16550_MEM32=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_arria10_defconfig b/configs/socfpga_arria10_defconfig index 4e2dc0c985..644f2e696e 100644 --- a/configs/socfpga_arria10_defconfig +++ b/configs/socfpga_arria10_defconfig @@ -2,22 +2,22 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffe2b000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_socdk_sdmmc" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0xffe2b000 CONFIG_TARGET_SOCFPGA_ARRIA10_SOCDK=y CONFIG_IDENT_STRING="socfpga_arria10" CONFIG_SPL_FS_FAT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xffe2b000 CONFIG_FIT=y CONFIG_TIMESTAMP=y CONFIG_SPL_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200" # CONFIG_USE_BOOTCOMMAND is not set @@ -30,7 +30,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x40000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffe2b000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xffe2b000 diff --git a/configs/socfpga_arria5_defconfig b/configs/socfpga_arria5_defconfig index 67c6e74eb8..00789f9567 100644 --- a/configs/socfpga_arria5_defconfig +++ b/configs/socfpga_arria5_defconfig @@ -2,15 +2,17 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_socdk" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0x0 CONFIG_TARGET_SOCFPGA_ARRIA5_SOCDK=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set @@ -24,7 +26,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 @@ -65,7 +66,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig index 00c4cf3008..4bbce3591d 100644 --- a/configs/socfpga_chameleonv3_defconfig +++ b/configs/socfpga_chameleonv3_defconfig @@ -11,7 +11,6 @@ CONFIG_SPL_FS_FAT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_MISC_INIT_R=y CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SYS_SPL_MALLOC=y diff --git a/configs/socfpga_cyclone5_defconfig b/configs/socfpga_cyclone5_defconfig index ce1a349299..7320534d3d 100644 --- a/configs/socfpga_cyclone5_defconfig +++ b/configs/socfpga_cyclone5_defconfig @@ -2,15 +2,17 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socdk" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0x0 CONFIG_TARGET_SOCFPGA_CYCLONE5_SOCDK=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set @@ -24,7 +26,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 @@ -66,7 +67,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_dbm_soc1_defconfig b/configs/socfpga_dbm_soc1_defconfig index 01c29a25e3..de087fabf6 100644 --- a/configs/socfpga_dbm_soc1_defconfig +++ b/configs/socfpga_dbm_soc1_defconfig @@ -2,14 +2,16 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_dbm_soc1" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0x0 CONFIG_TARGET_SOCFPGA_DEVBOARDS_DBM_SOC1=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y CONFIG_USE_BOOTARGS=y @@ -27,7 +29,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_HUSH_PARSER=y @@ -70,7 +71,6 @@ CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/socfpga_de0_nano_soc_defconfig b/configs/socfpga_de0_nano_soc_defconfig index 905afb7d04..749d7fd583 100644 --- a/configs/socfpga_de0_nano_soc_defconfig +++ b/configs/socfpga_de0_nano_soc_defconfig @@ -2,15 +2,17 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de0_nano_soc" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0x0 CONFIG_TARGET_SOCFPGA_TERASIC_DE0_NANO=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set @@ -25,7 +27,6 @@ CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 @@ -62,7 +63,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_de10_nano_defconfig b/configs/socfpga_de10_nano_defconfig index f2a53ba247..c9b8adc873 100644 --- a/configs/socfpga_de10_nano_defconfig +++ b/configs/socfpga_de10_nano_defconfig @@ -2,15 +2,17 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_nano" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0x0 CONFIG_TARGET_SOCFPGA_TERASIC_DE10_NANO=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set @@ -24,7 +26,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 @@ -59,7 +60,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_de10_standard_defconfig b/configs/socfpga_de10_standard_defconfig index dbf979ee47..7a5311d234 100644 --- a/configs/socfpga_de10_standard_defconfig +++ b/configs/socfpga_de10_standard_defconfig @@ -2,15 +2,17 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de10_standard" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0x0 CONFIG_TARGET_SOCFPGA_TERASIC_DE10_STANDARD=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set @@ -24,7 +26,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 @@ -59,7 +60,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_de1_soc_defconfig b/configs/socfpga_de1_soc_defconfig index 613bf44262..da1fb1f3e4 100644 --- a/configs/socfpga_de1_soc_defconfig +++ b/configs/socfpga_de1_soc_defconfig @@ -2,15 +2,17 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_de1_soc" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0x0 CONFIG_TARGET_SOCFPGA_TERASIC_DE1_SOC=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set @@ -25,7 +27,6 @@ CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x0 CONFIG_SPL_YMODEM_SUPPORT=y CONFIG_SYS_MAXARGS=32 CONFIG_CMD_ASKENV=y @@ -55,7 +56,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_USB=y CONFIG_USB_DWC2=y diff --git a/configs/socfpga_is1_defconfig b/configs/socfpga_is1_defconfig index 32d7b74520..b217c2a32b 100644 --- a/configs/socfpga_is1_defconfig +++ b/configs/socfpga_is1_defconfig @@ -2,17 +2,19 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_is1" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 +CONFIG_SPL_STACK=0xfffffff8 CONFIG_TARGET_SOCFPGA_IS1=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y CONFIG_USE_BOOTARGS=y @@ -27,7 +29,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffff8 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 @@ -65,7 +66,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y # CONFIG_SPL_WDT is not set diff --git a/configs/socfpga_mcvevk_defconfig b/configs/socfpga_mcvevk_defconfig index 4d16ec32b6..5760610754 100644 --- a/configs/socfpga_mcvevk_defconfig +++ b/configs/socfpga_mcvevk_defconfig @@ -2,15 +2,17 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_mcvevk" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0x0 CONFIG_TARGET_SOCFPGA_ARIES_MCVEVK=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y CONFIG_USE_BOOTARGS=y @@ -25,7 +27,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 @@ -60,7 +61,6 @@ CONFIG_MTD=y CONFIG_SPI_FLASH_MTD=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y -CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_n5x_atf_defconfig b/configs/socfpga_n5x_atf_defconfig index 4d856d535a..454e381dde 100644 --- a/configs/socfpga_n5x_atf_defconfig +++ b/configs/socfpga_n5x_atf_defconfig @@ -5,23 +5,24 @@ CONFIG_TEXT_BASE=0x200000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SYS_PROMPT="SOCFPGA_N5X # " +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0xffe3f000 CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" @@ -32,7 +33,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffe3f000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 @@ -80,7 +80,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SYS_NS16550_MEM32=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_n5x_defconfig b/configs/socfpga_n5x_defconfig index 1056932cd3..8d911cd440 100644 --- a/configs/socfpga_n5x_defconfig +++ b/configs/socfpga_n5x_defconfig @@ -4,18 +4,20 @@ CONFIG_ARCH_SOCFPGA=y CONFIG_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SYS_PROMPT="SOCFPGA_N5X # " +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0xffe3f000 CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y # CONFIG_PSCI_RESET is not set -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000 CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y @@ -27,7 +29,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffe3f000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 @@ -71,7 +72,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SYS_NS16550_MEM32=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_n5x_vab_defconfig b/configs/socfpga_n5x_vab_defconfig index a6714b265e..dbd8184faf 100644 --- a/configs/socfpga_n5x_vab_defconfig +++ b/configs/socfpga_n5x_vab_defconfig @@ -5,24 +5,25 @@ CONFIG_TEXT_BASE=0x200000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_n5x_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SYS_PROMPT="SOCFPGA_N5X # " +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0xffe3f000 CONFIG_SOCFPGA_SECURE_VAB_AUTH=y CONFIG_TARGET_SOCFPGA_N5X_SOCDK=y CONFIG_IDENT_STRING="socfpga_n5x" CONFIG_SPL_FS_FAT=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon panic=-1 earlyprintk=ttyS0,115200" @@ -33,7 +34,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffe3f000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 @@ -81,7 +81,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SYS_NS16550_MEM32=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig index 6e4fe588a1..27d3a47b08 100644 --- a/configs/socfpga_secu1_defconfig +++ b/configs/socfpga_secu1_defconfig @@ -3,13 +3,17 @@ CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 CONFIG_SYS_MALLOC_F_LEN=0x800 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x100000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria5_secu1" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y # CONFIG_SPL_MMC is not set CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x0 CONFIG_TARGET_SOCFPGA_ARRIA5_SECU1=y CONFIG_ENV_OFFSET_REDUND=0x120000 # CONFIG_SPL_LIBDISK_SUPPORT is not set @@ -17,8 +21,6 @@ CONFIG_ENV_OFFSET_REDUND=0x120000 CONFIG_SYS_LOAD_ADDR=0x02000000 CONFIG_BUILD_TARGET="u-boot-with-nand-spl.sfp" CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_BOOT_RETRY=y CONFIG_BOOT_RETRY_TIME=45 @@ -37,7 +39,6 @@ CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x0 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION=0x1 # CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION_TYPE is not set @@ -103,7 +104,6 @@ CONFIG_PHY_FIXED=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_DM_RTC=y CONFIG_RTC_M41T62=y CONFIG_SPI=y diff --git a/configs/socfpga_sockit_defconfig b/configs/socfpga_sockit_defconfig index b3de6701f9..290bcb7180 100644 --- a/configs/socfpga_sockit_defconfig +++ b/configs/socfpga_sockit_defconfig @@ -2,15 +2,17 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sockit" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0x0 CONFIG_TARGET_SOCFPGA_TERASIC_SOCKIT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set @@ -24,7 +26,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 @@ -66,7 +67,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socfpga_socrates_defconfig b/configs/socfpga_socrates_defconfig index 80a98712f6..df0794447f 100644 --- a/configs/socfpga_socrates_defconfig +++ b/configs/socfpga_socrates_defconfig @@ -2,15 +2,17 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_socrates" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0x0 CONFIG_TARGET_SOCFPGA_EBV_SOCRATES=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y # CONFIG_USE_BOOTCOMMAND is not set CONFIG_DEFAULT_FDT_FILE="socfpga_cyclone5_socrates.dtb" @@ -23,7 +25,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 @@ -65,7 +66,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_DM_RTC=y CONFIG_RTC_M41T62=y CONFIG_SPI=y diff --git a/configs/socfpga_sr1500_defconfig b/configs/socfpga_sr1500_defconfig index cbe37d22fe..3ee8838a8b 100644 --- a/configs/socfpga_sr1500_defconfig +++ b/configs/socfpga_sr1500_defconfig @@ -2,20 +2,22 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0xE0000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_sr1500" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y CONFIG_SYS_BOOTCOUNT_ADDR=0xfffffff8 +CONFIG_SPL_STACK=0xfffffff8 CONFIG_TARGET_SOCFPGA_SR1500=y CONFIG_ENV_OFFSET_REDUND=0xF0000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x40000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y # CONFIG_USE_BOOTCOMMAND is not set @@ -31,7 +33,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffff8 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_SYS_MAXARGS=32 @@ -72,7 +73,6 @@ CONFIG_PHY_MARVELL=y CONFIG_PHY_GIGE=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y # CONFIG_SPL_WDT is not set diff --git a/configs/socfpga_stratix10_atf_defconfig b/configs/socfpga_stratix10_atf_defconfig index e0e6b2d046..d83d7f8ba1 100644 --- a/configs/socfpga_stratix10_atf_defconfig +++ b/configs/socfpga_stratix10_atf_defconfig @@ -5,24 +5,25 @@ CONFIG_TEXT_BASE=0x200000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 CONFIG_SPL_LDSCRIPT="arch/arm/mach-socfpga/u-boot-spl-soc64.lds" +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0xffe3f000 CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FS_FAT=y CONFIG_SYS_LOAD_ADDR=0x02000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_REMAKE_ELF=y CONFIG_FIT=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x02000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="earlycon" @@ -33,7 +34,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffe3f000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 @@ -82,7 +82,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SYS_NS16550_MEM32=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_stratix10_defconfig b/configs/socfpga_stratix10_defconfig index 919863270f..ff47984eb1 100644 --- a/configs/socfpga_stratix10_defconfig +++ b/configs/socfpga_stratix10_defconfig @@ -4,12 +4,16 @@ CONFIG_ARCH_SOCFPGA=y CONFIG_TEXT_BASE=0x1000 CONFIG_SYS_MALLOC_LEN=0x500000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x200 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_stratix10_socdk" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SYS_PROMPT="SOCFPGA_STRATIX10 # " +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0xffe3f000 CONFIG_TARGET_SOCFPGA_STRATIX10_SOCDK=y CONFIG_IDENT_STRING="socfpga_stratix10" CONFIG_SPL_FS_FAT=y @@ -19,8 +23,6 @@ CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x3fe00000 CONFIG_OPTIMIZE_INLINING=y CONFIG_SPL_OPTIMIZE_INLINING=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x101000 CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y @@ -32,7 +34,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x3ff00000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffe3f000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x3fa00000 @@ -79,7 +80,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SYS_NS16550_MEM32=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 6d859b3274..30f52c0587 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -2,17 +2,19 @@ CONFIG_ARM=y CONFIG_SYS_L2_PL310=y CONFIG_ARCH_SOCFPGA=y CONFIG_SYS_MALLOC_LEN=0x4000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x100000 CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="socfpga_cyclone5_vining_fpga" CONFIG_SPL_TEXT_BASE=0xFFFF0000 +CONFIG_DM_RESET=y +CONFIG_SPL_STACK=0x0 CONFIG_TARGET_SOCFPGA_SOFTING_VINING_FPGA=y CONFIG_ENV_OFFSET_REDUND=0x110000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x800000 CONFIG_FIT=y CONFIG_TIMESTAMP=y CONFIG_BOOTDELAY=5 @@ -31,7 +33,6 @@ CONFIG_MISC_INIT_R=y CONFIG_SPL_PAD_TO=0x10000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x0 CONFIG_SPL_SPI_LOAD=y CONFIG_SYS_SPI_U_BOOT_OFFS=0x40000 CONFIG_CMDLINE_PS_SUPPORT=y @@ -104,7 +105,6 @@ CONFIG_PHY_MICREL=y CONFIG_PHY_MICREL_KSZ90X1=y CONFIG_ETH_DESIGNWARE=y CONFIG_MII=y -CONFIG_DM_RESET=y CONFIG_SPI=y CONFIG_CADENCE_QSPI=y CONFIG_DESIGNWARE_SPI=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index 312fda9ad0..24655131a8 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -20,7 +20,6 @@ CONFIG_FIT_SIGNATURE=y CONFIG_FIT_VERBOSE=y CONFIG_LEGACY_IMAGE_FORMAT=y CONFIG_OF_BOARD_SETUP=y -CONFIG_SYS_MONITOR_BASE=0xFFF40000 CONFIG_BOOTDELAY=1 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Enter password to abort autoboot in %d seconds!\n" @@ -74,7 +73,6 @@ CONFIG_ENV_IS_NOWHERE=y CONFIG_ENV_IS_IN_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR_REDUND=0xFFF00000 -CONFIG_ENV_APPEND=y CONFIG_ENV_WRITEABLE_LIST=y CONFIG_ENV_ACCESS_IGNORE_FORCE=y CONFIG_USE_ETHPRIME=y diff --git a/configs/spring_defconfig b/configs/spring_defconfig index 825a8dbf1a..02ec0dfecd 100644 --- a/configs/spring_defconfig +++ b/configs/spring_defconfig @@ -11,6 +11,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS5=y CONFIG_TARGET_SPRING=y CONFIG_NR_DRAM_BANKS=8 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x3FC000 CONFIG_ENV_SECT_SIZE=0x4000 @@ -24,8 +26,6 @@ CONFIG_IDENT_STRING=" for spring" CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x2050000 CONFIG_FIT=y CONFIG_FIT_BEST_MATCH=y CONFIG_SILENT_CONSOLE=y diff --git a/configs/starqltechn_defconfig b/configs/starqltechn_defconfig index 7a64f2a7a0..3d96e0ae09 100644 --- a/configs/starqltechn_defconfig +++ b/configs/starqltechn_defconfig @@ -26,7 +26,6 @@ CONFIG_QCOM_PMIC_GPIO=y CONFIG_PINCTRL=y CONFIG_DM_PMIC=y CONFIG_PMIC_QCOM=y -CONFIG_REQUIRE_SERIAL_CONSOLE=y CONFIG_MSM_GENI_SERIAL=y CONFIG_SPMI_MSM=y CONFIG_VIDEO=y diff --git a/configs/stemmy_defconfig b/configs/stemmy_defconfig index ff9667ae92..9b78ab36cf 100644 --- a/configs/stemmy_defconfig +++ b/configs/stemmy_defconfig @@ -9,10 +9,10 @@ CONFIG_TEXT_BASE=0x100000 CONFIG_SYS_MALLOC_LEN=0x0200000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=2 -CONFIG_DEFAULT_DEVICE_TREE="ste-ux500-samsung-stemmy" -CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 +CONFIG_DEFAULT_DEVICE_TREE="ste-ux500-samsung-stemmy" +CONFIG_SYS_LOAD_ADDR=0x100000 CONFIG_OF_BOARD_SETUP=y CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run fastbootcmd" diff --git a/configs/stih410-b2260_defconfig b/configs/stih410-b2260_defconfig index 004e5a8cc3..5872fdbd8a 100644 --- a/configs/stih410-b2260_defconfig +++ b/configs/stih410-b2260_defconfig @@ -5,14 +5,14 @@ CONFIG_TEXT_BASE=0x7D600000 CONFIG_SYS_MALLOC_LEN=0x1800000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7bdfff10 CONFIG_ENV_SIZE=0x4000 CONFIG_DEFAULT_DEVICE_TREE="stih410-b2260" CONFIG_SYS_PROMPT="stih410-b2260 => " CONFIG_IDENT_STRING="STMicroelectronics STiH410-B2260" CONFIG_SYS_LOAD_ADDR=0x40000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x7bdfff10 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_USE_BOOTARGS=y diff --git a/configs/stm32746g-eval_defconfig b/configs/stm32746g-eval_defconfig index 9fc3463aff..8a4eb1bd4f 100644 --- a/configs/stm32746g-eval_defconfig +++ b/configs/stm32746g-eval_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_STM32=y CONFIG_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32746g-eval" CONFIG_SYS_PROMPT="U-Boot > " @@ -10,8 +12,6 @@ CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_SYS_LOAD_ADDR=0x8008000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32746g-eval_spl_defconfig b/configs/stm32746g-eval_spl_defconfig index 45b8459486..375ff41cf4 100644 --- a/configs/stm32746g-eval_spl_defconfig +++ b/configs/stm32746g-eval_spl_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32746g-eval" CONFIG_SPL_TEXT_BASE=0x8000000 @@ -19,8 +21,6 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x8009000 CONFIG_BUILD_TARGET="u-boot-with-spl.bin" CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32f429-discovery_defconfig b/configs/stm32f429-discovery_defconfig index af9901ffc6..ce30656dd8 100644 --- a/configs/stm32f429-discovery_defconfig +++ b/configs/stm32f429-discovery_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_STM32=y CONFIG_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_LEN=0x0200000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_SECT_SIZE=0x20000 CONFIG_DEFAULT_DEVICE_TREE="stm32f429-disco" @@ -12,8 +14,6 @@ CONFIG_TARGET_STM32F429_DISCOVERY=y CONFIG_SYS_LOAD_ADDR=0x90400000 CONFIG_ENV_ADDR=0x8040000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk consoleblank=0 ignore_loglevel" diff --git a/configs/stm32f429-evaluation_defconfig b/configs/stm32f429-evaluation_defconfig index 183849353c..e41c462c9f 100644 --- a/configs/stm32f429-evaluation_defconfig +++ b/configs/stm32f429-evaluation_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_STM32=y CONFIG_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32429i-eval" CONFIG_SYS_PROMPT="U-Boot > " @@ -10,8 +12,6 @@ CONFIG_STM32F4=y CONFIG_TARGET_STM32F429_EVALUATION=y CONFIG_SYS_LOAD_ADDR=0x400000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/stm32f469-discovery_defconfig b/configs/stm32f469-discovery_defconfig index 3f2add3062..35d18d58be 100644 --- a/configs/stm32f469-discovery_defconfig +++ b/configs/stm32f469-discovery_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_STM32=y CONFIG_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32f469-disco" CONFIG_SYS_PROMPT="U-Boot > " @@ -10,8 +12,6 @@ CONFIG_STM32F4=y CONFIG_TARGET_STM32F469_DISCOVERY=y CONFIG_SYS_LOAD_ADDR=0x400000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10010000 CONFIG_BOOTDELAY=3 # CONFIG_DISPLAY_CPUINFO is not set CONFIG_MISC_INIT_R=y diff --git a/configs/stm32f746-disco_defconfig b/configs/stm32f746-disco_defconfig index 924ca0dfbe..ffe9f7f549 100644 --- a/configs/stm32f746-disco_defconfig +++ b/configs/stm32f746-disco_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_STM32=y CONFIG_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco" CONFIG_SYS_PROMPT="U-Boot > " @@ -10,8 +12,6 @@ CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_SYS_LOAD_ADDR=0x8008000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32f746-disco_spl_defconfig b/configs/stm32f746-disco_spl_defconfig index 877616d595..58875a4b8f 100644 --- a/configs/stm32f746-disco_spl_defconfig +++ b/configs/stm32f746-disco_spl_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32f746-disco" CONFIG_SPL_TEXT_BASE=0x8000000 @@ -19,8 +21,6 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x8009000 CONFIG_BUILD_TARGET="u-boot-with-spl.bin" CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32f769-disco_defconfig b/configs/stm32f769-disco_defconfig index 35b9c03693..ac4627c472 100644 --- a/configs/stm32f769-disco_defconfig +++ b/configs/stm32f769-disco_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_STM32=y CONFIG_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" CONFIG_SYS_PROMPT="U-Boot > " @@ -10,8 +12,6 @@ CONFIG_STM32F7=y CONFIG_TARGET_STM32F746_DISCO=y CONFIG_SYS_LOAD_ADDR=0x8008000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32f769-disco_spl_defconfig b/configs/stm32f769-disco_spl_defconfig index 706fbb6b84..6e03c451c7 100644 --- a/configs/stm32f769-disco_spl_defconfig +++ b/configs/stm32f769-disco_spl_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32f769-disco" CONFIG_SPL_TEXT_BASE=0x8000000 @@ -19,8 +21,6 @@ CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x8009000 CONFIG_BUILD_TARGET="u-boot-with-spl.bin" CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20050000 CONFIG_SYS_MONITOR_LEN=524288 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32h743-disco_defconfig b/configs/stm32h743-disco_defconfig index f664fa1598..4e4325cdad 100644 --- a/configs/stm32h743-disco_defconfig +++ b/configs/stm32h743-disco_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_STM32=y CONFIG_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-disco" CONFIG_SYS_PROMPT="U-Boot > " @@ -10,8 +12,6 @@ CONFIG_STM32H7=y CONFIG_TARGET_STM32H743_DISCO=y CONFIG_SYS_LOAD_ADDR=0xd0400000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" diff --git a/configs/stm32h743-eval_defconfig b/configs/stm32h743-eval_defconfig index 966b54db35..d5513c5eee 100644 --- a/configs/stm32h743-eval_defconfig +++ b/configs/stm32h743-eval_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_STM32=y CONFIG_TEXT_BASE=0x08000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32h743i-eval" CONFIG_SYS_PROMPT="U-Boot > " @@ -10,8 +12,6 @@ CONFIG_STM32H7=y CONFIG_TARGET_STM32H743_EVAL=y CONFIG_SYS_LOAD_ADDR=0xd0400000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Hit SPACE in %d seconds to stop autoboot.\n" diff --git a/configs/stm32h750-art-pi_defconfig b/configs/stm32h750-art-pi_defconfig index a9a97a3443..4481a3f936 100644 --- a/configs/stm32h750-art-pi_defconfig +++ b/configs/stm32h750-art-pi_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_STM32=y CONFIG_TEXT_BASE=0x90000000 CONFIG_SYS_MALLOC_LEN=0x100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="stm32h750i-art-pi" CONFIG_SYS_PROMPT="U-Boot > " @@ -10,8 +12,6 @@ CONFIG_STM32H7=y CONFIG_TARGET_STM32H750_ART_PI=y CONFIG_SYS_LOAD_ADDR=0xc1800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x24040000 CONFIG_FIT=y CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y diff --git a/configs/stm32mp13_defconfig b/configs/stm32mp13_defconfig index ab824808f9..031158a004 100644 --- a/configs/stm32mp13_defconfig +++ b/configs/stm32mp13_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_F_LEN=0x180000 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0400000 CONFIG_ENV_OFFSET=0x900000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp135f-dk" CONFIG_SYS_PROMPT="STM32MP> " @@ -15,7 +16,6 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0400000 CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig index 41074d50ff..0b17573e53 100644 --- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig @@ -1,11 +1,14 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_ENV_OFFSET=0x280000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-ctouch2" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SPL_MMC=y +CONFIG_SPL_STACK=0x30000000 CONFIG_SPL=y CONFIG_TARGET_ICORE_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 @@ -14,14 +17,11 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig index c9dbd485bc..47fbab39ef 100644 --- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig +++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig @@ -1,11 +1,14 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_ENV_OFFSET=0x280000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-icore-stm32mp1-edimm2.2" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SPL_MMC=y +CONFIG_SPL_STACK=0x30000000 CONFIG_SPL=y CONFIG_TARGET_ICORE_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 @@ -14,14 +17,11 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig index 6f8293c7ee..9bd1030603 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig @@ -1,11 +1,14 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_ENV_OFFSET=0x280000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0-of7" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SPL_MMC=y +CONFIG_SPL_STACK=0x30000000 CONFIG_SPL=y CONFIG_TARGET_MICROGEA_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 @@ -14,14 +17,11 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig index a12a150f3b..1bbf41c9e4 100644 --- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig +++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig @@ -1,11 +1,14 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_ENV_OFFSET=0x280000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157a-microgea-stm32mp1-microdev2.0" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SPL_MMC=y +CONFIG_SPL_STACK=0x30000000 CONFIG_SPL=y CONFIG_TARGET_MICROGEA_STM32MP1=y CONFIG_ENV_OFFSET_REDUND=0x2C0000 @@ -14,14 +17,11 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig index 87e3b49604..bac1280d00 100644 --- a/configs/stm32mp15_basic_defconfig +++ b/configs/stm32mp15_basic_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_SPL_DM_SPI=y @@ -8,6 +10,7 @@ CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" CONFIG_SPL_TEXT_BASE=0x2FFC2500 CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SPL_MMC=y +CONFIG_SPL_STACK=0x30000000 CONFIG_SPL=y CONFIG_CMD_STM32KEY=y CONFIG_TYPEC_STUSB160X=y @@ -21,8 +24,6 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" @@ -31,7 +32,6 @@ CONFIG_BOARD_EARLY_INIT_F=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x3db00 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig index 5dc00213a8..738ea14d54 100644 --- a/configs/stm32mp15_defconfig +++ b/configs/stm32mp15_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_F_LEN=0x20000 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_ENV_OFFSET=0x480000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" @@ -17,7 +18,6 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig index 4ea80ad441..e350736d4a 100644 --- a/configs/stm32mp15_dhcom_basic_defconfig +++ b/configs/stm32mp15_dhcom_basic_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SPL_DM_SPI=y @@ -10,6 +12,7 @@ CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SPL_MMC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C +CONFIG_SPL_STACK=0x30000000 CONFIG_SPL=y CONFIG_CMD_STM32KEY=y CONFIG_CMD_STBOARD=y @@ -23,13 +26,10 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000 CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcom.its" -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_CONSOLE_MUX=y @@ -39,7 +39,6 @@ CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SPL_BOOTCOUNT_LIMIT=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig index 668e9ccf93..0bc58b5898 100644 --- a/configs/stm32mp15_dhcor_basic_defconfig +++ b/configs/stm32mp15_dhcor_basic_defconfig @@ -1,6 +1,8 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_SYS_MALLOC_F_LEN=0x3000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_SECT_SIZE=0x1000 CONFIG_SPL_DM_SPI=y @@ -10,6 +12,7 @@ CONFIG_SYS_PROMPT="STM32MP> " CONFIG_SPL_MMC=y CONFIG_BOOTCOUNT_BOOTLIMIT=3 CONFIG_SYS_BOOTCOUNT_ADDR=0x5C00A14C +CONFIG_SPL_STACK=0x30000000 CONFIG_SPL=y CONFIG_CMD_STM32KEY=y CONFIG_CMD_STBOARD=y @@ -21,13 +24,10 @@ CONFIG_SPL_SPI=y # CONFIG_ARMV7_VIRT is not set CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0xc1000000 CONFIG_SPL_FIT_SOURCE="board/dhelectronics/dh_stm32mp1/u-boot-dhcor.its" -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" CONFIG_CONSOLE_MUX=y @@ -37,7 +37,6 @@ CONFIG_SPL_MAX_FOOTPRINT=0x3db00 CONFIG_SPL_BOOTCOUNT_LIMIT=y CONFIG_SPL_LEGACY_IMAGE_FORMAT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x30000000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xc0300000 diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig index c1ad4dd521..8a889e01b1 100644 --- a/configs/stm32mp15_trusted_defconfig +++ b/configs/stm32mp15_trusted_defconfig @@ -2,6 +2,7 @@ CONFIG_ARM=y CONFIG_ARCH_STM32MP=y CONFIG_TFABOOT=y CONFIG_SYS_MALLOC_F_LEN=0x3000 +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_ENV_OFFSET=0x280000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1" @@ -18,7 +19,6 @@ CONFIG_SYS_LOAD_ADDR=0xc2000000 CONFIG_SYS_MEMTEST_START=0xc0000000 CONFIG_SYS_MEMTEST_END=0xc4000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc0100000 CONFIG_FIT=y CONFIG_BOOTDELAY=1 CONFIG_BOOTCOMMAND="run bootcmd_stm32mp" diff --git a/configs/stout_defconfig b/configs/stout_defconfig index 53dce6a161..fb7ec0a7e4 100644 --- a/configs/stout_defconfig +++ b/configs/stout_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_OFFSET=0xC0000 CONFIG_ENV_SECT_SIZE=0x40000 @@ -20,14 +22,13 @@ CONFIG_ARCH_RMOBILE_BOARD_STRING="Stout" CONFIG_R8A7790=y CONFIG_TARGET_STOUT=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x2000 CONFIG_SPL=y CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x50000000 CONFIG_ENV_ADDR=0xC0000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4f000000 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_FIT=y CONFIG_BOOTDELAY=3 @@ -36,7 +37,6 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xe6340000 CONFIG_SPL_RAM_SUPPORT=y CONFIG_SPL_RAM_DEVICE=y CONFIG_SPL_SPI_LOAD=y diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig index a6fc65baee..08f19a90cb 100644 --- a/configs/synquacer_developerbox_defconfig +++ b/configs/synquacer_developerbox_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_SYNQUACER=y CONFIG_TEXT_BASE=0x08200000 CONFIG_SYS_MALLOC_LEN=0x1000000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xe0000000 CONFIG_ENV_SIZE=0x30000 CONFIG_ENV_OFFSET=0x300000 CONFIG_ENV_SECT_SIZE=0x10000 @@ -11,8 +13,6 @@ CONFIG_DEFAULT_DEVICE_TREE="synquacer-sc2a11-developerbox" CONFIG_SYS_LOAD_ADDR=0x80000000 CONFIG_TARGET_DEVELOPERBOX=y CONFIG_AHCI=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xe0000000 CONFIG_FIT=y CONFIG_BOOTSTAGE_STASH_SIZE=4096 CONFIG_HUSH_PARSER=y diff --git a/configs/syzygy_hub_defconfig b/configs/syzygy_hub_defconfig index aa28a68a86..106517d8a2 100644 --- a/configs/syzygy_hub_defconfig +++ b/configs/syzygy_hub_defconfig @@ -8,6 +8,7 @@ CONFIG_TEXT_BASE=0x4000000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-syzygy-hub" CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_DEBUG_UART=y @@ -26,7 +27,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig index 9a1dac78f1..2a85c0d190 100644 --- a/configs/taurus_defconfig +++ b/configs/taurus_defconfig @@ -23,6 +23,7 @@ CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="at91sam9g20-taurus" CONFIG_SYS_PROMPT="U-Boot> " +CONFIG_SPL_STACK=0x304000 CONFIG_SPL_SYS_MALLOC_F_LEN=0x1000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xfffff200 @@ -48,7 +49,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x600 # CONFIG_SPL_LEGACY_IMAGE_FORMAT is not set CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x304000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x20ba0000 diff --git a/configs/tb100_defconfig b/configs/tb100_defconfig index 361853a891..b0387aae39 100644 --- a/configs/tb100_defconfig +++ b/configs/tb100_defconfig @@ -3,13 +3,13 @@ CONFIG_TARGET_TB100=y CONFIG_TEXT_BASE=0x84000000 CONFIG_SYS_MALLOC_LEN=0x20000 CONFIG_SYS_MALLOC_F_LEN=0x400 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_ENV_SIZE=0x800 CONFIG_DEFAULT_DEVICE_TREE="abilis_tb100" CONFIG_SYS_PROMPT="[tb100]:~# " CONFIG_SYS_CLK_FREQ=500000000 CONFIG_SYS_LOAD_ADDR=0x82000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x80000f30 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200n8" diff --git a/configs/tbs2910_defconfig b/configs/tbs2910_defconfig index 0df8a68900..112a8da849 100644 --- a/configs/tbs2910_defconfig +++ b/configs/tbs2910_defconfig @@ -108,7 +108,6 @@ CONFIG_VIDEO=y # CONFIG_BACKLIGHT is not set # CONFIG_VIDEO_BPP8 is not set # CONFIG_VIDEO_BPP32 is not set -# CONFIG_VIDEO_ANSI is not set CONFIG_SYS_WHITE_ON_BLACK=y # CONFIG_PANEL is not set CONFIG_VIDCONSOLE_AS_LCD=y diff --git a/configs/tec-ng_defconfig b/configs/tec-ng_defconfig index 8c3f8d5e06..e0b0469b18 100644 --- a/configs/tec-ng_defconfig +++ b/configs/tec-ng_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra30-tec-ng" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Tegra30 (TEC-NG) # " +CONFIG_SPL_STACK=0x800ffffc CONFIG_TEGRA30=y CONFIG_TARGET_TEC_NG=y CONFIG_TEGRA_ENABLE_UARTD=y @@ -19,7 +20,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 diff --git a/configs/tec_defconfig b/configs/tec_defconfig index a1900f0181..461c46c725 100644 --- a/configs/tec_defconfig +++ b/configs/tec_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_OFFSET=0x1FFE0000 CONFIG_DEFAULT_DEVICE_TREE="tegra20-tec" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (TEC) # " +CONFIG_SPL_STACK=0xffffc CONFIG_TEGRA20=y CONFIG_TARGET_TEC=y CONFIG_TEGRA_ENABLE_UARTD=y @@ -18,7 +19,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig index 3654c472dc..9828a9a6f7 100644 --- a/configs/theadorable_debug_defconfig +++ b/configs/theadorable_debug_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x00800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_THEADORABLE=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 @@ -12,14 +14,13 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="armada-xp-theadorable" CONFIG_SPL_TEXT_BASE=0x40004030 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_MEM_TOP_HIDE=0x80000 CONFIG_SYS_LOAD_ADDR=0x800000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y # CONFIG_FIT_PRINT is not set @@ -35,7 +36,6 @@ CONFIG_SPL_BSS_START_ADDR=0x40020000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_I2C=y CONFIG_HUSH_PARSER=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/thuban_defconfig b/configs/thuban_defconfig index a9e37170f4..6302c1a415 100644 --- a/configs/thuban_defconfig +++ b/configs/thuban_defconfig @@ -6,6 +6,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_SPL_DM_SPI=y CONFIG_DEFAULT_DEVICE_TREE="am335x-draco" @@ -24,8 +26,6 @@ CONFIG_SPL_SPI_FLASH_SUPPORT=y CONFIG_SPL_SPI=y CONFIG_SYS_LOAD_ADDR=0x81000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4030ff00 CONFIG_BOOTDELAY=3 CONFIG_AUTOBOOT_KEYED=y CONFIG_AUTOBOOT_PROMPT="Autobooting in %d seconds, press \"\" to stop\n" diff --git a/configs/thunderx_88xx_defconfig b/configs/thunderx_88xx_defconfig index 417c9120ca..ef508ab56b 100644 --- a/configs/thunderx_88xx_defconfig +++ b/configs/thunderx_88xx_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x00500000 CONFIG_SYS_MALLOC_LEN=0x101000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x57fff0 CONFIG_ENV_SIZE=0x1000 CONFIG_DEFAULT_DEVICE_TREE="thunderx-88xx" CONFIG_SYS_PROMPT="ThunderX_88XX> " @@ -13,8 +15,6 @@ CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" for Cavium Thunder CN88XX ARM v8 Multi-Core" CONFIG_SYS_LOAD_ADDR=0x500000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x57fff0 CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=5 CONFIG_USE_BOOTARGS=y diff --git a/configs/ti816x_evm_defconfig b/configs/ti816x_evm_defconfig index bab7b29bf8..a4bc993297 100644 --- a/configs/ti816x_evm_defconfig +++ b/configs/ti816x_evm_defconfig @@ -5,6 +5,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4031ff00 CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x1C0000 CONFIG_DM_GPIO=y @@ -20,8 +22,6 @@ CONFIG_SYS_CLK_FREQ=27000000 CONFIG_SPL_FS_FAT=y CONFIG_SPL_LIBDISK_SUPPORT=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x4031ff00 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyO2,115200n8 noinitrd earlyprintk" diff --git a/configs/tinker-rk3288_defconfig b/configs/tinker-rk3288_defconfig index c03256a0bf..2a9a4ba397 100644 --- a/configs/tinker-rk3288_defconfig +++ b/configs/tinker-rk3288_defconfig @@ -6,18 +6,20 @@ CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x01000000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y @@ -27,7 +29,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_I2C=y @@ -82,7 +83,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y diff --git a/configs/tinker-s-rk3288_defconfig b/configs/tinker-s-rk3288_defconfig index 294e5b1071..e9c6d52215 100644 --- a/configs/tinker-s-rk3288_defconfig +++ b/configs/tinker-s-rk3288_defconfig @@ -7,17 +7,19 @@ CONFIG_TEXT_BASE=0x01000000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-tinker-s" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_TINKER_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x800000 +CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_SIZE_LIMIT=0x4b000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 # CONFIG_ANDROID_BOOT_IMAGE is not set CONFIG_USE_PREBOOT=y @@ -27,7 +29,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x300000 CONFIG_SPL_I2C=y @@ -82,7 +83,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig index 88a94ddd6b..23e1f0e9db 100644 --- a/configs/tools-only_defconfig +++ b/configs/tools-only_defconfig @@ -12,7 +12,6 @@ CONFIG_FIT_SIGNATURE=y # CONFIG_BOOTMETH_VBE is not set CONFIG_USE_BOOTCOMMAND=y CONFIG_BOOTCOMMAND="run distro_bootcmd" -# CONFIG_AVB_VERIFY is not set # CONFIG_CMD_BOOTD is not set # CONFIG_CMD_BOOTM is not set # CONFIG_CMD_ELF is not set diff --git a/configs/topic_miami_defconfig b/configs/topic_miami_defconfig index 2ae1fb8279..fe8ec69edb 100644 --- a/configs/topic_miami_defconfig +++ b/configs/topic_miami_defconfig @@ -10,6 +10,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miami" CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL=y CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miami/ps7_regs.txt" @@ -30,7 +31,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 diff --git a/configs/topic_miamilite_defconfig b/configs/topic_miamilite_defconfig index 510ff2ebd8..e9650e5750 100644 --- a/configs/topic_miamilite_defconfig +++ b/configs/topic_miamilite_defconfig @@ -10,6 +10,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamilite" CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL=y CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamilite/ps7_regs.txt" @@ -30,7 +31,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 diff --git a/configs/topic_miamiplus_defconfig b/configs/topic_miamiplus_defconfig index 0b708cccf6..536686fe4b 100644 --- a/configs/topic_miamiplus_defconfig +++ b/configs/topic_miamiplus_defconfig @@ -10,6 +10,7 @@ CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-topic-miamiplus" CONFIG_SYS_PROMPT="zynq-uboot> " CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL=y CONFIG_DEBUG_UART_CLOCK=100000000 CONFIG_BOOT_INIT_FILE="board/topic/zynq/zynq-topic-miamiplus/ps7_regs.txt" @@ -30,7 +31,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 diff --git a/configs/total_compute_defconfig b/configs/total_compute_defconfig index 04d27058f3..51a9a9fe13 100644 --- a/configs/total_compute_defconfig +++ b/configs/total_compute_defconfig @@ -3,6 +3,8 @@ CONFIG_TARGET_TOTAL_COMPUTE=y CONFIG_TEXT_BASE=0xe0000000 CONFIG_SYS_MALLOC_LEN=0x3200000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_ENV_SIZE=0x2a00000 CONFIG_DEFAULT_DEVICE_TREE="total_compute" CONFIG_SYS_PROMPT="TOTAL_COMPUTE# " @@ -10,8 +12,6 @@ CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0xff000000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_REMAKE_ELF=y CONFIG_ANDROID_BOOT_IMAGE=y CONFIG_FIT=y diff --git a/configs/tplink_wdr4300_defconfig b/configs/tplink_wdr4300_defconfig index 87289069b8..41e7076b77 100644 --- a/configs/tplink_wdr4300_defconfig +++ b/configs/tplink_wdr4300_defconfig @@ -1,6 +1,8 @@ CONFIG_MIPS=y CONFIG_TEXT_BASE=0xA1000000 CONFIG_SYS_MALLOC_LEN=0x40000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd007fff CONFIG_ENV_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="tplink_wdr4300" CONFIG_SYS_LOAD_ADDR=0xa1000000 @@ -9,8 +11,6 @@ CONFIG_BOARD_TPLINK_WDR4300=y CONFIG_SYS_MIPS_TIMER_FREQ=280000000 CONFIG_SYS_MEMTEST_START=0x80100000 CONFIG_SYS_MEMTEST_END=0x83f00000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xbd007fff CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS="console=ttyS0,115200 root=/dev/mtdblock2 rootfstype=squashfs" diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index 1ce3f502b6..a24884c30c 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_TRATS2=y CONFIG_EXYNOS_ACE_SHA=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43dfff10 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2" @@ -16,8 +18,6 @@ CONFIG_SYS_PROMPT="Trats2 # " CONFIG_SYS_MEM_TOP_HIDE=0x100000 CONFIG_SYS_LOAD_ADDR=0x43e00000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x43dfff10 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_SYS_MONITOR_LEN=262144 CONFIG_FIT=y diff --git a/configs/trats_defconfig b/configs/trats_defconfig index a294228a51..e66e870635 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -9,6 +9,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_TRATS=y CONFIG_EXYNOS_ACE_SHA=y +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x447fff10 CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats" @@ -16,8 +18,6 @@ CONFIG_SYS_PROMPT="Trats # " CONFIG_SYS_MEM_TOP_HIDE=0x100000 CONFIG_SYS_LOAD_ADDR=0x44800000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x447fff10 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/trimslice_defconfig b/configs/trimslice_defconfig index 5da3a27224..0dd304ab55 100644 --- a/configs/trimslice_defconfig +++ b/configs/trimslice_defconfig @@ -10,6 +10,7 @@ CONFIG_ENV_SECT_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="tegra20-trimslice" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (TrimSlice) # " +CONFIG_SPL_STACK=0xffffc CONFIG_TEGRA20=y CONFIG_TARGET_TRIMSLICE=y CONFIG_SYS_LOAD_ADDR=0x1000000 @@ -19,7 +20,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 diff --git a/configs/turris_mox_defconfig b/configs/turris_mox_defconfig index 54fda4bc5e..ba3796c7c0 100644 --- a/configs/turris_mox_defconfig +++ b/configs/turris_mox_defconfig @@ -3,6 +3,8 @@ CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_TEXT_BASE=0x00000000 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_TURRIS_MOX=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 @@ -15,8 +17,6 @@ CONFIG_DEBUG_UART=y CONFIG_AHCI=y CONFIG_OF_BOARD_FIXUP=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/turris_omnia_defconfig b/configs/turris_omnia_defconfig index 3fbc711717..fea92fa1bf 100644 --- a/configs/turris_omnia_defconfig +++ b/configs/turris_omnia_defconfig @@ -7,6 +7,8 @@ CONFIG_SPL_GPIO=y CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_TURRIS_OMNIA=y CONFIG_DDR_RESET_ON_TRAINING_FAILURE=y CONFIG_MVEBU_EFUSE=y @@ -18,6 +20,7 @@ CONFIG_ENV_SECT_SIZE=0x10000 CONFIG_DEFAULT_DEVICE_TREE="armada-385-turris-omnia" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 @@ -28,8 +31,6 @@ CONFIG_OF_BOARD_FIXUP=y CONFIG_SYS_MEMTEST_START=0x00800000 CONFIG_SYS_MEMTEST_END=0x00ffffff CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_HAS_BOARD_SIZE_LIMIT=y CONFIG_BOARD_SIZE_LIMIT=983040 CONFIG_FIT=y @@ -48,7 +49,6 @@ CONFIG_SPL_BSS_START_ADDR=0x40023000 CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_ENV_SUPPORT=y CONFIG_SPL_I2C=y CONFIG_SYS_MAXARGS=32 diff --git a/configs/u200_defconfig b/configs/u200_defconfig index 1d19c06fa5..83f5235f6c 100644 --- a/configs/u200_defconfig +++ b/configs/u200_defconfig @@ -2,17 +2,18 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-g12a-u200" +CONFIG_DM_RESET=y CONFIG_MESON_G12A=y CONFIG_DEBUG_UART_BASE=0xff803000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" u200" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -39,7 +40,6 @@ CONFIG_PINCTRL=y CONFIG_PINCTRL_MESON_G12A=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/uDPU_defconfig b/configs/uDPU_defconfig index cfbbf32db0..620970dd79 100644 --- a/configs/uDPU_defconfig +++ b/configs/uDPU_defconfig @@ -2,6 +2,8 @@ CONFIG_ARM=y CONFIG_ARCH_CPU_INIT=y CONFIG_ARCH_MVEBU=y CONFIG_TEXT_BASE=0x00000000 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_MVEBU_ARMADA_37XX=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x180000 @@ -13,8 +15,6 @@ CONFIG_DEBUG_UART_BASE=0xd0012000 CONFIG_SYS_LOAD_ADDR=0x6000000 CONFIG_DEBUG_UART=y CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set CONFIG_FIT=y CONFIG_FIT_VERBOSE=y diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig index 73ab0f09f9..289bebcf1e 100644 --- a/configs/udoo_neo_defconfig +++ b/configs/udoo_neo_defconfig @@ -10,7 +10,6 @@ CONFIG_ENV_SIZE=0x2000 CONFIG_ENV_OFFSET=0x80000 CONFIG_MX6SX=y CONFIG_TARGET_UDOO_NEO=y -CONFIG_DM_I2C=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx6sx-udoo-neo-basic" CONFIG_SPL_TEXT_BASE=0x00908000 @@ -43,6 +42,7 @@ CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SYS_MMC_ENV_DEV=1 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y CONFIG_BOUNCE_BUFFER=y +CONFIG_DM_I2C=y CONFIG_SYS_I2C_MXC=y CONFIG_FSL_USDHC=y CONFIG_PHYLIB=y @@ -56,9 +56,9 @@ CONFIG_PINCTRL_IMX6=y CONFIG_DM_PMIC=y CONFIG_DM_PMIC_PFUZE100=y CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PFUZE100=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_ANATOP=y -CONFIG_DM_REGULATOR_PFUZE100=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_IMX_THERMAL=y diff --git a/configs/uniphier_ld4_sld8_defconfig b/configs/uniphier_ld4_sld8_defconfig index b11dea593a..f77b14fcb0 100644 --- a/configs/uniphier_ld4_sld8_defconfig +++ b/configs/uniphier_ld4_sld8_defconfig @@ -2,19 +2,18 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_TEXT_BASE=0x84000000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-ld4-ref" CONFIG_SPL_TEXT_BASE=0x00040000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x100000 CONFIG_SPL=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_LOAD_ADDR=0x85000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000 CONFIG_SYS_MONITOR_LEN=2097152 -CONFIG_TIMER=y -CONFIG_SPL_TIMER=y CONFIG_TIMESTAMP=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" @@ -25,7 +24,6 @@ CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x100000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_TARGET="u-boot-with-spl.bin" @@ -77,6 +75,8 @@ CONFIG_SPL_NAND_DENALI=y CONFIG_NAND_DENALI_SPARE_AREA_SKIP_BYTES=8 CONFIG_SMC911X=y CONFIG_SMC911X_32_BIT=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y CONFIG_USB=y CONFIG_USB_EHCI_HCD=y CONFIG_USB_EHCI_GENERIC=y diff --git a/configs/uniphier_v7_defconfig b/configs/uniphier_v7_defconfig index d626968c76..501d0ebdd5 100644 --- a/configs/uniphier_v7_defconfig +++ b/configs/uniphier_v7_defconfig @@ -2,19 +2,18 @@ CONFIG_ARM=y CONFIG_ARCH_UNIPHIER=y CONFIG_TEXT_BASE=0x84000000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="uniphier-pxs2-vodka" CONFIG_SPL_TEXT_BASE=0x00100000 CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x100000 CONFIG_SPL=y CONFIG_MICRO_SUPPORT_CARD=y CONFIG_SYS_LOAD_ADDR=0x85000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x84000000 CONFIG_SYS_MONITOR_LEN=2097152 -CONFIG_TIMER=y -CONFIG_SPL_TIMER=y CONFIG_TIMESTAMP=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_BOOTCOMMAND="run ${bootdev}script; run ${bootdev}boot" @@ -25,7 +24,6 @@ CONFIG_SPL_MAX_SIZE=0x10000 CONFIG_SPL_PAD_TO=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x100000 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NOR_SUPPORT=y CONFIG_SPL_TARGET="u-boot-with-spl.bin" @@ -80,6 +78,8 @@ CONFIG_SNI_AVE=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_UNIPHIER_SPI=y +CONFIG_TIMER=y +CONFIG_SPL_TIMER=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y CONFIG_USB_XHCI_DWC3=y diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index a754c20046..09fa53199a 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -9,6 +9,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra124-venice2" CONFIG_SPL_TEXT_BASE=0x80108000 CONFIG_SYS_PROMPT="Tegra124 (Venice2) # " +CONFIG_SPL_STACK=0x800ffffc CONFIG_TEGRA124=y CONFIG_TARGET_VENICE2=y CONFIG_TEGRA_GPU=y @@ -19,7 +20,6 @@ CONFIG_SYS_STDIO_DEREGISTER=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x800ffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x80090000 diff --git a/configs/ventana_defconfig b/configs/ventana_defconfig index 3d94f454be..5e2ff877ca 100644 --- a/configs/ventana_defconfig +++ b/configs/ventana_defconfig @@ -8,6 +8,7 @@ CONFIG_ENV_OFFSET=0xFFFFE000 CONFIG_DEFAULT_DEVICE_TREE="tegra20-ventana" CONFIG_SPL_TEXT_BASE=0x00108000 CONFIG_SYS_PROMPT="Tegra20 (Ventana) # " +CONFIG_SPL_STACK=0xffffc CONFIG_TEGRA20=y CONFIG_TARGET_VENTANA=y CONFIG_TEGRA_ENABLE_UARTD=y @@ -17,7 +18,6 @@ CONFIG_USE_PREBOOT=y CONFIG_SPL_FOOTPRINT_LIMIT=y CONFIG_SPL_MAX_FOOTPRINT=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x90000 diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig index 5b5f7c051e..0891a72042 100644 --- a/configs/verdin-imx8mm_defconfig +++ b/configs/verdin-imx8mm_defconfig @@ -15,6 +15,7 @@ CONFIG_SYS_PROMPT="Verdin iMX8MM # " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x920000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SYS_LOAD_ADDR=0x48200000 @@ -27,7 +28,6 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=1 CONFIG_USE_PREBOOT=y @@ -42,7 +42,6 @@ CONFIG_SPL_BSS_START_ADDR=0x910000 CONFIG_SPL_BSS_MAX_SIZE=0x2000 CONFIG_SPL_BOARD_INIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x920000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/verdin-imx8mp_defconfig b/configs/verdin-imx8mp_defconfig index 153c7c1519..4ef6cc723c 100644 --- a/configs/verdin-imx8mp_defconfig +++ b/configs/verdin-imx8mp_defconfig @@ -19,6 +19,7 @@ CONFIG_SYS_PROMPT="Verdin iMX8MP # " CONFIG_SPL_MMC=y CONFIG_SPL_SERIAL=y CONFIG_SPL_DRIVERS_MISC=y +CONFIG_SPL_STACK=0x960000 CONFIG_SPL=y CONFIG_IMX_BOOTAUX=y CONFIG_SPL_IMX_ROMAPI_LOADADDR=0x48000000 @@ -32,7 +33,6 @@ CONFIG_FIT=y CONFIG_FIT_EXTERNAL_OFFSET=0x3000 CONFIG_FIT_VERBOSE=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_OF_SYSTEM_SETUP=y CONFIG_BOOTDELAY=1 CONFIG_USE_PREBOOT=y @@ -50,7 +50,6 @@ CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_BOOTROM_SUPPORT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x960000 CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x42200000 diff --git a/configs/vexpress_aemv8a_juno_defconfig b/configs/vexpress_aemv8a_juno_defconfig index 47841e8b6c..376d2befe0 100644 --- a/configs/vexpress_aemv8a_juno_defconfig +++ b/configs/vexpress_aemv8a_juno_defconfig @@ -2,14 +2,14 @@ CONFIG_ARM=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_VEXPRESS64=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_DEFAULT_DEVICE_TREE="juno-r2" CONFIG_SYS_PROMPT="VExpress64# " CONFIG_IDENT_STRING=" vexpress_aemv8a" CONFIG_TARGET_VEXPRESS64_JUNO=y CONFIG_SYS_MEMTEST_START=0x80000000 CONFIG_SYS_MEMTEST_END=0xff000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007fff0 CONFIG_REMAKE_ELF=y CONFIG_BOOTDELAY=1 CONFIG_USE_BOOTARGS=y diff --git a/configs/vexpress_ca9x4_defconfig b/configs/vexpress_ca9x4_defconfig index 83e15ddbe1..a70db03ea5 100644 --- a/configs/vexpress_ca9x4_defconfig +++ b/configs/vexpress_ca9x4_defconfig @@ -4,6 +4,8 @@ CONFIG_TARGET_VEXPRESS_CA9X4=y CONFIG_TEXT_BASE=0x60800000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60000f10 CONFIG_ENV_SIZE=0x40000 CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DM_GPIO=y @@ -11,8 +13,6 @@ CONFIG_DEFAULT_DEVICE_TREE="vexpress-v2p-ca9" CONFIG_SYS_LOAD_ADDR=0x90000000 CONFIG_ENV_ADDR=0x47F80000 CONFIG_DISTRO_DEFAULTS=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x60000f10 CONFIG_SYS_MONITOR_BASE=0x40000000 CONFIG_BOOTCOMMAND="run distro_bootcmd; run bootflash" CONFIG_DEFAULT_FDT_FILE="vexpress-v2p-ca9.dtb" diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig index 22883ea6eb..03c0a028aa 100644 --- a/configs/vinco_defconfig +++ b/configs/vinco_defconfig @@ -6,6 +6,8 @@ CONFIG_TEXT_BASE=0x20f00000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_TARGET_VINCO=y CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000f00 CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x10000 CONFIG_ENV_SECT_SIZE=0x1000 @@ -13,8 +15,6 @@ CONFIG_DEFAULT_DEVICE_TREE="at91-vinco" CONFIG_SYS_PROMPT="vinco => " CONFIG_SYS_LOAD_ADDR=0x22000000 CONFIG_ENV_VARS_UBOOT_CONFIG=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000f00 CONFIG_SPI_BOOT=y CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y diff --git a/configs/vyasa-rk3288_defconfig b/configs/vyasa-rk3288_defconfig index 47ccd708fc..dc173fbd01 100644 --- a/configs/vyasa-rk3288_defconfig +++ b/configs/vyasa-rk3288_defconfig @@ -7,17 +7,19 @@ CONFIG_SYS_ARCH_TIMER=y CONFIG_ARCH_ROCKCHIP=y CONFIG_TEXT_BASE=0x00100000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3288-vyasa" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3288=y CONFIG_TARGET_VYASA_RK3288=y CONFIG_SPL_STACK_R_ADDR=0x80000 +CONFIG_SPL_STACK=0xff718000 CONFIG_DEBUG_UART_BASE=0xff690000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x100000 CONFIG_SYS_MONITOR_LEN=614400 CONFIG_USE_PREBOOT=y CONFIG_DEFAULT_FDT_FILE="rk3288-vyasa.dtb" @@ -26,7 +28,6 @@ CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_PAD_TO=0x7f8000 CONFIG_SPL_NO_BSS_LIMIT=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xff718000 CONFIG_SPL_STACK_R=y CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000 CONFIG_SPL_OS_BOOT=y @@ -82,7 +83,6 @@ CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM=y CONFIG_SPL_RAM=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y diff --git a/configs/wandboard_defconfig b/configs/wandboard_defconfig index a6baff1e24..e418e4d207 100644 --- a/configs/wandboard_defconfig +++ b/configs/wandboard_defconfig @@ -27,7 +27,6 @@ CONFIG_SYS_MONITOR_LEN=409600 CONFIG_FIT=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_BOOTCOMMAND="run findfdt; run finduuid; run distro_bootcmd" # CONFIG_CONSOLE_MUX is not set CONFIG_SYS_CONSOLE_IS_IN_ENV=y diff --git a/configs/wetek-core2_defconfig b/configs/wetek-core2_defconfig index b730700630..f5149fc002 100644 --- a/configs/wetek-core2_defconfig +++ b/configs/wetek-core2_defconfig @@ -2,17 +2,18 @@ CONFIG_ARM=y CONFIG_ARCH_MESON=y CONFIG_TEXT_BASE=0x01000000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_ENV_SIZE=0x2000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="meson-gxm-wetek-core2" +CONFIG_DM_RESET=y CONFIG_MESON_GXM=y CONFIG_DEBUG_UART_BASE=0xc81004c0 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_IDENT_STRING=" wetek-core2" CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x20000000 CONFIG_REMAKE_ELF=y CONFIG_OF_BOARD_SETUP=y # CONFIG_DISPLAY_CPUINFO is not set @@ -46,7 +47,6 @@ CONFIG_POWER_DOMAIN=y CONFIG_MESON_GX_VPU_POWER_DOMAIN=y CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y -CONFIG_DM_RESET=y CONFIG_DEBUG_UART_ANNOUNCE=y CONFIG_DEBUG_UART_SKIP_INIT=y CONFIG_MESON_SERIAL=y diff --git a/configs/work_92105_defconfig b/configs/work_92105_defconfig index 167a07860f..9bc4f13c37 100644 --- a/configs/work_92105_defconfig +++ b/configs/work_92105_defconfig @@ -10,6 +10,8 @@ CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007ff20 CONFIG_TARGET_WORK_92105=y CONFIG_CMD_HD44760=y CONFIG_CMD_MAX6957=y @@ -17,11 +19,10 @@ CONFIG_ENV_SIZE=0x20000 CONFIG_ENV_OFFSET=0x100000 CONFIG_SPL_TEXT_BASE=0x00000000 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0xfff8 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0x120000 CONFIG_SYS_LOAD_ADDR=0x80008000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x8007ff20 CONFIG_SYS_MONITOR_LEN=262144 CONFIG_BOOTDELAY=3 CONFIG_USE_BOOTARGS=y @@ -34,7 +35,6 @@ CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfff8 CONFIG_SPL_NAND_SUPPORT=y CONFIG_SPL_NAND_DRIVERS=y CONFIG_SPL_NAND_BASE=y diff --git a/configs/x530_defconfig b/configs/x530_defconfig index 70c08adcde..68f8870eed 100644 --- a/configs/x530_defconfig +++ b/configs/x530_defconfig @@ -5,6 +5,8 @@ CONFIG_TEXT_BASE=0x00800000 CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_TARGET_X530=y CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 @@ -12,14 +14,13 @@ CONFIG_ENV_SECT_SIZE=0x40000 CONFIG_DEFAULT_DEVICE_TREE="armada-385-atl-x530" CONFIG_SPL_TEXT_BASE=0x40000030 CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0xf1012000 CONFIG_DEBUG_UART_CLOCK=250000000 CONFIG_SYS_LOAD_ADDR=0x1000000 CONFIG_ENV_ADDR=0x100000 CONFIG_DEBUG_UART=y -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xff0000 CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SILENT_CONSOLE=y @@ -34,7 +35,6 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 CONFIG_SPL_BOARD_INIT=y CONFIG_SPL_SYS_MALLOC_SIMPLE=y # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0x4002c000 CONFIG_SPL_WATCHDOG=y CONFIG_SYS_CBSIZE=256 CONFIG_SYS_PBSIZE=276 diff --git a/configs/xilinx_versal_mini_defconfig b/configs/xilinx_versal_mini_defconfig index 463aee410e..53376db9df 100644 --- a/configs/xilinx_versal_mini_defconfig +++ b/configs/xilinx_versal_mini_defconfig @@ -7,6 +7,8 @@ CONFIG_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MALLOC_LEN=0x2000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="versal-mini" CONFIG_SYS_PROMPT="Versal> " @@ -15,8 +17,6 @@ CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_LEGACY_IMAGE_FORMAT is not set diff --git a/configs/xilinx_versal_mini_emmc0_defconfig b/configs/xilinx_versal_mini_emmc0_defconfig index 29b868f275..31b3c02f73 100644 --- a/configs/xilinx_versal_mini_emmc0_defconfig +++ b/configs/xilinx_versal_mini_emmc0_defconfig @@ -7,13 +7,13 @@ CONFIG_TEXT_BASE=0x10000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc0" CONFIG_SYS_PROMPT="Versal> " # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x8000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_versal_mini_emmc1_defconfig b/configs/xilinx_versal_mini_emmc1_defconfig index 9f8fa4960d..5480cf1d9c 100644 --- a/configs/xilinx_versal_mini_emmc1_defconfig +++ b/configs/xilinx_versal_mini_emmc1_defconfig @@ -7,13 +7,13 @@ CONFIG_TEXT_BASE=0x10000 CONFIG_SYS_MALLOC_LEN=0x80000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="versal-mini-emmc1" CONFIG_SYS_PROMPT="Versal> " # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x8000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_versal_mini_ospi_defconfig b/configs/xilinx_versal_mini_ospi_defconfig index f9fdf61747..348c6e3f1a 100644 --- a/configs/xilinx_versal_mini_ospi_defconfig +++ b/configs/xilinx_versal_mini_ospi_defconfig @@ -6,6 +6,8 @@ CONFIG_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MALLOC_LEN=0x2000 CONFIG_SYS_MALLOC_F_LEN=0x500 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xFFFE0000 CONFIG_ENV_SIZE=0x80 # CONFIG_DM_GPIO is not set CONFIG_DEFAULT_DEVICE_TREE="versal-mini-ospi-single" @@ -14,8 +16,6 @@ CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_VERSAL_NO_DDR=y # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x8000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xFFFE0000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_versal_mini_qspi_defconfig b/configs/xilinx_versal_mini_qspi_defconfig index 9fc3eb69e7..bffc3b833d 100644 --- a/configs/xilinx_versal_mini_qspi_defconfig +++ b/configs/xilinx_versal_mini_qspi_defconfig @@ -5,6 +5,8 @@ CONFIG_ARCH_VERSAL=y CONFIG_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MALLOC_LEN=0x2000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xFFFE0000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="versal-mini-qspi-single" CONFIG_SYS_PROMPT="Versal> " @@ -12,8 +14,6 @@ CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_VERSAL_NO_DDR=y # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x8000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xFFFE0000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set diff --git a/configs/xilinx_versal_net_mini_defconfig b/configs/xilinx_versal_net_mini_defconfig index 0ff5268bc3..346df0cf23 100644 --- a/configs/xilinx_versal_net_mini_defconfig +++ b/configs/xilinx_versal_net_mini_defconfig @@ -9,6 +9,8 @@ CONFIG_TEXT_BASE=0xBBF10000 CONFIG_SYS_MALLOC_LEN=0x20000 CONFIG_SYS_MALLOC_F_LEN=0x4000 CONFIG_NR_DRAM_BANKS=3 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xBBF10000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="versal-net-mini" CONFIG_SYS_PROMPT="Versal NET> " @@ -17,8 +19,6 @@ CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_SYS_LOAD_ADDR=0xBBF00000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xBBF10000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_LEGACY_IMAGE_FORMAT is not set diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index 729c6ad450..0992643502 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -7,6 +7,7 @@ CONFIG_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x100000 CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-net-virt" CONFIG_SYS_PROMPT="Versal NET> " +CONFIG_DM_RESET=y CONFIG_CMD_FRU=y CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_SYS_MEMTEST_START=0x00000000 @@ -105,7 +106,6 @@ CONFIG_XILINX_AXIEMAC=y CONFIG_ZYNQ_GEM=y CONFIG_POWER_DOMAIN=y CONFIG_ZYNQMP_POWER_DOMAIN=y -CONFIG_DM_RESET=y CONFIG_RESET_ZYNQMP=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y diff --git a/configs/xilinx_versal_virt_defconfig b/configs/xilinx_versal_virt_defconfig index de74b70550..169cece4d3 100644 --- a/configs/xilinx_versal_virt_defconfig +++ b/configs/xilinx_versal_virt_defconfig @@ -7,6 +7,7 @@ CONFIG_TEXT_BASE=0x8000000 CONFIG_SYS_MALLOC_F_LEN=0x100000 CONFIG_DEFAULT_DEVICE_TREE="xilinx-versal-virt" CONFIG_SYS_PROMPT="Versal> " +CONFIG_DM_RESET=y CONFIG_ENV_OFFSET_REDUND=0x7F00000 CONFIG_CMD_FRU=y CONFIG_DEFINE_TCM_OCM_MMAP=y @@ -108,7 +109,6 @@ CONFIG_XILINX_AXIMRMAC=y CONFIG_ZYNQ_GEM=y CONFIG_POWER_DOMAIN=y CONFIG_ZYNQMP_POWER_DOMAIN=y -CONFIG_DM_RESET=y CONFIG_RESET_ZYNQMP=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y diff --git a/configs/xilinx_zynq_virt_defconfig b/configs/xilinx_zynq_virt_defconfig index 0ae771da81..cb10237e95 100644 --- a/configs/xilinx_zynq_virt_defconfig +++ b/configs/xilinx_zynq_virt_defconfig @@ -7,6 +7,7 @@ CONFIG_ENV_OFFSET=0xE00000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynq-zc706" CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL=y CONFIG_ENV_OFFSET_REDUND=0xE40000 CONFIG_CMD_FRU=y @@ -24,7 +25,6 @@ CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_PRINT=y CONFIG_SPL_LOAD_FIT=y CONFIG_SPL_LOAD_FIT_ADDRESS=0x10000000 -# CONFIG_USE_SPL_FIT_GENERATOR is not set CONFIG_LEGACY_IMAGE_FORMAT=y # CONFIG_ARCH_FIXUP_FDT_MEMORY is not set CONFIG_USE_PREBOOT=y @@ -34,7 +34,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x100000 CONFIG_SPL_BSS_MAX_SIZE=0x100000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SYS_SPL_MALLOC=y CONFIG_SYS_SPL_MALLOC_SIZE=0x2000000 diff --git a/configs/xilinx_zynqmp_mini_defconfig b/configs/xilinx_zynqmp_mini_defconfig index 9680d9b1c2..fe78c5df7c 100644 --- a/configs/xilinx_zynqmp_mini_defconfig +++ b/configs/xilinx_zynqmp_mini_defconfig @@ -4,6 +4,8 @@ CONFIG_SYS_ICACHE_OFF=y CONFIG_ARCH_ZYNQMP=y CONFIG_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MALLOC_LEN=0x1a00 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini" CONFIG_SYS_MEM_RSVD_FOR_MMU=y @@ -11,8 +13,6 @@ CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_SYS_LOAD_ADDR=0x8000000 CONFIG_SYS_MEMTEST_START=0x00000000 CONFIG_SYS_MEMTEST_END=0x00001000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000 CONFIG_REMAKE_ELF=y # CONFIG_LEGACY_IMAGE_FORMAT is not set # CONFIG_AUTOBOOT is not set diff --git a/configs/xilinx_zynqmp_mini_emmc0_defconfig b/configs/xilinx_zynqmp_mini_emmc0_defconfig index 93aaa9304b..54b22aefa1 100644 --- a/configs/xilinx_zynqmp_mini_emmc0_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc0_defconfig @@ -6,14 +6,15 @@ CONFIG_TEXT_BASE=0x10000 CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc0" +CONFIG_SPL_STACK=0xfffffffc CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000 CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y @@ -26,7 +27,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x20000000 diff --git a/configs/xilinx_zynqmp_mini_emmc1_defconfig b/configs/xilinx_zynqmp_mini_emmc1_defconfig index 81ea67aced..eb78e0a39f 100644 --- a/configs/xilinx_zynqmp_mini_emmc1_defconfig +++ b/configs/xilinx_zynqmp_mini_emmc1_defconfig @@ -6,14 +6,15 @@ CONFIG_TEXT_BASE=0x10000 CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_SYS_MALLOC_F_LEN=0x1000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-emmc1" +CONFIG_SPL_STACK=0xfffffffc CONFIG_SPL_SYS_MALLOC_F_LEN=0x600 CONFIG_SPL=y # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x10000 CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y @@ -26,7 +27,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x20000000 diff --git a/configs/xilinx_zynqmp_mini_nand_defconfig b/configs/xilinx_zynqmp_mini_nand_defconfig index 0e035348db..b0994913e0 100644 --- a/configs/xilinx_zynqmp_mini_nand_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_defconfig @@ -5,12 +5,12 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_TEXT_BASE=0x10000 CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40000 CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_nand_single_defconfig b/configs/xilinx_zynqmp_mini_nand_single_defconfig index 5255419c75..b49633c71e 100644 --- a/configs/xilinx_zynqmp_mini_nand_single_defconfig +++ b/configs/xilinx_zynqmp_mini_nand_single_defconfig @@ -5,12 +5,12 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_TEXT_BASE=0x10000 CONFIG_SYS_MALLOC_LEN=0x800000 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-nand" # CONFIG_CMD_ZYNQMP is not set CONFIG_SYS_LOAD_ADDR=0x8000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x40000 CONFIG_REMAKE_ELF=y # CONFIG_MP is not set CONFIG_FIT=y diff --git a/configs/xilinx_zynqmp_mini_qspi_defconfig b/configs/xilinx_zynqmp_mini_qspi_defconfig index 046cbcf30b..a1dbef9e7c 100644 --- a/configs/xilinx_zynqmp_mini_qspi_defconfig +++ b/configs/xilinx_zynqmp_mini_qspi_defconfig @@ -5,16 +5,17 @@ CONFIG_ARCH_ZYNQMP=y CONFIG_TEXT_BASE=0xFFFC0000 CONFIG_SYS_MALLOC_LEN=0x1b00 CONFIG_NR_DRAM_BANKS=1 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000 CONFIG_ENV_SIZE=0x80 CONFIG_DEFAULT_DEVICE_TREE="zynqmp-mini-qspi" +CONFIG_SPL_STACK=0xfffffffc CONFIG_SPL=y CONFIG_SYS_MEM_RSVD_FOR_MMU=y CONFIG_ZYNQMP_NO_DDR=y # CONFIG_CMD_ZYNQMP is not set # CONFIG_PSCI_RESET is not set CONFIG_SYS_LOAD_ADDR=0x8000000 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xfffe0000 # CONFIG_EXPERT is not set CONFIG_REMAKE_ELF=y # CONFIG_LEGACY_IMAGE_FORMAT is not set @@ -27,7 +28,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffffc CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0x20000000 diff --git a/configs/xilinx_zynqmp_virt_defconfig b/configs/xilinx_zynqmp_virt_defconfig index c40490a9f8..4d30f5fdb3 100644 --- a/configs/xilinx_zynqmp_virt_defconfig +++ b/configs/xilinx_zynqmp_virt_defconfig @@ -6,7 +6,9 @@ CONFIG_SYS_MALLOC_LEN=0x4040000 CONFIG_SYS_MALLOC_F_LEN=0x8000 CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="zynqmp-zcu100-revC" +CONFIG_DM_RESET=y CONFIG_SPL_STACK_R_ADDR=0x18000000 +CONFIG_SPL_STACK=0xfffffffc CONFIG_SPL_SIZE_LIMIT=0x2a000 CONFIG_SPL_SIZE_LIMIT_PROVIDE_STACK=0x0 CONFIG_SPL=y @@ -33,7 +35,6 @@ CONFIG_CLOCKS=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_BSS_MAX_SIZE=0x80000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffffc CONFIG_SPL_STACK_R=y CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y @@ -186,7 +187,6 @@ CONFIG_DM_REGULATOR=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_PWM=y CONFIG_PWM_CADENCE_TTC=y -CONFIG_DM_RESET=y CONFIG_RESET_ZYNQMP=y CONFIG_DM_RTC=y CONFIG_RTC_EMULATION=y diff --git a/configs/zynq_cse_nand_defconfig b/configs/zynq_cse_nand_defconfig index 74c35f3a4d..64cdffbb9a 100644 --- a/configs/zynq_cse_nand_defconfig +++ b/configs/zynq_cse_nand_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_MALLOC_LEN=0x8000 CONFIG_ENV_SIZE=0x190 CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nand" CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_REMAKE_ELF=y @@ -26,7 +27,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y diff --git a/configs/zynq_cse_nor_defconfig b/configs/zynq_cse_nor_defconfig index c194e89b7e..54620b2382 100644 --- a/configs/zynq_cse_nor_defconfig +++ b/configs/zynq_cse_nor_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_MALLOC_LEN=0x1000 CONFIG_ENV_SIZE=0x190 CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-nor" CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL=y CONFIG_SYS_LOAD_ADDR=0x0 CONFIG_REMAKE_ELF=y @@ -26,7 +27,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y diff --git a/configs/zynq_cse_qspi_defconfig b/configs/zynq_cse_qspi_defconfig index bebbb3435f..658b4e91ae 100644 --- a/configs/zynq_cse_qspi_defconfig +++ b/configs/zynq_cse_qspi_defconfig @@ -11,6 +11,7 @@ CONFIG_SYS_MALLOC_LEN=0x1000 CONFIG_ENV_SIZE=0x190 CONFIG_DEFAULT_DEVICE_TREE="zynq-cse-qspi-single" CONFIG_SPL_STACK_R_ADDR=0x200000 +CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL=y CONFIG_DEBUG_UART_BASE=0x0 CONFIG_DEBUG_UART_CLOCK=0 @@ -33,7 +34,6 @@ CONFIG_SPL_HAS_BSS_LINKER_SECTION=y CONFIG_SPL_BSS_START_ADDR=0x20000 CONFIG_SPL_BSS_MAX_SIZE=0x8000 # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK=0xfffffe00 CONFIG_SPL_STACK_R=y CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y -- cgit v1.2.3 From aa0a8a0be2401abbe26f4e5294a24216399c8291 Mon Sep 17 00:00:00 2001 From: Ulf Samuelsson Date: Tue, 7 Feb 2023 09:25:27 +0100 Subject: cpsw_mdio.c: Use correct reg in cpsw_mdio_get_alive cpsw_mdio_get_alive reads the wrong register. See page 2316 in SPRUH73Q AM335x TRM Signed-off-by: Ulf Samuelsson Cc: Joe Hershberger Cc: Ramon Fried Reviewed-by: Siddharth Vadapalli --- drivers/net/ti/cpsw_mdio.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/net/ti/cpsw_mdio.c b/drivers/net/ti/cpsw_mdio.c index a5ba73b739..ac791faa81 100644 --- a/drivers/net/ti/cpsw_mdio.c +++ b/drivers/net/ti/cpsw_mdio.c @@ -51,7 +51,7 @@ struct cpsw_mdio_regs { #define USERACCESS_PHY_REG_SHIFT (21) #define USERACCESS_PHY_ADDR_SHIFT (16) #define USERACCESS_DATA GENMASK(15, 0) - } user[0]; + } user[2]; }; #define CPSW_MDIO_DIV_DEF 0xff @@ -366,8 +366,8 @@ u32 cpsw_mdio_get_alive(struct mii_dev *bus) struct cpsw_mdio *mdio = bus->priv; u32 val; - val = readl(&mdio->regs->control); - return val & GENMASK(15, 0); + val = readl(&mdio->regs->alive); + return val & GENMASK(7, 0); } struct mii_dev *cpsw_mdio_init(const char *name, phys_addr_t mdio_base, -- cgit v1.2.3 From 3106e475243e1e35df18d5086f7a5df8758bbda1 Mon Sep 17 00:00:00 2001 From: Ivan Khoronzhuk Date: Fri, 27 Jan 2023 22:02:14 +0200 Subject: common: avb_verify: prevent opening incorrect session The arg->session is not valid if arg->ret != NULL, so can't be assigned, correct this. Signed-off-by: Ivan Khoronzhuk Reviewed-by: Jens Wiklander --- common/avb_verify.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/common/avb_verify.c b/common/avb_verify.c index 0520a71455..48ba8db51e 100644 --- a/common/avb_verify.c +++ b/common/avb_verify.c @@ -619,10 +619,11 @@ static int get_open_session(struct AvbOpsData *ops_data) memset(&arg, 0, sizeof(arg)); tee_optee_ta_uuid_to_octets(arg.uuid, &uuid); rc = tee_open_session(tee, &arg, 0, NULL); - if (!rc) { - ops_data->tee = tee; - ops_data->session = arg.session; - } + if (rc || arg.ret) + continue; + + ops_data->tee = tee; + ops_data->session = arg.session; } return 0; -- cgit v1.2.3 From 8c8153ead2bbcb2a62de1adcc115da851ae5e3a0 Mon Sep 17 00:00:00 2001 From: Yu Chien Peter Lin Date: Sun, 12 Feb 2023 15:09:51 +0800 Subject: doc: devicetree: dt_qemu.rst: Fix the typo and space Fix typo and whitespace in the document. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Heinrich Schuchardt --- doc/develop/devicetree/dt_qemu.rst | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/doc/develop/devicetree/dt_qemu.rst b/doc/develop/devicetree/dt_qemu.rst index c25c4fb053..8ba2b22559 100644 --- a/doc/develop/devicetree/dt_qemu.rst +++ b/doc/develop/devicetree/dt_qemu.rst @@ -13,7 +13,7 @@ When `CONFIG_OF_BOARD` is enabled Obtaining the QEMU devicetree ----------------------------- -Where QEMU generates its own devicetree to pass to U-Boot tou can use +Where QEMU generates its own devicetree to pass to U-Boot you can use `-dtb u-boot.dtb` to force QEMU to use U-Boot's in-tree version. To obtain the devicetree that qemu generates, add `-machine dumpdtb=qemu.dtb`, @@ -38,7 +38,7 @@ to produce a text file. It drops the duplicate header on the qemu one. Then it joins them up and runs them through dtc to compile the output:: qemu-system-arm -machine virt -machine dumpdtb=qemu.dtb - cat <(dtc -I dtb qemu.dtb) <(dtc -I dtb u-boot.dtb |grep -v /dts-v1/) |dtc - -o merged.dtb + cat <(dtc -I dtb qemu.dtb) <(dtc -I dtb u-boot.dtb | grep -v /dts-v1/) | dtc - -o merged.dtb You can then run qemu with the merged devicetree, e.g.:: -- cgit v1.2.3 From 34a1fee7565e46795c8f8404a0be68e928c1e63c Mon Sep 17 00:00:00 2001 From: Thomas Fitzsimmons Date: Mon, 13 Feb 2023 11:21:27 -0500 Subject: doc: board: bcm7xxx: Convert to reStructuredText format Convert the documentation for the Broadcom BCM7445 and BCM7260 boards to reStructuredText format and add the new filename to doc/board/broadcom/index.rst. Signed-off-by: Heinrich Schuchardt --- doc/README.bcm7xxx | 156 ----------------------------------- doc/board/broadcom/bcm7xxx.rst | 183 +++++++++++++++++++++++++++++++++++++++++ doc/board/broadcom/index.rst | 1 + 3 files changed, 184 insertions(+), 156 deletions(-) delete mode 100644 doc/README.bcm7xxx create mode 100644 doc/board/broadcom/bcm7xxx.rst diff --git a/doc/README.bcm7xxx b/doc/README.bcm7xxx deleted file mode 100644 index 6839da5f97..0000000000 --- a/doc/README.bcm7xxx +++ /dev/null @@ -1,156 +0,0 @@ -Summary -======= - -This document describes how to use U-Boot on the Broadcom 7445 SoC, as -a third stage bootloader loaded by Broadcom's BOLT bootloader. - -BOLT loads U-Boot as a generic ELF binary. Some U-Boot features such -as networking are not yet available but other important features are, -including: - - - ext4 file system traversal - - - support for loading FIT images - - - advanced scripting - - - support for FIT-provided DTBs instead of relying on the - BOLT-provided DTB - -A customized version of this port has been used in production. The -same approach may work on other BCM7xxx boards, with some -configuration adjustments and memory layout experimentation. - -Build -===== - -make bcm7445_defconfig -make -${CROSS_COMPILE}strip u-boot - -Run -=== - -To tell U-Boot which serial port to use for its console, set the -"stdout-path" property in the "/chosen" node of the BOLT-generated -device tree. For example: - -BOLT> dt add prop chosen stdout-path s serial0:115200n8 - -Flash the u-boot binary into board storage, then invoke it from BOLT. -For example: - -BOLT> boot -bsu -elf flash0.u-boot1 - -This port assumes that I-cache and D-cache are already enabled when -U-Boot is entered. - -Flattened Image Tree Support -============================ - -What follows is an example FIT image source file. Build it with: - -mkimage -f image.its image.itb - -Booting the resulting image.itb was tested on BOLT v1.20, with the -following kernels: - -https://github.com/Broadcom/stblinux-3.14 -https://github.com/Broadcom/stblinux-4.1 -https://github.com/Broadcom/stblinux-4.9 - -and with a generic ARMv7 root file system. - -image.its: -/dts-v1/; -/ { - description = "BCM7445 FIT"; - images { - kernel@1 { - description = "Linux kernel"; - /* - * This kernel image output format can be - * generated with: - * - * make vmlinux - * ${CROSS_COMPILE}objcopy -O binary -S vmlinux vmlinux.bin - * gzip -9 vmlinux.bin - * - * For stblinux-3.14, the specific Broadcom - * board type should be configured in the - * kernel, for example CONFIG_BCM7445D0=y. - */ - data = /incbin/(""); - type = "kernel"; - arch = "arm"; - os = "linux"; - compression = "gzip"; - load = <0x8000>; - entry = <0x8000>; - hash@1 { - algo = "sha256"; - }; - }; - ramdisk@1 { - description = "Initramfs root file system"; - data = /incbin/(""); - type = "ramdisk"; - arch = "arm"; - os = "linux"; - compression = "gzip"; - /* - * Set the environment variable initrd_high to - * 0xffffffff, and set "load" and "entry" here - * to 0x0 to keep initramfs in-place and to - * accommodate stblinux bmem/CMA reservations. - */ - load = <0x0>; - entry = <0x0>; - hash@1 { - algo = "sha256"; - }; - }; - fdt@1 { - description = "Device tree dumped from BOLT"; - /* - * This DTB should be similar to the - * BOLT-generated device tree, after BOLT has - * done its runtime modifications to it. For - * example, it can be dumped from within - * U-Boot (at ${fdtcontroladdr}), after BOLT - * has loaded U-Boot. The result can be added - * to the Linux source tree as a .dts file. - * - * To support modifications to the device tree - * in-place in U-Boot, add to Linux's - * arch/arm/boot/dts/Makefile: - * - * DTC_FLAGS ?= -p 4096 - * - * This will leave some padding in the DTB and - * thus reserve room for node additions. - * - * Also, set the environment variable fdt_high - * to 0xffffffff to keep the DTB in-place and - * to accommodate stblinux bmem/CMA - * reservations. - */ - data = /incbin/(".dtb"); - type = "flat_dt"; - arch = "arm"; - compression = "none"; - hash@1 { - algo = "sha256"; - }; - }; - }; - configurations { - default = "conf@bcm7445"; - conf@bcm7445 { - description = "BCM7445 configuration"; - kernel = "kernel@1"; - ramdisk = "ramdisk@1"; - fdt = "fdt@1"; - }; - }; -}; diff --git a/doc/board/broadcom/bcm7xxx.rst b/doc/board/broadcom/bcm7xxx.rst new file mode 100644 index 0000000000..f1994d9f97 --- /dev/null +++ b/doc/board/broadcom/bcm7xxx.rst @@ -0,0 +1,183 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (C) 2018, 2023 Thomas Fitzsimmons + +BCM7445 and BCM7260 +=================== + +This document describes how to use U-Boot on the Broadcom 7445 and +Broadcom 7260 SoC, as a third stage bootloader loaded by Broadcom's +BOLT bootloader. + +BOLT loads U-Boot as a generic ELF binary. Some U-Boot features such +as networking are not implemented but other important features are, +including: + +* ext4 file system traversal +* support for loading FIT images +* advanced scripting +* support for FIT-provided DTBs instead of relying on the BOLT-provided DTB + +A customized version of this port has been used in production. The +same approach may work on other BCM7xxx boards, with some +configuration adjustments and memory layout experimentation. + +Configure +--------- + +BCM7445 +^^^^^^^ + +.. code-block:: console + + $ make bcm7445_defconfig + +BCM7260 +^^^^^^^ + +.. code-block:: console + + $ make bcm7260_defconfig + +Build +----- + +.. code-block:: console + + $ make + $ ${CROSS_COMPILE}strip u-boot + +Run +--- + +To tell U-Boot which serial port to use for its console, set the +``stdout-path`` property in the ``/chosen`` node of the BOLT-generated +device tree. For example: + +:: + + BOLT> dt add prop chosen stdout-path s serial0:115200n8 + +Flash the ``u-boot`` binary into board storage, then invoke it from +BOLT. For example: + +:: + + BOLT> boot -bsu -elf flash0.u-boot1 + +This port assumes that I-cache and D-cache are already enabled when +U-Boot is entered. + +Flattened Image Tree Support +---------------------------- + +What follows is an example FIT image source file. Build it with: + +.. code-block:: console + + $ mkimage -f image.its image.itb + +Booting the resulting ``image.itb`` was tested on BOLT v1.20, with the +following kernels: + +* https://github.com/Broadcom/stblinux-3.14 +* https://github.com/Broadcom/stblinux-4.1 +* https://github.com/Broadcom/stblinux-4.9 + +and with a generic ARMv7 root file system. + +**image.its** + +:: + + /dts-v1/; + / { + description = "BCM7445 FIT"; + images { + kernel@1 { + description = "Linux kernel"; + /* + * This kernel image output format can be + * generated with: + * + * make vmlinux + * ${CROSS_COMPILE}objcopy -O binary -S vmlinux vmlinux.bin + * gzip -9 vmlinux.bin + * + * For stblinux-3.14, the specific Broadcom + * board type should be configured in the + * kernel, for example CONFIG_BCM7445D0=y. + */ + data = /incbin/(""); + type = "kernel"; + arch = "arm"; + os = "linux"; + compression = "gzip"; + load = <0x8000>; + entry = <0x8000>; + hash@1 { + algo = "sha256"; + }; + }; + ramdisk@1 { + description = "Initramfs root file system"; + data = /incbin/(""); + type = "ramdisk"; + arch = "arm"; + os = "linux"; + compression = "gzip"; + /* + * Set the environment variable initrd_high to + * 0xffffffff, and set "load" and "entry" here + * to 0x0 to keep initramfs in-place and to + * accommodate stblinux bmem/CMA reservations. + */ + load = <0x0>; + entry = <0x0>; + hash@1 { + algo = "sha256"; + }; + }; + fdt@1 { + description = "Device tree dumped from BOLT"; + /* + * This DTB should be similar to the + * BOLT-generated device tree, after BOLT has + * done its runtime modifications to it. For + * example, it can be dumped from within + * U-Boot (at ${fdtcontroladdr}), after BOLT + * has loaded U-Boot. The result can be added + * to the Linux source tree as a .dts file. + * + * To support modifications to the device tree + * in-place in U-Boot, add to Linux's + * arch/arm/boot/dts/Makefile: + * + * DTC_FLAGS ?= -p 4096 + * + * This will leave some padding in the DTB and + * thus reserve room for node additions. + * + * Also, set the environment variable fdt_high + * to 0xffffffff to keep the DTB in-place and + * to accommodate stblinux bmem/CMA + * reservations. + */ + data = /incbin/(".dtb"); + type = "flat_dt"; + arch = "arm"; + compression = "none"; + hash@1 { + algo = "sha256"; + }; + }; + }; + configurations { + default = "conf@bcm7445"; + conf@bcm7445 { + description = "BCM7445 configuration"; + kernel = "kernel@1"; + ramdisk = "ramdisk@1"; + fdt = "fdt@1"; + }; + }; + }; diff --git a/doc/board/broadcom/index.rst b/doc/board/broadcom/index.rst index 4f0e825fef..a56bd1f069 100644 --- a/doc/board/broadcom/index.rst +++ b/doc/board/broadcom/index.rst @@ -7,4 +7,5 @@ Broadcom .. toctree:: :maxdepth: 2 + bcm7xxx raspberrypi -- cgit v1.2.3 From 98382917d7924435f354567def119e55e84e2ba3 Mon Sep 17 00:00:00 2001 From: Tim Harvey Date: Mon, 13 Feb 2023 09:44:27 -0800 Subject: board: gateworks: venice: move README to RST Move board/gateworks/venice/README to RST documentation. Signed-off-by: Tim Harvey --- board/gateworks/venice/MAINTAINERS | 1 + board/gateworks/venice/README | 35 ------------------------ doc/board/gateworks/imx8mm_venice.rst | 50 +++++++++++++++++++++++++++++++++++ doc/board/gateworks/imx8mn_venice.rst | 50 +++++++++++++++++++++++++++++++++++ doc/board/gateworks/imx8mp_venice.rst | 50 +++++++++++++++++++++++++++++++++++ doc/board/gateworks/index.rst | 11 ++++++++ doc/board/index.rst | 1 + 7 files changed, 163 insertions(+), 35 deletions(-) delete mode 100644 board/gateworks/venice/README create mode 100644 doc/board/gateworks/imx8mm_venice.rst create mode 100644 doc/board/gateworks/imx8mn_venice.rst create mode 100644 doc/board/gateworks/imx8mp_venice.rst create mode 100644 doc/board/gateworks/index.rst diff --git a/board/gateworks/venice/MAINTAINERS b/board/gateworks/venice/MAINTAINERS index cfdea0cb8a..01a47a15d6 100644 --- a/board/gateworks/venice/MAINTAINERS +++ b/board/gateworks/venice/MAINTAINERS @@ -3,5 +3,6 @@ M: Tim Harvey S: Maintained F: arch/arm/dts/imx8m*-venice* F: board/gateworks/venice/ +F: doc/board/gateworks/*venice* F: include/configs/imx8m*_venice.h F: configs/imx8m*_venice_defconfig diff --git a/board/gateworks/venice/README b/board/gateworks/venice/README deleted file mode 100644 index ea9b8348a7..0000000000 --- a/board/gateworks/venice/README +++ /dev/null @@ -1,35 +0,0 @@ -U-Boot for the Gateworks i.MX8M Mini Venice Development Kit boards - -Quick Start -=========== -- Build the ARM Trusted firmware binary -- Get ddr firmware -- Build U-Boot -- Flash to eMMC -- Boot - -Get and Build the ARM Trusted firmware -====================================== -$ git clone https://github.com/nxp-imx/imx-atf -$ git checkout imx_5.4.47_2.2.0 -$ make PLAT=imx8mm CROSS_COMPILE=aarch64-linux-gnu- bl31 -$ cp build/imx8mm/release/bl31.bin . - -Get the DDR Firmware -==================== -$ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin -$ chmod +x firmware-imx-8.9.bin -$ ./firmware-imx-8.9.bin -$ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin . - -Build U-Boot -============ -$ make imx8mm_venice_defconfig -$ make CROSS_COMPILE=aarch64-linux-gnu- - -Update eMMC -=========== -=> tftpboot $loadaddr flash.bin -=> setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200 -=> mmc dev 2 && mmc write $loadaddr 0x42 $blkcnt # for IMX8MM -=> mmc dev 2 && mmc write $loadaddr 0x40 $blkcnt # for IMX8MN diff --git a/doc/board/gateworks/imx8mm_venice.rst b/doc/board/gateworks/imx8mm_venice.rst new file mode 100644 index 0000000000..f1e7e49944 --- /dev/null +++ b/doc/board/gateworks/imx8mm_venice.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mm_venice +============= + +U-Boot for the Gateworks i.MX8M Mini Venice Development Kit boards + +Quick Start +----------- +- Build the ARM Trusted firmware binary +- Get DDR firmware +- Build U-Boot +- Flash to eMMC +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone https://github.com/nxp-imx/imx-atf.git -b lf_v2.4 + $ make PLAT=imx8mm bl31 CROSS_COMPILE=aarch64-linux-gnu- + $ cp build/imx8mm/release/bl31.bin . + +Get the DDR Firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin + $ chmod +x firmware-imx-8.9.bin + $ ./firmware-imx-8.9.bin + $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot +------------ + +.. code-block:: bash + + $ make imx8mm_venice_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- + +Update eMMC +----------- + +.. code-block:: bash + + => tftpboot $loadaddr flash.bin + => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200 + => mmc dev 2 && mmc write $loadaddr 0x42 $blkcnt diff --git a/doc/board/gateworks/imx8mn_venice.rst b/doc/board/gateworks/imx8mn_venice.rst new file mode 100644 index 0000000000..7ba953a4a8 --- /dev/null +++ b/doc/board/gateworks/imx8mn_venice.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mn_venice +============= + +U-Boot for the Gateworks i.MX8M Nano Venice Development Kit boards + +Quick Start +----------- +- Build the ARM Trusted firmware binary +- Get DDR firmware +- Build U-Boot +- Flash to eMMC +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone https://github.com/nxp-imx/imx-atf.git -b lf_v2.4 + $ make PLAT=imx8mn bl31 CROSS_COMPILE=aarch64-linux-gnu- + $ cp build/imx8mn/release/bl31.bin . + +Get the DDR Firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin + $ chmod +x firmware-imx-8.9.bin + $ ./firmware-imx-8.9.bin + $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot +------------ + +.. code-block:: bash + + $ make imx8mn_venice_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- + +Update eMMC +----------- + +.. code-block:: bash + + => tftpboot $loadaddr flash.bin + => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200 + => mmc dev 2 && mmc write $loadaddr 0x40 $blkcnt diff --git a/doc/board/gateworks/imx8mp_venice.rst b/doc/board/gateworks/imx8mp_venice.rst new file mode 100644 index 0000000000..632cd742d1 --- /dev/null +++ b/doc/board/gateworks/imx8mp_venice.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +imx8mp_venice +============= + +U-Boot for the Gateworks i.MX8M Plus Venice Development Kit boards + +Quick Start +----------- +- Build the ARM Trusted firmware binary +- Get DDR firmware +- Build U-Boot +- Flash to eMMC +- Boot + +Get and Build the ARM Trusted firmware +-------------------------------------- + +.. code-block:: bash + + $ git clone https://github.com/nxp-imx/imx-atf.git -b lf_v2.4 + $ make PLAT=imx8mp bl31 CROSS_COMPILE=aarch64-linux-gnu- + $ cp build/imx8mp/release/bl31.bin . + +Get the DDR Firmware +-------------------- + +.. code-block:: bash + + $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.9.bin + $ chmod +x firmware-imx-8.9.bin + $ ./firmware-imx-8.9.bin + $ cp firmware-imx-8.9/firmware/ddr/synopsys/lpddr4*.bin . + +Build U-Boot +------------ + +.. code-block:: bash + + $ make imx8mp_venice_defconfig + $ make CROSS_COMPILE=aarch64-linux-gnu- + +Update eMMC +----------- + +.. code-block:: bash + + => tftpboot $loadaddr flash.bin + => setexpr blkcnt $filesize + 0x1ff && setexpr blkcnt $blkcnt / 0x200 + => mmc dev 2 && mmc write $loadaddr 0x40 $blkcnt diff --git a/doc/board/gateworks/index.rst b/doc/board/gateworks/index.rst new file mode 100644 index 0000000000..6cf0839814 --- /dev/null +++ b/doc/board/gateworks/index.rst @@ -0,0 +1,11 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Gateworks +========= + +.. toctree:: + :maxdepth: 2 + + imx8mm_venice + imx8mn_venice + imx8mp_venice diff --git a/doc/board/index.rst b/doc/board/index.rst index 1e628e99e6..618d22e616 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -20,6 +20,7 @@ Board-specific doc congatec/index coreboot/index emulation/index + gateworks/index google/index highbank/index intel/index -- cgit v1.2.3 From 093ff96e741d5754e2c895a367fce06ae4464d16 Mon Sep 17 00:00:00 2001 From: Yu Chien Peter Lin Date: Tue, 14 Feb 2023 18:18:51 +0800 Subject: doc: arch: Add document for RISC-V architecture This patch adds a brief introduction to the RISC-V architecture and the typical boot process used on a variety of RISC-V platforms. Signed-off-by: Yu Chien Peter Lin Reviewed-by: Samuel Holland Reviewed-by: Simon Glass Reviewed-by: Rick Chen Reviewed-by: Heinrich Schuchardt --- MAINTAINERS | 1 + doc/arch/index.rst | 1 + doc/arch/riscv.rst | 81 ++++++++++++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 83 insertions(+) create mode 100644 doc/arch/riscv.rst diff --git a/MAINTAINERS b/MAINTAINERS index 6f53f9c2f6..41c9f265f8 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1298,6 +1298,7 @@ S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-riscv.git F: arch/riscv/ F: cmd/riscv/ +F: doc/arch/riscv.rst F: doc/usage/sbi.rst F: drivers/sysreset/sysreset_sbi.c F: drivers/timer/andes_plmt_timer.c diff --git a/doc/arch/index.rst b/doc/arch/index.rst index b3e85f9bf3..b8da4b8c8e 100644 --- a/doc/arch/index.rst +++ b/doc/arch/index.rst @@ -11,6 +11,7 @@ Architecture-specific doc m68k mips nios2 + riscv sandbox/index sh x86 diff --git a/doc/arch/riscv.rst b/doc/arch/riscv.rst new file mode 100644 index 0000000000..af0c48b898 --- /dev/null +++ b/doc/arch/riscv.rst @@ -0,0 +1,81 @@ +.. SPDX-License-Identifier: GPL-2.0+ +.. Copyright (C) 2023, Yu Chien Peter Lin + +RISC-V +====== + +Overview +-------- + +This document outlines the U-Boot boot process for the RISC-V architecture. +RISC-V is an open-source instruction set architecture (ISA) based on the +principles of reduced instruction set computing (RISC). It has been designed +to be flexible and customizable, allowing it to be adapted to different use +cases, from embedded systems to high performance servers. + +Typical Boot Process +-------------------- + +U-Boot can run in either M-mode or S-mode, depending on whether it runs before +the initialization of the firmware providing SBI (Supervisor Binary Interface). +The firmware is necessary in the RISC-V boot process as it serves as a SEE +(Supervisor Execution Environment) to handle exceptions for the S-mode U-Boot +or Operating System. + +In between the boot phases, the hartid is passed through the a0 register, and +the start address of the devicetree is passed through the a1 register. + +As a reference, OpenSBI is an SBI implementation that can be used with U-Boot +in different modes, see the +`OpenSBI firmware document `_ +for more details. + +M-mode U-Boot +^^^^^^^^^^^^^ + +When running in M-mode U-Boot, it will load the payload image (e.g. +`fw_payload `_) +which contains the firmware and the S-mode Operating System; in this case, you +can use mkimage to package the payload image into an uImage format, and boot it +using the bootm command. + +The following diagram illustrates the boot process:: + + <-----------( M-mode )----------><--( S-mode )--> + +----------+ +--------------+ +------------+ + | U-Boot |-->| SBI firmware |--->| OS | + +----------+ +--------------+ +------------+ + +To examine the boot process with the QEMU virt machine, you can follow the +steps in the "Building U-Boot" section of the following document: +:doc:`../board/emulation/qemu-riscv`. + +S-mode U-Boot +^^^^^^^^^^^^^ + +RISC-V production boot images may include a U-Boot SPL for platform-specific +initialization. The U-Boot SPL then loads a FIT image (u-boot.itb), which +contains a firmware (e.g. +`fw_dynamic `_) +providing the SBI, as well as a regular U-Boot (or U-Boot proper) running in +S-mode. Finally, the S-mode Operating +System is loaded. + +The following diagram illustrates the boot process:: + + <-------------( M-mode )----------><----------( S-mode )-------> + +------------+ +--------------+ +----------+ +----------+ + | U-Boot SPL |-->| SBI firmware |--->| U-Boot |-->| OS | + +------------+ +--------------+ +----------+ +----------+ + +To examine the boot process with the QEMU virt machine, you can follow the +steps in the "Running U-Boot SPL" section of the following document: +:doc:`../board/emulation/qemu-riscv`. + +Toolchain +--------- + +You can build the +`RISC-V GNU toolchain `_ +from scratch, or download a pre-built toolchain from the +`releases page `_. -- cgit v1.2.3 From 67af329a741b546986be2f3b18933f8c8b373bed Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Mon, 13 Feb 2023 19:22:33 +0100 Subject: efi_loader: avoid buffer overrun in efi_var_mem_compare We should not scan beyond the end of string name. Signed-off-by: Heinrich Schuchardt --- lib/efi_loader/efi_var_mem.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/lib/efi_loader/efi_var_mem.c b/lib/efi_loader/efi_var_mem.c index e1058e3c6a..d6b65aed12 100644 --- a/lib/efi_loader/efi_var_mem.c +++ b/lib/efi_loader/efi_var_mem.c @@ -41,11 +41,13 @@ efi_var_mem_compare(struct efi_var_entry *var, const efi_guid_t *guid, i < sizeof(efi_guid_t) && match; ++i) match = (guid1[i] == guid2[i]); - for (data = var->name, var_name = name;; ++data, ++var_name) { + for (data = var->name, var_name = name;; ++data) { if (match) match = (*data == *var_name); if (!*data) break; + if (*var_name) + ++var_name; } ++data; -- cgit v1.2.3 From a135320b428a09b7856bb06c248eca0ffffb60f5 Mon Sep 17 00:00:00 2001 From: Masahisa Kojima Date: Wed, 15 Feb 2023 11:32:17 +0900 Subject: efi_loader: fix wrong attribute check for QueryVariableInfo QueryVariableInfo with EFI_VARIABLE_HARDWARE_ERROR_RECORD is accepted, remove wrong attribute check. Fixes: 454a9442fbce ("efi_loader: update attribute check for QueryVariableInfo()") Signed-off-by: Masahisa Kojima Reviewed-by: Heinrich Schuchardt --- lib/efi_loader/efi_variable.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/lib/efi_loader/efi_variable.c b/lib/efi_loader/efi_variable.c index 4c85cfa607..5804f69954 100644 --- a/lib/efi_loader/efi_variable.c +++ b/lib/efi_loader/efi_variable.c @@ -366,9 +366,6 @@ efi_status_t efi_query_variable_info_int(u32 attributes, EFI_VARIABLE_RUNTIME_ACCESS) return EFI_INVALID_PARAMETER; - if (attributes & EFI_VARIABLE_HARDWARE_ERROR_RECORD) - return EFI_UNSUPPORTED; - if (attributes & ~(u32)EFI_VARIABLE_MASK) return EFI_INVALID_PARAMETER; -- cgit v1.2.3 From aa2d3945ce6df43903d76cadde1c0669d6d5d43b Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Thu, 16 Feb 2023 17:29:48 +0100 Subject: efi_loader: Measure the loaded DTB Measures the DTB passed to the EFI application upon new boolean config switch CONFIG_EFI_TCG2_PROTOCOL_MEASURE_DTB. For platforms where the content of the DTB passed to the OS can change across reboots, there is not point measuring it hence the config switch to allow platform to not embed this feature. Co-developed-by: Ilias Apalodimas Signed-off-by: Ilias Apalodimas Signed-off-by: Etienne Carriere Tested-by: Ilias Apalodimas Reviewed-by: Ilias Apalodimas --- cmd/bootefi.c | 8 ++++++ include/efi_loader.h | 2 ++ include/efi_tcg2.h | 10 +++++++ include/tpm-v2.h | 2 ++ lib/efi_loader/Kconfig | 11 +++++++ lib/efi_loader/efi_tcg2.c | 73 +++++++++++++++++++++++++++++++++++++++++++++++ 6 files changed, 106 insertions(+) diff --git a/cmd/bootefi.c b/cmd/bootefi.c index 2a7d42925d..6618335ddf 100644 --- a/cmd/bootefi.c +++ b/cmd/bootefi.c @@ -332,6 +332,14 @@ efi_status_t efi_install_fdt(void *fdt) efi_try_purge_kaslr_seed(fdt); + if (CONFIG_IS_ENABLED(EFI_TCG2_PROTOCOL_MEASURE_DTB)) { + ret = efi_tcg2_measure_dtb(fdt); + if (ret == EFI_SECURITY_VIOLATION) { + log_err("ERROR: failed to measure DTB\n"); + return ret; + } + } + /* Install device tree as UEFI table */ ret = efi_install_configuration_table(&efi_guid_fdt, fdt); if (ret != EFI_SUCCESS) { diff --git a/include/efi_loader.h b/include/efi_loader.h index c664d6cdf2..1542b4b625 100644 --- a/include/efi_loader.h +++ b/include/efi_loader.h @@ -531,6 +531,8 @@ efi_status_t efi_tcg2_notify_exit_boot_services_failed(void); efi_status_t efi_tcg2_measure_efi_app_invocation(struct efi_loaded_image_obj *handle); /* Measure efi application exit */ efi_status_t efi_tcg2_measure_efi_app_exit(void); +/* Measure DTB */ +efi_status_t efi_tcg2_measure_dtb(void *dtb); /* Called by bootefi to initialize root node */ efi_status_t efi_root_node_register(void); /* Called by bootefi to initialize runtime */ diff --git a/include/efi_tcg2.h b/include/efi_tcg2.h index 874306dc11..b1c3abd097 100644 --- a/include/efi_tcg2.h +++ b/include/efi_tcg2.h @@ -233,6 +233,16 @@ struct efi_gpt_data { gpt_entry partitions[]; } __packed; +/** + * struct tdUEFI_PLATFORM_FIRMWARE_BLOB2 + * @blob_description_size: Byte size of @data + * @data: Description data + */ +struct uefi_platform_firmware_blob2 { + u8 blob_description_size; + u8 data[]; +} __packed; + struct efi_tcg2_protocol { efi_status_t (EFIAPI * get_capability)(struct efi_tcg2_protocol *this, struct efi_tcg2_boot_service_capability *capability); diff --git a/include/tpm-v2.h b/include/tpm-v2.h index 737e57551d..2df3dad553 100644 --- a/include/tpm-v2.h +++ b/include/tpm-v2.h @@ -105,6 +105,8 @@ struct udevice; "Exit Boot Services Returned with Failure" #define EFI_EXIT_BOOT_SERVICES_SUCCEEDED \ "Exit Boot Services Returned with Success" +#define EFI_DTB_EVENT_STRING \ + "DTB DATA" /* TPMS_TAGGED_PROPERTY Structure */ struct tpms_tagged_property { diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index c56904afc2..c05a54df16 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -346,6 +346,17 @@ config EFI_TCG2_PROTOCOL_EVENTLOG_SIZE this is going to be allocated twice. One for the eventlog it self and one for the configuration table that is required from the spec +config EFI_TCG2_PROTOCOL_MEASURE_DTB + bool "Measure DTB with EFI_TCG2_PROTOCOL" + depends on EFI_TCG2_PROTOCOL + help + When enabled, the DTB image passed to the booted EFI image is + measured using the EFI TCG2 protocol. Do not enable this feature if + the passed DTB contains data that change across platform reboots + and cannot be used has a predictable measurement. Otherwise + this feature allows better measurement of the system boot + sequence. + config EFI_LOAD_FILE2_INITRD bool "EFI_FILE_LOAD2_PROTOCOL for Linux initial ramdisk" default y diff --git a/lib/efi_loader/efi_tcg2.c b/lib/efi_loader/efi_tcg2.c index 918e9a2686..2dcc317157 100644 --- a/lib/efi_loader/efi_tcg2.c +++ b/lib/efi_loader/efi_tcg2.c @@ -2175,6 +2175,79 @@ out1: return ret; } +/* Return the byte size of reserved map area in DTB or -1 upon error */ +static ssize_t size_of_rsvmap(void *dtb) +{ + struct fdt_reserve_entry e; + ssize_t size_max; + ssize_t size; + u8 *rsvmap_base; + + rsvmap_base = (u8 *)dtb + fdt_off_mem_rsvmap(dtb); + size_max = fdt_totalsize(dtb) - fdt_off_mem_rsvmap(dtb); + size = 0; + + do { + memcpy(&e, rsvmap_base + size, sizeof(e)); + size += sizeof(e); + if (size > size_max) + return -1; + } while (e.size); + + return size; +} + +/** + * efi_tcg2_measure_dtb() - measure DTB passed to the OS + * + * @dtb: pointer to the device tree blob + * + * Return: status code + */ +efi_status_t efi_tcg2_measure_dtb(void *dtb) +{ + struct uefi_platform_firmware_blob2 *blob; + struct fdt_header *header; + sha256_context hash_ctx; + struct udevice *dev; + ssize_t rsvmap_size; + efi_status_t ret; + u32 event_size; + + if (!is_tcg2_protocol_installed()) + return EFI_SUCCESS; + + ret = platform_get_tpm2_device(&dev); + if (ret != EFI_SUCCESS) + return EFI_SECURITY_VIOLATION; + + rsvmap_size = size_of_rsvmap(dtb); + if (rsvmap_size < 0) + return EFI_SECURITY_VIOLATION; + + event_size = sizeof(*blob) + sizeof(EFI_DTB_EVENT_STRING) + SHA256_SUM_LEN; + blob = calloc(1, event_size); + if (!blob) + return EFI_OUT_OF_RESOURCES; + + blob->blob_description_size = sizeof(EFI_DTB_EVENT_STRING); + memcpy(blob->data, EFI_DTB_EVENT_STRING, blob->blob_description_size); + + /* Measure populated areas of the DTB */ + header = dtb; + sha256_starts(&hash_ctx); + sha256_update(&hash_ctx, (u8 *)header, sizeof(struct fdt_header)); + sha256_update(&hash_ctx, (u8 *)dtb + fdt_off_dt_struct(dtb), fdt_size_dt_strings(dtb)); + sha256_update(&hash_ctx, (u8 *)dtb + fdt_off_dt_strings(dtb), fdt_size_dt_struct(dtb)); + sha256_update(&hash_ctx, (u8 *)dtb + fdt_off_mem_rsvmap(dtb), rsvmap_size); + sha256_finish(&hash_ctx, blob->data + blob->blob_description_size); + + ret = tcg2_measure_event(dev, 0, EV_POST_CODE, event_size, (u8 *)blob); + + free(blob); + return ret; +} + /** * efi_tcg2_measure_efi_app_invocation() - measure efi app invocation * -- cgit v1.2.3 From 4429393b5a41557c744b1fab912a32b34bee8d38 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Thu, 16 Feb 2023 18:21:41 +0100 Subject: efi_loader: set CapsuleMax from CONFIG_EFI_CAPSULE_MAX Adds CONFIG_EFI_CAPSULE_MAX to configure the max index value used in EFI capsule reports. Prior to this change is the hard coded value was 65535 which would exceed available storage for variables. Now the default value is 15 which should work fine with most systems. Signed-off-by: Etienne Carriere --- lib/efi_loader/Kconfig | 8 ++++++++ lib/efi_loader/efi_capsule.c | 48 +++++++++++++++++++++++++++++++------------- lib/efi_loader/efi_setup.c | 7 ++++++- 3 files changed, 48 insertions(+), 15 deletions(-) diff --git a/lib/efi_loader/Kconfig b/lib/efi_loader/Kconfig index c05a54df16..c5835e6ef6 100644 --- a/lib/efi_loader/Kconfig +++ b/lib/efi_loader/Kconfig @@ -226,6 +226,14 @@ config EFI_CAPSULE_AUTHENTICATE Select this option if you want to enable capsule authentication +config EFI_CAPSULE_MAX + int "Max value for capsule index" + default 15 + range 0 65535 + help + Select the max capsule index value used for capsule report + variables. This value is used to create CapsuleMax variable. + config EFI_DEVICE_PATH_TO_TEXT bool "Device path to text protocol" default y diff --git a/lib/efi_loader/efi_capsule.c b/lib/efi_loader/efi_capsule.c index 0997cd248f..d5d3ede7ae 100644 --- a/lib/efi_loader/efi_capsule.c +++ b/lib/efi_loader/efi_capsule.c @@ -45,17 +45,7 @@ const efi_guid_t fwu_guid_os_request_fw_accept = static struct efi_file_handle *bootdev_root; #endif -/** - * get_last_capsule - get the last capsule index - * - * Retrieve the index of the capsule invoked last time from "CapsuleLast" - * variable. - * - * Return: - * * > 0 - the last capsule index invoked - * * 0xffff - on error, or no capsule invoked yet - */ -static __maybe_unused unsigned int get_last_capsule(void) +static __maybe_unused unsigned int get_capsule_index(const u16 *variable_name) { u16 value16[11]; /* "CapsuleXXXX": non-null-terminated */ char value[5]; @@ -65,7 +55,7 @@ static __maybe_unused unsigned int get_last_capsule(void) int i; size = sizeof(value16); - ret = efi_get_variable_int(u"CapsuleLast", &efi_guid_capsule_report, + ret = efi_get_variable_int(variable_name, &efi_guid_capsule_report, NULL, &size, value16, NULL); if (ret != EFI_SUCCESS || size != 22 || u16_strncmp(value16, u"Capsule", 7)) @@ -84,6 +74,35 @@ err: return index; } +/** + * get_last_capsule - get the last capsule index + * + * Retrieve the index of the capsule invoked last time from "CapsuleLast" + * variable. + * + * Return: + * * > 0 - the last capsule index invoked + * * 0xffff - on error, or no capsule invoked yet + */ +static __maybe_unused unsigned int get_last_capsule(void) +{ + return get_capsule_index(u"CapsuleLast"); +} + +/** + * get_max_capsule - get the max capsule index + * + * Retrieve the max capsule index value from "CapsuleMax" variable. + * + * Return: + * * > 0 - the max capsule index + * * 0xffff - on error, or "CapsuleMax" variable does not exist + */ +static __maybe_unused unsigned int get_max_capsule(void) +{ + return get_capsule_index(u"CapsuleMax"); +} + /** * set_capsule_result - set a result variable * @capsule: Capsule @@ -1290,7 +1309,7 @@ efi_status_t efi_launch_capsules(void) { struct efi_capsule_header *capsule = NULL; u16 **files; - unsigned int nfiles, index, i; + unsigned int nfiles, index, index_max, i; efi_status_t ret; bool capsule_update = true; bool update_status = true; @@ -1299,6 +1318,7 @@ efi_status_t efi_launch_capsules(void) if (check_run_capsules() != EFI_SUCCESS) return EFI_SUCCESS; + index_max = get_max_capsule(); index = get_last_capsule(); /* @@ -1317,7 +1337,7 @@ efi_status_t efi_launch_capsules(void) /* Launch capsules */ for (i = 0, ++index; i < nfiles; i++, index++) { log_debug("Applying %ls\n", files[i]); - if (index > 0xffff) + if (index > index_max) index = 0; ret = efi_capsule_read_file(files[i], &capsule); if (ret == EFI_SUCCESS) { diff --git a/lib/efi_loader/efi_setup.c b/lib/efi_loader/efi_setup.c index 69aaefab63..58d4e13402 100644 --- a/lib/efi_loader/efi_setup.c +++ b/lib/efi_loader/efi_setup.c @@ -130,12 +130,17 @@ static efi_status_t efi_init_capsule(void) efi_status_t ret = EFI_SUCCESS; if (IS_ENABLED(CONFIG_EFI_HAVE_CAPSULE_SUPPORT)) { + u16 var_name16[12]; + + efi_create_indexed_name(var_name16, sizeof(var_name16), + "Capsule", CONFIG_EFI_CAPSULE_MAX); + ret = efi_set_variable_int(u"CapsuleMax", &efi_guid_capsule_report, EFI_VARIABLE_READ_ONLY | EFI_VARIABLE_BOOTSERVICE_ACCESS | EFI_VARIABLE_RUNTIME_ACCESS, - 22, u"CapsuleFFFF", false); + 22, var_name16, false); if (ret != EFI_SUCCESS) printf("EFI: cannot initialize CapsuleMax variable\n"); } -- cgit v1.2.3 From 5e957ae3504290a0c62188331a429ec9b908aa1b Mon Sep 17 00:00:00 2001 From: Heinrich Schuchardt Date: Sun, 19 Feb 2023 21:26:24 +0100 Subject: doc: remove superfluous warning We have been using Sphinx >=3 since 2020. We don't expect issues. Signed-off-by: Heinrich Schuchardt --- doc/conf.py | 4 ---- 1 file changed, 4 deletions(-) diff --git a/doc/conf.py b/doc/conf.py index 3db70f80c1..00f2413664 100644 --- a/doc/conf.py +++ b/doc/conf.py @@ -47,10 +47,6 @@ extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include', # the process to proceed; hopefully somebody will fix this properly soon. # if major >= 3: - sys.stderr.write('''WARNING: The kernel documentation build process - support for Sphinx v3.0 and above is brand new. Be prepared for - possible issues in the generated output. - ''') if (major > 3) or (minor > 0 or patch >= 2): # Sphinx c function parser is more pedantic with regards to type # checking. Due to that, having macros at c:function cause problems. -- cgit v1.2.3 From 237d1f60b1db52074441bc3a5848fe98503726a2 Mon Sep 17 00:00:00 2001 From: Venkatesh Yadav Abbarapu Date: Fri, 13 Jan 2023 10:42:02 +0530 Subject: usb: dwc3: Use the devm_gpiod_get_optional() API for reset gpio As the "reset-gpios" property is optional, don't return the error and just skip the gpio reset sequence. Signed-off-by: Venkatesh Yadav Abbarapu --- drivers/usb/dwc3/dwc3-generic.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/usb/dwc3/dwc3-generic.c b/drivers/usb/dwc3/dwc3-generic.c index 78966718d0..ed1b9b630e 100644 --- a/drivers/usb/dwc3/dwc3-generic.c +++ b/drivers/usb/dwc3/dwc3-generic.c @@ -44,7 +44,7 @@ struct dwc3_generic_priv { void *base; struct dwc3 dwc3; struct phy_bulk phys; - struct gpio_desc ulpi_reset; + struct gpio_desc *ulpi_reset; }; struct dwc3_generic_host_priv { @@ -91,23 +91,23 @@ static int dwc3_generic_probe(struct udevice *dev, if (CONFIG_IS_ENABLED(DM_GPIO) && device_is_compatible(dev->parent, "xlnx,zynqmp-dwc3")) { - rc = gpio_request_by_name(dev->parent, "reset-gpios", 0, - &priv->ulpi_reset, GPIOD_ACTIVE_LOW); - if (rc) - return rc; - - /* Toggle ulpi to reset the phy. */ - rc = dm_gpio_set_value(&priv->ulpi_reset, 1); - if (rc) - return rc; - - mdelay(5); - - rc = dm_gpio_set_value(&priv->ulpi_reset, 0); - if (rc) - return rc; - - mdelay(5); + priv->ulpi_reset = devm_gpiod_get_optional(dev->parent, "reset", + GPIOD_ACTIVE_LOW); + /* property is optional, don't return error! */ + if (priv->ulpi_reset) { + /* Toggle ulpi to reset the phy. */ + rc = dm_gpio_set_value(priv->ulpi_reset, 1); + if (rc) + return rc; + + mdelay(5); + + rc = dm_gpio_set_value(priv->ulpi_reset, 0); + if (rc) + return rc; + + mdelay(5); + } } if (device_is_compatible(dev->parent, "rockchip,rk3399-dwc3")) @@ -133,7 +133,7 @@ static int dwc3_generic_remove(struct udevice *dev, if (CONFIG_IS_ENABLED(DM_GPIO) && device_is_compatible(dev->parent, "xlnx,zynqmp-dwc3")) { - struct gpio_desc *ulpi_reset = &priv->ulpi_reset; + struct gpio_desc *ulpi_reset = priv->ulpi_reset; dm_gpio_free(ulpi_reset->dev, ulpi_reset); } -- cgit v1.2.3 From 8f1b3334574bbc1a9a46db92a798f0aed968e858 Mon Sep 17 00:00:00 2001 From: PaweÅ‚ Anikiel Date: Tue, 21 Feb 2023 16:17:01 +0100 Subject: socfpga: chameleonv3: Enable ext4 in SPL MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Allow SPL to boot from an ext4 filesystem. Signed-off-by: PaweÅ‚ Anikiel Reviewed-by: Simon Glass --- configs/socfpga_chameleonv3_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig index 4bbce3591d..5d08fd282b 100644 --- a/configs/socfpga_chameleonv3_defconfig +++ b/configs/socfpga_chameleonv3_defconfig @@ -7,6 +7,7 @@ CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2" CONFIG_SPL_TEXT_BASE=0xFFE00000 CONFIG_SPL_DRIVERS_MISC=y CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y +CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_FAT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y -- cgit v1.2.3 From 0f3c8fe392618fca29f2093be3ce771401bc6d56 Mon Sep 17 00:00:00 2001 From: PaweÅ‚ Anikiel Date: Tue, 21 Feb 2023 16:17:02 +0100 Subject: socfpga: chameleonv3: Move environment to a text file MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Move the environment to an easily editable text file in the boot partition Signed-off-by: PaweÅ‚ Anikiel Reviewed-by: Simon Glass --- board/google/chameleonv3/environment.txt | 13 +++++++++++++ include/configs/socfpga_chameleonv3.h | 9 ++++----- 2 files changed, 17 insertions(+), 5 deletions(-) create mode 100644 board/google/chameleonv3/environment.txt diff --git a/board/google/chameleonv3/environment.txt b/board/google/chameleonv3/environment.txt new file mode 100644 index 0000000000..52aedbb90a --- /dev/null +++ b/board/google/chameleonv3/environment.txt @@ -0,0 +1,13 @@ +# MMC boot command +bootcmd_mmc=load mmc 0:1 ${loadaddr} kernel.itb; bootm + +# Network boot command and vars +bootcmd_net=dhcp; tftpboot ${loadaddr} kernel.itb; bootm +autoload=no +serverip=192.168.0.1 + +# U-Boot will run this after loading this file +bootcmd_txt=run bootcmd_mmc + +# Kernel cmdline +bootargs=cma=256M console=ttyS1,115200 root=/dev/mmcblk0p3 rootflags=subvol=root rw rootwait diff --git a/include/configs/socfpga_chameleonv3.h b/include/configs/socfpga_chameleonv3.h index 2ce7011529..fc08e74dba 100644 --- a/include/configs/socfpga_chameleonv3.h +++ b/include/configs/socfpga_chameleonv3.h @@ -20,11 +20,10 @@ #define CFG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600, 115200} #define CFG_EXTRA_ENV_SETTINGS \ - "autoload=no\0" \ - "bootargs=cma=256M console=ttyS1,115200 root=/dev/mmcblk0p3 rw rootwait\0" \ - "distro_bootcmd=bridge enable; run bootcmd_mmc\0" \ - "bootcmd_mmc=load mmc 0:1 ${loadaddr} kernel.itb; bootm\0" \ - "bootcmd_net=dhcp; tftpboot ${loadaddr} kernel.itb; bootm\0" + "distro_bootcmd=bridge enable; " \ + "load mmc 0:1 ${loadaddr} u-boot.txt; " \ + "env import -t ${loadaddr}; " \ + "run bootcmd_txt\0" /* * L4 OSC1 Timer 0 -- cgit v1.2.3 From 1d222089f08af79585e2f1d2fceaa8033c877f9c Mon Sep 17 00:00:00 2001 From: PaweÅ‚ Anikiel Date: Tue, 21 Feb 2023 16:17:03 +0100 Subject: arm: dts: chameleonv3: Override chameleonv3 bitstream names MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set the bitstream name per Chameleon variant. This allows the same boot filesystem with all bitstream variants to be used on different boards. Signed-off-by: PaweÅ‚ Anikiel Reviewed-by: Simon Glass --- arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi | 4 ++++ arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi | 4 ++++ 2 files changed, 8 insertions(+) diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi index e789d49657..a7aa17b220 100644 --- a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3-u-boot.dtsi @@ -6,3 +6,7 @@ #include "socfpga_arria10-handoff.dtsi" #include "socfpga_arria10_handoff_u-boot.dtsi" #include "socfpga_arria10_mercury_aa1-u-boot.dtsi" + +&fpga_mgr { + altr,bitstream = "fpga-270-3.itb"; +}; diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi index 7bbcc471c5..82a94894ea 100644 --- a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi +++ b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2-u-boot.dtsi @@ -6,3 +6,7 @@ #include "socfpga_arria10-handoff.dtsi" #include "socfpga_arria10_handoff_u-boot.dtsi" #include "socfpga_arria10_mercury_aa1-u-boot.dtsi" + +&fpga_mgr { + altr,bitstream = "fpga-480-2.itb"; +}; -- cgit v1.2.3 From 9c107ab42bd44fc1902f51d118ad10007244f8d6 Mon Sep 17 00:00:00 2001 From: PaweÅ‚ Anikiel Date: Tue, 21 Feb 2023 16:17:04 +0100 Subject: arm: dts: chameleonv3: Rename chameleonv3.dts to .dtsi MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This file is included by the different chameleonv3 variants. Change the name to .dtsi. Signed-off-by: PaweÅ‚ Anikiel Reviewed-by: Simon Glass --- arch/arm/dts/socfpga_arria10_chameleonv3.dts | 90 ---------------------- arch/arm/dts/socfpga_arria10_chameleonv3.dtsi | 90 ++++++++++++++++++++++ arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts | 2 +- arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts | 2 +- 4 files changed, 92 insertions(+), 92 deletions(-) delete mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3.dts create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3.dtsi diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3.dts b/arch/arm/dts/socfpga_arria10_chameleonv3.dts deleted file mode 100644 index 988cc44543..0000000000 --- a/arch/arm/dts/socfpga_arria10_chameleonv3.dts +++ /dev/null @@ -1,90 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * Copyright 2022 Google LLC - */ -/dts-v1/; -#include "socfpga_arria10_mercury_aa1.dtsi" - -/ { - model = "Google Chameleon V3"; - compatible = "google,chameleon-v3", - "altr,socfpga-arria10", "altr,socfpga"; - - aliases { - serial0 = &uart0; - i2c0 = &i2c0; - i2c1 = &i2c1; - }; -}; - -&gmac0 { - status = "okay"; -}; - -&gpio0 { - status = "okay"; -}; - -&gpio1 { - status = "okay"; -}; - -&gpio2 { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - ssm2603: ssm2603@1a { - compatible = "adi,ssm2603"; - reg = <0x1a>; - }; -}; - -&i2c1 { - status = "okay"; - - u80: u80@21 { - compatible = "nxp,pca9535"; - reg = <0x21>; - gpio-controller; - #gpio-cells = <2>; - - gpio-line-names = - "SOM_AUD_MUTE", - "DP1_OUT_CEC_EN", - "DP2_OUT_CEC_EN", - "DP1_SOM_PS8469_CAD", - "DPD_SOM_PS8469_CAD", - "DP_OUT_PWR_EN", - "STM32_RST_L", - "STM32_BOOT0", - - "FPGA_PROT", - "STM32_FPGA_COMM0", - "TP119", - "TP120", - "TP121", - "TP122", - "TP123", - "TP124"; - }; -}; - -&mmc { - status = "okay"; -}; - -&uart0 { - status = "okay"; -}; - -&uart1 { - status = "okay"; -}; - -&usb0 { - status = "okay"; - dr_mode = "host"; -}; diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3.dtsi new file mode 100644 index 0000000000..988cc44543 --- /dev/null +++ b/arch/arm/dts/socfpga_arria10_chameleonv3.dtsi @@ -0,0 +1,90 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +/dts-v1/; +#include "socfpga_arria10_mercury_aa1.dtsi" + +/ { + model = "Google Chameleon V3"; + compatible = "google,chameleon-v3", + "altr,socfpga-arria10", "altr,socfpga"; + + aliases { + serial0 = &uart0; + i2c0 = &i2c0; + i2c1 = &i2c1; + }; +}; + +&gmac0 { + status = "okay"; +}; + +&gpio0 { + status = "okay"; +}; + +&gpio1 { + status = "okay"; +}; + +&gpio2 { + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + ssm2603: ssm2603@1a { + compatible = "adi,ssm2603"; + reg = <0x1a>; + }; +}; + +&i2c1 { + status = "okay"; + + u80: u80@21 { + compatible = "nxp,pca9535"; + reg = <0x21>; + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = + "SOM_AUD_MUTE", + "DP1_OUT_CEC_EN", + "DP2_OUT_CEC_EN", + "DP1_SOM_PS8469_CAD", + "DPD_SOM_PS8469_CAD", + "DP_OUT_PWR_EN", + "STM32_RST_L", + "STM32_BOOT0", + + "FPGA_PROT", + "STM32_FPGA_COMM0", + "TP119", + "TP120", + "TP121", + "TP122", + "TP123", + "TP124"; + }; +}; + +&mmc { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; +}; diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts index 5f40af6eb9..bef0280212 100644 --- a/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts +++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_3.dts @@ -2,4 +2,4 @@ /* * Copyright 2022 Google LLC */ -#include "socfpga_arria10_chameleonv3.dts" +#include "socfpga_arria10_chameleonv3.dtsi" diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts index 5f40af6eb9..bef0280212 100644 --- a/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts +++ b/arch/arm/dts/socfpga_arria10_chameleonv3_480_2.dts @@ -2,4 +2,4 @@ /* * Copyright 2022 Google LLC */ -#include "socfpga_arria10_chameleonv3.dts" +#include "socfpga_arria10_chameleonv3.dtsi" -- cgit v1.2.3 From 48c172c2f8f4c10f9dbd7416866125a6a528fb88 Mon Sep 17 00:00:00 2001 From: PaweÅ‚ Anikiel Date: Tue, 21 Feb 2023 16:17:05 +0100 Subject: arm: dts: chameleonv3: Add 270-2 variant MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add devicetree for chameleonv3 with the 270-2I2-D11E variant of the Mercury+ AA1 module Signed-off-by: PaweÅ‚ Anikiel Reviewed-by: Simon Glass --- arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi | 12 ++++++++++++ arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts | 5 +++++ 3 files changed, 18 insertions(+) create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 9d647b9639..7a577deb50 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -442,6 +442,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \ socfpga_agilex_socdk.dtb \ socfpga_arria5_secu1.dtb \ socfpga_arria5_socdk.dtb \ + socfpga_arria10_chameleonv3_270_2.dtb \ socfpga_arria10_chameleonv3_270_3.dtb \ socfpga_arria10_chameleonv3_480_2.dtb \ socfpga_arria10_socdk_sdmmc.dtb \ diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi new file mode 100644 index 0000000000..05b4485cf3 --- /dev/null +++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2-u-boot.dtsi @@ -0,0 +1,12 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +#include "socfpga_arria10_chameleonv3_480_2_handoff.h" +#include "socfpga_arria10-handoff.dtsi" +#include "socfpga_arria10_handoff_u-boot.dtsi" +#include "socfpga_arria10_mercury_aa1-u-boot.dtsi" + +&fpga_mgr { + altr,bitstream = "fpga-270-2.itb"; +}; diff --git a/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts new file mode 100644 index 0000000000..bef0280212 --- /dev/null +++ b/arch/arm/dts/socfpga_arria10_chameleonv3_270_2.dts @@ -0,0 +1,5 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright 2022 Google LLC + */ +#include "socfpga_arria10_chameleonv3.dtsi" -- cgit v1.2.3 From 52b8fca7178afdcacb31cfcdfea9429779d084a1 Mon Sep 17 00:00:00 2001 From: PaweÅ‚ Anikiel Date: Tue, 21 Feb 2023 16:17:06 +0100 Subject: chameleonv3: Convert CONFIG_SPL_MAX_SIZE to Kconfig MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This file was missed during the conversion process. Add the symbol to defconfig. Signed-off-by: PaweÅ‚ Anikiel Reviewed-by: Simon Glass --- configs/socfpga_chameleonv3_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig index 5d08fd282b..41231e2382 100644 --- a/configs/socfpga_chameleonv3_defconfig +++ b/configs/socfpga_chameleonv3_defconfig @@ -5,6 +5,7 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2" CONFIG_SPL_TEXT_BASE=0xFFE00000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_DRIVERS_MISC=y CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y CONFIG_SPL_FS_EXT4=y -- cgit v1.2.3 From 511a1303c9cf9663c7d4312e3a0693319f41095b Mon Sep 17 00:00:00 2001 From: Qu Wenruo Date: Mon, 13 Feb 2023 08:37:59 +0800 Subject: fs: btrfs: limit the mapped length to the original length [BUG] There is a bug report that btrfs driver caused hang during file read: This breaks btrfs on the HiFive Unmatched. => pci enum PCIE-0: Link up (Gen1-x8, Bus0) => nvme scan => load nvme 0:2 0x8c000000 /boot/dtb/sifive/hifive-unmatched-a00.dtb [hangs] [CAUSE] The reporter provided some debug output: read_extent_data: cur=615817216, orig_len=16384, cur_len=16384 read_extent_data: btrfs_map_block: cur_len=479944704; ret=0 read_extent_data: ret=0 read_extent_data: cur=615833600, orig_len=4096, cur_len=4096 read_extent_data: btrfs_map_block: cur_len=479928320; ret=0 Note the second and the last line, the @cur_len is 450+MiB, which is almost a chunk size. And inside __btrfs_map_block(), we limits the returned value to stripe length, but that's depending on the chunk type: if (map->type & (BTRFS_BLOCK_GROUP_RAID0 | BTRFS_BLOCK_GROUP_RAID1 | BTRFS_BLOCK_GROUP_RAID1C3 | BTRFS_BLOCK_GROUP_RAID1C4 | BTRFS_BLOCK_GROUP_RAID5 | BTRFS_BLOCK_GROUP_RAID6 | BTRFS_BLOCK_GROUP_RAID10 | BTRFS_BLOCK_GROUP_DUP)) { /* we limit the length of each bio to what fits in a stripe */ *length = min_t(u64, ce->size - offset, map->stripe_len - stripe_offset); } else { *length = ce->size - offset; } This means, if the chunk is SINGLE profile, then we don't limit the returned length at all, and even for other profiles, we can still return a length much larger than the requested one. [FIX] Properly clamp the returned length, preventing it from returning a much larger range than expected. Reported-by: Andreas Schwab Signed-off-by: Qu Wenruo --- fs/btrfs/volumes.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c index 4aaaeab663..7d4095d9ca 100644 --- a/fs/btrfs/volumes.c +++ b/fs/btrfs/volumes.c @@ -956,6 +956,7 @@ int __btrfs_map_block(struct btrfs_fs_info *fs_info, int rw, struct btrfs_mapping_tree *map_tree = &fs_info->mapping_tree; struct cache_extent *ce; struct map_lookup *map; + u64 orig_len = *length; u64 offset; u64 stripe_offset; u64 *raid_map = NULL; @@ -1047,6 +1048,7 @@ again: } else { *length = ce->size - offset; } + *length = min_t(u64, *length, orig_len); if (!multi_ret) goto out; -- cgit v1.2.3 From 57450d8661b3ec2e6b6f1d938e59f426cafb06d2 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 14 Feb 2023 15:09:31 -0500 Subject: Makefile: Link with -z noexectack When moving to gcc-12.2 we started trying to quiet some of the new linker warnings, that are not relevant to us. However, a misunderstanding of the mechanics at play meant that I intentionally omitted passing -z noexecstack to the linker, when we do need to. Add this flag and in turn remove warnings from the linker. Fixes: 1e1c51f8ace8 ("Makefile: link with --no-warn-rwx-segments") Signed-off-by: Tom Rini Reviewed-by: Simon Glass --- Makefile | 1 + 1 file changed, 1 insertion(+) diff --git a/Makefile b/Makefile index 54f894dab8..bc1ee94fb7 100644 --- a/Makefile +++ b/Makefile @@ -806,6 +806,7 @@ KBUILD_CPPFLAGS += $(KCPPFLAGS) KBUILD_AFLAGS += $(KAFLAGS) KBUILD_CFLAGS += $(KCFLAGS) +KBUILD_LDFLAGS += -z noexecstack KBUILD_LDFLAGS += $(call ld-option,--no-warn-rwx-segments) KBUILD_HOSTCFLAGS += $(if $(CONFIG_TOOLS_DEBUG),-g) -- cgit v1.2.3 From d85bc196cbf9b70be203047a3450643f1999fe4c Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Tue, 14 Feb 2023 15:09:32 -0500 Subject: x86: Pass -z execstack for EFI payload flags To match how we link EFI executables elsewhere, and to silence a linker warning, pass -z execstack here as well. Cc: Bin Meng Cc: Heinrich Schuchardt Signed-off-by: Tom Rini --- arch/x86/config.mk | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/x86/config.mk b/arch/x86/config.mk index a4a694ddf3..26ec1af2f0 100644 --- a/arch/x86/config.mk +++ b/arch/x86/config.mk @@ -37,7 +37,8 @@ KBUILD_LDFLAGS += -m $(if $(IS_32BIT),elf_i386,elf_x86_64) # This is used in the top-level Makefile which does not include # KBUILD_LDFLAGS -LDFLAGS_EFI_PAYLOAD := -Bsymbolic -Bsymbolic-functions -shared --no-undefined -s +LDFLAGS_EFI_PAYLOAD := -Bsymbolic -Bsymbolic-functions -shared --no-undefined \ + -s -zexecstack OBJCOPYFLAGS_EFI := -j .text -j .sdata -j .data -j .dynamic -j .dynsym \ -j .rel -j .rela -j .reloc --strip-all -- cgit v1.2.3 From c1d266a781600f8c4c18449016edffb5597153cb Mon Sep 17 00:00:00 2001 From: Simon Glass Date: Fri, 17 Feb 2023 15:45:16 -0700 Subject: trace: Relax test requirements We expect the profile and bootstage to agree on timing, but when running on slow machines there can be a larger descrepency. Increase the tolerance to fix this. Fixes: 9cea4797aeb ("trace: Add a test") Signed-off-by: Simon Glass --- test/py/tests/test_trace.py | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/test/py/tests/test_trace.py b/test/py/tests/test_trace.py index 14584d11a2..ac3e95925e 100644 --- a/test/py/tests/test_trace.py +++ b/test/py/tests/test_trace.py @@ -299,6 +299,7 @@ def test_trace(u_boot_console): fg_time = check_flamegraph(cons, fname, proftool, map_fname, trace_fg) - # Check that bootstage and flamegraph agree to within 10% + # Check that bootstage and flamegraph agree to within 30% + # This allows for CI being slow to run diff = abs(fg_time - dm_f_time) - assert diff / dm_f_time < 0.1 + assert diff / dm_f_time < 0.3 -- cgit v1.2.3 From 5b4acb0ff79df642ef6b1e35fd4b193a4dc3c62b Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Thu, 9 Feb 2023 13:30:10 +0100 Subject: env: mmc: Apply GPT only on eMMC user HW partition Apply the GPT U-Boot environment GUID type look up only on eMMC user HW partition, do not apply the look up on eMMC boot HW partitions as mmc_offset_try_partition() assumes either SD partitions or eMMC user HW partition. This fixes environment operation on systems where CONFIG_SYS_MMC_ENV_PART is non-zero and CONFIG_SYS_REDUNDAND_ENVIRONMENT is set. Fixes: 80105d8fd52 ("env: mmc: select GPT env partition by type guid") Signed-off-by: Marek Vasut Reviewed-by: Tom Rini --- env/mmc.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/env/mmc.c b/env/mmc.c index 5b01f657a7..7a5836ad66 100644 --- a/env/mmc.c +++ b/env/mmc.c @@ -94,7 +94,7 @@ static inline int mmc_offset_try_partition(const char *str, int copy, s64 *val) return 0; } -static inline s64 mmc_offset(int copy) +static inline s64 mmc_offset(struct mmc *mmc, int copy) { const struct { const char *offset_redund; @@ -108,8 +108,12 @@ static inline s64 mmc_offset(int copy) s64 val = 0, defvalue; const char *propname; const char *str; + int hwpart = 0; int err; + if (IS_ENABLED(CONFIG_SYS_MMC_ENV_PART)) + hwpart = mmc_get_env_part(mmc); + /* look for the partition in mmc CONFIG_SYS_MMC_ENV_DEV */ str = ofnode_conf_read_str(dt_prop.partition); if (str) { @@ -121,7 +125,7 @@ static inline s64 mmc_offset(int copy) } /* try the GPT partition with "U-Boot ENV" TYPE GUID */ - if (IS_ENABLED(CONFIG_PARTITION_TYPE_GUID)) { + if (IS_ENABLED(CONFIG_PARTITION_TYPE_GUID) && hwpart == 0) { err = mmc_offset_try_partition(NULL, copy, &val); if (!err) return val; @@ -138,7 +142,7 @@ static inline s64 mmc_offset(int copy) return ofnode_conf_read_int(propname, defvalue); } #else -static inline s64 mmc_offset(int copy) +static inline s64 mmc_offset(struct mmc *mmc, int copy) { s64 offset = ENV_MMC_OFFSET; @@ -151,7 +155,7 @@ static inline s64 mmc_offset(int copy) __weak int mmc_get_env_addr(struct mmc *mmc, int copy, u32 *env_addr) { - s64 offset = mmc_offset(copy); + s64 offset = mmc_offset(mmc, copy); if (offset == ENV_MMC_INVALID_OFFSET) { printf("Invalid ENV offset in MMC, copy=%d\n", copy); -- cgit v1.2.3 From fca18a26439037fb6a9e51fbe8cb5155fc79f05e Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:23 +0200 Subject: tegra30: clock: add EXTPERIPH This mappings were missing for some reason. Tested-by: Svyatoslav Ryhel # LG P895 T30 Signed-off-by: Svyatoslav Ryhel Reviewed-by: Simon Glass Signed-off-by: Tom --- arch/arm/include/asm/arch-tegra30/clock-tables.h | 6 +++--- arch/arm/mach-tegra/tegra30/clock.c | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/arch-tegra30/clock-tables.h b/arch/arm/include/asm/arch-tegra30/clock-tables.h index 8588009c61..6c899ff64c 100644 --- a/arch/arm/include/asm/arch-tegra30/clock-tables.h +++ b/arch/arm/include/asm/arch-tegra30/clock-tables.h @@ -190,9 +190,9 @@ enum periph_id { PERIPH_ID_ACTMON, /* 24 */ - PERIPH_ID_EX_RESERVED24, - PERIPH_ID_EX_RESERVED25, - PERIPH_ID_EX_RESERVED26, + PERIPH_ID_EXTPERIPH1, + PERIPH_ID_EXTPERIPH2, + PERIPH_ID_EXTPERIPH3, PERIPH_ID_EX_RESERVED27, PERIPH_ID_SATA, PERIPH_ID_HDA, diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c index 449b66e3b2..04ad5c504d 100644 --- a/arch/arm/mach-tegra/tegra30/clock.c +++ b/arch/arm/mach-tegra/tegra30/clock.c @@ -377,9 +377,9 @@ static s8 periph_id_to_internal_id[PERIPH_ID_COUNT] = { PERIPHC_ACTMON, /* 24 */ - NONE(RESERVED24), - NONE(RESERVED25), - NONE(RESERVED26), + PERIPHC_EXTPERIPH1, + PERIPHC_EXTPERIPH2, + PERIPHC_EXTPERIPH3, NONE(RESERVED27), PERIPHC_SATA, PERIPHC_HDA, -- cgit v1.2.3 From 2fafac30efb9bb911b6e7159a02c080bccc9ae23 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:24 +0200 Subject: ARM: t20/t30: swap host1x and disp1 clock parents According to mainline clock tables and TRM HOST1X parent is PLLC, while DISP1 usually uses PLLP as parent clock. Tested-by: Andreas Westman Dorcsak # ASUS TF T30 Tested-by: Robert Eckelmann # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel # LG P895 T30 Tested-by: Thierry Reding # Beaver T30 Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom --- arch/arm/mach-tegra/tegra20/clock.c | 4 ++-- arch/arm/mach-tegra/tegra30/clock.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c index 8c127430aa..0316073d1a 100644 --- a/arch/arm/mach-tegra/tegra20/clock.c +++ b/arch/arm/mach-tegra/tegra20/clock.c @@ -760,8 +760,8 @@ struct periph_clk_init periph_clk_init_table[] = { { PERIPH_ID_SBC2, CLOCK_ID_PERIPH }, { PERIPH_ID_SBC3, CLOCK_ID_PERIPH }, { PERIPH_ID_SBC4, CLOCK_ID_PERIPH }, - { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH }, - { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL }, + { PERIPH_ID_HOST1X, CLOCK_ID_CGENERAL }, + { PERIPH_ID_DISP1, CLOCK_ID_PERIPH }, { PERIPH_ID_NDFLASH, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c index 04ad5c504d..e5c2fd542c 100644 --- a/arch/arm/mach-tegra/tegra30/clock.c +++ b/arch/arm/mach-tegra/tegra30/clock.c @@ -799,8 +799,8 @@ struct periph_clk_init periph_clk_init_table[] = { { PERIPH_ID_SBC4, CLOCK_ID_PERIPH }, { PERIPH_ID_SBC5, CLOCK_ID_PERIPH }, { PERIPH_ID_SBC6, CLOCK_ID_PERIPH }, - { PERIPH_ID_HOST1X, CLOCK_ID_PERIPH }, - { PERIPH_ID_DISP1, CLOCK_ID_CGENERAL }, + { PERIPH_ID_HOST1X, CLOCK_ID_CGENERAL }, + { PERIPH_ID_DISP1, CLOCK_ID_PERIPH }, { PERIPH_ID_NDFLASH, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC1, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, -- cgit v1.2.3 From 65e02744ec1517eefb20354db61ddbd9560aba2c Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:25 +0200 Subject: ARM: tegra: clock: add clk_id_to_pll_id helper This function allows to convert a device tree clock ID to PLL ID. Tested-by: Andreas Westman Dorcsak # ASUS TF T30 Tested-by: Robert Eckelmann # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel # HTC One X Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom --- arch/arm/include/asm/arch-tegra/clock.h | 8 +++++++ arch/arm/mach-tegra/tegra114/clock.c | 37 ++++++++++++++++++++++++++++++++ arch/arm/mach-tegra/tegra124/clock.c | 38 +++++++++++++++++++++++++++++++++ arch/arm/mach-tegra/tegra20/clock.c | 37 ++++++++++++++++++++++++++++++++ arch/arm/mach-tegra/tegra210/clock.c | 37 ++++++++++++++++++++++++++++++++ arch/arm/mach-tegra/tegra30/clock.c | 37 ++++++++++++++++++++++++++++++++ 6 files changed, 194 insertions(+) diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h index 1dd5d0742c..2270501406 100644 --- a/arch/arm/include/asm/arch-tegra/clock.h +++ b/arch/arm/include/asm/arch-tegra/clock.h @@ -354,6 +354,14 @@ int get_periph_clock_source(enum periph_id periph_id, */ enum periph_id clk_id_to_periph_id(int clk_id); +/* + * Convert a device tree clock ID to our PLL ID. + * + * @param clk_id Clock ID according to tegra device tree binding + * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid + */ +enum clock_id clk_id_to_pll_id(int clk_id); + /** * Set the output frequency you want for each PLL clock. * PLL output frequencies are programmed by setting their N, M and P values. diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c index 143f86863f..15c2adc417 100644 --- a/arch/arm/mach-tegra/tegra114/clock.c +++ b/arch/arm/mach-tegra/tegra114/clock.c @@ -19,6 +19,8 @@ #include #include +#include + /* * Clock types that we can use as a source. The Tegra114 has muxes for the * peripheral clocks, and in most cases there are four options for the clock @@ -646,6 +648,41 @@ enum periph_id clk_id_to_periph_id(int clk_id) return clk_id; } } + +/* + * Convert a device tree clock ID to our PLL ID. + * + * @param clk_id Clock ID according to tegra114 device tree binding + * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid + */ +enum clock_id clk_id_to_pll_id(int clk_id) +{ + switch (clk_id) { + case TEGRA114_CLK_PLL_C: + return CLOCK_ID_CGENERAL; + case TEGRA114_CLK_PLL_M: + return CLOCK_ID_MEMORY; + case TEGRA114_CLK_PLL_P: + return CLOCK_ID_PERIPH; + case TEGRA114_CLK_PLL_A: + return CLOCK_ID_AUDIO; + case TEGRA114_CLK_PLL_U: + return CLOCK_ID_USB; + case TEGRA114_CLK_PLL_D: + case TEGRA114_CLK_PLL_D_OUT0: + return CLOCK_ID_DISPLAY; + case TEGRA114_CLK_PLL_X: + return CLOCK_ID_XCPU; + case TEGRA114_CLK_PLL_E_OUT0: + return CLOCK_ID_EPCI; + case TEGRA114_CLK_CLK_32K: + return CLOCK_ID_32KHZ; + case TEGRA114_CLK_CLK_M: + return CLOCK_ID_CLK_M; + default: + return CLOCK_ID_NONE; + } +} #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ void clock_early_init(void) diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c index da38b26c27..415ba15e5d 100644 --- a/arch/arm/mach-tegra/tegra124/clock.c +++ b/arch/arm/mach-tegra/tegra124/clock.c @@ -19,6 +19,9 @@ #include #include +#include +#include + /* * Clock types that we can use as a source. The Tegra124 has muxes for the * peripheral clocks, and in most cases there are four options for the clock @@ -826,6 +829,41 @@ enum periph_id clk_id_to_periph_id(int clk_id) return clk_id; } } + +/* + * Convert a device tree clock ID to our PLL ID. + * + * @param clk_id Clock ID according to tegra124 device tree binding + * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid + */ +enum clock_id clk_id_to_pll_id(int clk_id) +{ + switch (clk_id) { + case TEGRA124_CLK_PLL_C: + return CLOCK_ID_CGENERAL; + case TEGRA124_CLK_PLL_M: + return CLOCK_ID_MEMORY; + case TEGRA124_CLK_PLL_P: + return CLOCK_ID_PERIPH; + case TEGRA124_CLK_PLL_A: + return CLOCK_ID_AUDIO; + case TEGRA124_CLK_PLL_U: + return CLOCK_ID_USB; + case TEGRA124_CLK_PLL_D: + case TEGRA124_CLK_PLL_D_OUT0: + return CLOCK_ID_DISPLAY; + case TEGRA124_CLK_PLL_X: + return CLOCK_ID_XCPU; + case TEGRA124_CLK_PLL_E: + return CLOCK_ID_EPCI; + case TEGRA124_CLK_CLK_32K: + return CLOCK_ID_32KHZ; + case TEGRA124_CLK_CLK_M: + return CLOCK_ID_CLK_M; + default: + return CLOCK_ID_NONE; + } +} #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ void clock_early_init(void) diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c index 0316073d1a..593622bfdc 100644 --- a/arch/arm/mach-tegra/tegra20/clock.c +++ b/arch/arm/mach-tegra/tegra20/clock.c @@ -20,6 +20,8 @@ #include #include +#include + /* * Clock types that we can use as a source. The Tegra20 has muxes for the * peripheral clocks, and in most cases there are four options for the clock @@ -578,6 +580,41 @@ enum periph_id clk_id_to_periph_id(int clk_id) return clk_id; } } + +/* + * Convert a device tree clock ID to our PLL ID. + * + * @param clk_id Clock ID according to tegra20 device tree binding + * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid + */ +enum clock_id clk_id_to_pll_id(int clk_id) +{ + switch (clk_id) { + case TEGRA20_CLK_PLL_C: + return CLOCK_ID_CGENERAL; + case TEGRA20_CLK_PLL_M: + return CLOCK_ID_MEMORY; + case TEGRA20_CLK_PLL_P: + return CLOCK_ID_PERIPH; + case TEGRA20_CLK_PLL_A: + return CLOCK_ID_AUDIO; + case TEGRA20_CLK_PLL_U: + return CLOCK_ID_USB; + case TEGRA20_CLK_PLL_D: + case TEGRA20_CLK_PLL_D_OUT0: + return CLOCK_ID_DISPLAY; + case TEGRA20_CLK_PLL_X: + return CLOCK_ID_XCPU; + case TEGRA20_CLK_PLL_E: + return CLOCK_ID_EPCI; + case TEGRA20_CLK_CLK_32K: + return CLOCK_ID_32KHZ; + case TEGRA20_CLK_CLK_M: + return CLOCK_ID_CLK_M; + default: + return CLOCK_ID_NONE; + } +} #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ void clock_early_init(void) diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c index 330753f2ad..76fbfef580 100644 --- a/arch/arm/mach-tegra/tegra210/clock.c +++ b/arch/arm/mach-tegra/tegra210/clock.c @@ -22,6 +22,8 @@ #include #include +#include + /* * Clock types that we can use as a source. The Tegra210 has muxes for the * peripheral clocks, and in most cases there are four options for the clock @@ -914,6 +916,41 @@ enum periph_id clk_id_to_periph_id(int clk_id) return clk_id; } } + +/* + * Convert a device tree clock ID to our PLL ID. + * + * @param clk_id Clock ID according to tegra210 device tree binding + * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid + */ +enum clock_id clk_id_to_pll_id(int clk_id) +{ + switch (clk_id) { + case TEGRA210_CLK_PLL_C: + return CLOCK_ID_CGENERAL; + case TEGRA210_CLK_PLL_M: + return CLOCK_ID_MEMORY; + case TEGRA210_CLK_PLL_P: + return CLOCK_ID_PERIPH; + case TEGRA210_CLK_PLL_A: + return CLOCK_ID_AUDIO; + case TEGRA210_CLK_PLL_U: + return CLOCK_ID_USB; + case TEGRA210_CLK_PLL_D: + case TEGRA210_CLK_PLL_D_OUT0: + return CLOCK_ID_DISPLAY; + case TEGRA210_CLK_PLL_X: + return CLOCK_ID_XCPU; + case TEGRA210_CLK_PLL_E: + return CLOCK_ID_EPCI; + case TEGRA210_CLK_CLK_32K: + return CLOCK_ID_32KHZ; + case TEGRA210_CLK_CLK_M: + return CLOCK_ID_CLK_M; + default: + return CLOCK_ID_NONE; + } +} #endif /* CONFIG_OF_CONTROL */ /* diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c index e5c2fd542c..dcdd0d0978 100644 --- a/arch/arm/mach-tegra/tegra30/clock.c +++ b/arch/arm/mach-tegra/tegra30/clock.c @@ -19,6 +19,8 @@ #include #include +#include + /* * Clock types that we can use as a source. The Tegra30 has muxes for the * peripheral clocks, and in most cases there are four options for the clock @@ -628,6 +630,41 @@ enum periph_id clk_id_to_periph_id(int clk_id) return clk_id; } } + +/* + * Convert a device tree clock ID to our PLL ID. + * + * @param clk_id Clock ID according to tegra30 device tree binding + * Return: clock ID, or CLOCK_ID_NONE if the clock ID is invalid + */ +enum clock_id clk_id_to_pll_id(int clk_id) +{ + switch (clk_id) { + case TEGRA30_CLK_PLL_C: + return CLOCK_ID_CGENERAL; + case TEGRA30_CLK_PLL_M: + return CLOCK_ID_MEMORY; + case TEGRA30_CLK_PLL_P: + return CLOCK_ID_PERIPH; + case TEGRA30_CLK_PLL_A: + return CLOCK_ID_AUDIO; + case TEGRA30_CLK_PLL_U: + return CLOCK_ID_USB; + case TEGRA30_CLK_PLL_D: + case TEGRA30_CLK_PLL_D_OUT0: + return CLOCK_ID_DISPLAY; + case TEGRA30_CLK_PLL_X: + return CLOCK_ID_XCPU; + case TEGRA30_CLK_PLL_E: + return CLOCK_ID_EPCI; + case TEGRA30_CLK_CLK_32K: + return CLOCK_ID_32KHZ; + case TEGRA30_CLK_CLK_M: + return CLOCK_ID_CLK_M; + default: + return CLOCK_ID_NONE; + } +} #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ void clock_early_init(void) -- cgit v1.2.3 From a81d792479340bf03131111b285c0f70d27622b6 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:26 +0200 Subject: ARM: tegra: clock: add clock_decode_pair helper Get periph clock id and its parent from device tree. This works by looking up the peripheral's 'clocks' node and reading out the second and fourth cells, which are the peripheral and PLL clock numbers. Tested-by: Andreas Westman Dorcsak # ASUS TF T30 Tested-by: Robert Eckelmann # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel # HTC One X Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom --- arch/arm/include/asm/arch-tegra/clock.h | 13 +++++++++++++ arch/arm/mach-tegra/clock.c | 23 +++++++++++++++++++++++ 2 files changed, 36 insertions(+) diff --git a/arch/arm/include/asm/arch-tegra/clock.h b/arch/arm/include/asm/arch-tegra/clock.h index 2270501406..61ef81e7fe 100644 --- a/arch/arm/include/asm/arch-tegra/clock.h +++ b/arch/arm/include/asm/arch-tegra/clock.h @@ -270,6 +270,19 @@ void clock_ll_start_uart(enum periph_id periph_id); */ int clock_decode_periph_id(struct udevice *dev); +/** + * Get periph clock id and its parent from device tree. + * + * This works by looking up the peripheral's 'clocks' node and reading out + * the second and fourth cells, which are the peripheral and PLL clock numbers. + * + * @param dev udevice associated with FDT node + * @param clk_id pointer to int array of 2 values + * first is periph clock, second is + * its PLL parent according to FDT. + */ +int clock_decode_pair(struct udevice *dev, int *clk_id); + /** * Checks if the oscillator bypass is enabled (XOBP bit) * diff --git a/arch/arm/mach-tegra/clock.c b/arch/arm/mach-tegra/clock.c index 11bffc1701..966009f375 100644 --- a/arch/arm/mach-tegra/clock.c +++ b/arch/arm/mach-tegra/clock.c @@ -678,6 +678,29 @@ int clock_decode_periph_id(struct udevice *dev) assert(clock_periph_id_isvalid(id)); return id; } + +/* + * Get periph clock id and its parent from device tree. + * + * @param dev udevice associated with FDT node + * @param clk_id pointer to u32 array of 2 values + * first is periph clock, second is + * its PLL parent according to FDT. + */ +int clock_decode_pair(struct udevice *dev, int *clk_id) +{ + u32 cell[4]; + int err; + + err = dev_read_u32_array(dev, "clocks", cell, ARRAY_SIZE(cell)); + if (err) + return -EINVAL; + + clk_id[0] = clk_id_to_periph_id(cell[1]); + clk_id[1] = clk_id_to_pll_id(cell[3]); + + return 0; +} #endif /* CONFIG_IS_ENABLED(OF_CONTROL) */ int clock_verify(void) -- cgit v1.2.3 From 678157e212ea9871e03896adf3297ebb61c912db Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:27 +0200 Subject: ARM: tegra30: add PLLD to pll setup On T30 unlike T20 dsi panels are wider used on devices and PLLD is used as DISP1 parent more often, so lets enable it as well for this cases. Tested-by: Andreas Westman Dorcsak # ASUS TF700T T30 Tested-by: Svyatoslav Ryhel # HTC One X T30 Tested-by: Thierry Reding # Beaver T30 Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom --- arch/arm/mach-tegra/tegra30/clock.c | 41 +++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c index dcdd0d0978..b66211ce94 100644 --- a/arch/arm/mach-tegra/tegra30/clock.c +++ b/arch/arm/mach-tegra/tegra30/clock.c @@ -669,7 +669,48 @@ enum clock_id clk_id_to_pll_id(int clk_id) void clock_early_init(void) { + struct clk_rst_ctlr *clkrst = + (struct clk_rst_ctlr *)NV_PA_CLK_RST_BASE; + struct clk_pll_info *pllinfo; + u32 data; + tegra30_set_up_pllp(); + + /* + * PLLD output frequency set to 925Mhz + */ + switch (clock_get_osc_freq()) { + case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ + case CLOCK_OSC_FREQ_48_0: /* OSC is 48Mhz */ + clock_set_rate(CLOCK_ID_DISPLAY, 925, 12, 0, 12); + break; + + case CLOCK_OSC_FREQ_26_0: /* OSC is 26Mhz */ + clock_set_rate(CLOCK_ID_DISPLAY, 925, 26, 0, 12); + break; + + case CLOCK_OSC_FREQ_13_0: /* OSC is 13Mhz */ + case CLOCK_OSC_FREQ_16_8: /* OSC is 16.8Mhz */ + clock_set_rate(CLOCK_ID_DISPLAY, 925, 13, 0, 12); + break; + + case CLOCK_OSC_FREQ_19_2: + case CLOCK_OSC_FREQ_38_4: + default: + /* + * These are not supported. It is too early to print a + * message and the UART likely won't work anyway due to the + * oscillator being wrong. + */ + break; + } + + /* PLLD_MISC: Set CLKENABLE, CPCON 12, LFCON 1, and enable lock */ + pllinfo = &tegra_pll_info_table[CLOCK_ID_DISPLAY]; + data = (12 << pllinfo->kcp_shift) | (1 << pllinfo->kvco_shift); + data |= (1 << PLLD_CLKENABLE) | (1 << pllinfo->lock_ena); + writel(data, &clkrst->crc_pll[CLOCK_ID_DISPLAY].pll_misc); + udelay(2); } void arch_timer_init(void) -- cgit v1.2.3 From 23d24df34cdd8157d10d302dbba798cd0b518451 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:28 +0200 Subject: ARM: tegra: Fix Tegra PWM parent clock Default parent clock for the PWM on Tegra is a 32kHz clock and is unable to support the requested PWM period. Fix PWM support on Tegra20, Tegra30, Tegra114, Tegra124 and Tegra210 by updating the parent clock for the PWM to be the PLL_P. This commit is equivalent to Linux kernel commit: https://lore.kernel.org/all/20221010100046.6477-1-jonathanh@nvidia.com/ Tested-by: Andreas Westman Dorcsak # ASUS TF T30 Tested-by: Robert Eckelmann # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel # ASUS TF201 T30 Tested-by: Thierry Reding # T30 and T124 Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom --- arch/arm/dts/tegra114.dtsi | 2 +- arch/arm/dts/tegra124.dtsi | 2 +- arch/arm/mach-tegra/tegra114/clock.c | 2 +- arch/arm/mach-tegra/tegra124/clock.c | 2 +- arch/arm/mach-tegra/tegra20/clock.c | 2 +- arch/arm/mach-tegra/tegra210/clock.c | 2 +- arch/arm/mach-tegra/tegra30/clock.c | 2 +- drivers/pwm/tegra_pwm.c | 10 ++++++---- 8 files changed, 13 insertions(+), 11 deletions(-) diff --git a/arch/arm/dts/tegra114.dtsi b/arch/arm/dts/tegra114.dtsi index 8932ea3afd..68ee7f3165 100644 --- a/arch/arm/dts/tegra114.dtsi +++ b/arch/arm/dts/tegra114.dtsi @@ -312,7 +312,7 @@ }; pwm: pwm@7000a000 { - compatible = "nvidia,tegra114-pwm", "nvidia,tegra20-pwm"; + compatible = "nvidia,tegra114-pwm"; reg = <0x7000a000 0x100>; #pwm-cells = <2>; clocks = <&tegra_car TEGRA114_CLK_PWM>; diff --git a/arch/arm/dts/tegra124.dtsi b/arch/arm/dts/tegra124.dtsi index f473ba28e4..ffec9cae09 100644 --- a/arch/arm/dts/tegra124.dtsi +++ b/arch/arm/dts/tegra124.dtsi @@ -377,7 +377,7 @@ }; pwm: pwm@7000a000 { - compatible = "nvidia,tegra124-pwm", "nvidia,tegra20-pwm"; + compatible = "nvidia,tegra124-pwm", "nvidia,tegra114-pwm"; reg = <0x7000a000 0x100>; #pwm-cells = <2>; clocks = <&tegra_car TEGRA124_CLK_PWM>; diff --git a/arch/arm/mach-tegra/tegra114/clock.c b/arch/arm/mach-tegra/tegra114/clock.c index 15c2adc417..8ad71f590f 100644 --- a/arch/arm/mach-tegra/tegra114/clock.c +++ b/arch/arm/mach-tegra/tegra114/clock.c @@ -782,7 +782,7 @@ struct periph_clk_init periph_clk_init_table[] = { { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH }, - { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ }, + { PERIPH_ID_PWM, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C1, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C2, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C3, CLOCK_ID_PERIPH }, diff --git a/arch/arm/mach-tegra/tegra124/clock.c b/arch/arm/mach-tegra/tegra124/clock.c index 415ba15e5d..ca9549a318 100644 --- a/arch/arm/mach-tegra/tegra124/clock.c +++ b/arch/arm/mach-tegra/tegra124/clock.c @@ -1208,7 +1208,7 @@ struct periph_clk_init periph_clk_init_table[] = { { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH }, - { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ }, + { PERIPH_ID_PWM, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C1, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C2, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C3, CLOCK_ID_PERIPH }, diff --git a/arch/arm/mach-tegra/tegra20/clock.c b/arch/arm/mach-tegra/tegra20/clock.c index 593622bfdc..067a9f1a2f 100644 --- a/arch/arm/mach-tegra/tegra20/clock.c +++ b/arch/arm/mach-tegra/tegra20/clock.c @@ -804,7 +804,7 @@ struct periph_clk_init periph_clk_init_table[] = { { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH }, - { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ }, + { PERIPH_ID_PWM, CLOCK_ID_PERIPH }, { PERIPH_ID_DVC_I2C, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C1, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C2, CLOCK_ID_PERIPH }, diff --git a/arch/arm/mach-tegra/tegra210/clock.c b/arch/arm/mach-tegra/tegra210/clock.c index 76fbfef580..900537afbe 100644 --- a/arch/arm/mach-tegra/tegra210/clock.c +++ b/arch/arm/mach-tegra/tegra210/clock.c @@ -1278,7 +1278,7 @@ struct periph_clk_init periph_clk_init_table[] = { { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH }, - { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ }, + { PERIPH_ID_PWM, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C1, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C2, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C3, CLOCK_ID_PERIPH }, diff --git a/arch/arm/mach-tegra/tegra30/clock.c b/arch/arm/mach-tegra/tegra30/clock.c index b66211ce94..1dc9d09dba 100644 --- a/arch/arm/mach-tegra/tegra30/clock.c +++ b/arch/arm/mach-tegra/tegra30/clock.c @@ -884,7 +884,7 @@ struct periph_clk_init periph_clk_init_table[] = { { PERIPH_ID_SDMMC2, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC3, CLOCK_ID_PERIPH }, { PERIPH_ID_SDMMC4, CLOCK_ID_PERIPH }, - { PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ }, + { PERIPH_ID_PWM, CLOCK_ID_PERIPH }, { PERIPH_ID_DVC_I2C, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C1, CLOCK_ID_PERIPH }, { PERIPH_ID_I2C2, CLOCK_ID_PERIPH }, diff --git a/drivers/pwm/tegra_pwm.c b/drivers/pwm/tegra_pwm.c index 36c35c608b..95fc26458b 100644 --- a/drivers/pwm/tegra_pwm.c +++ b/drivers/pwm/tegra_pwm.c @@ -20,19 +20,21 @@ static int tegra_pwm_set_config(struct udevice *dev, uint channel, { struct tegra_pwm_priv *priv = dev_get_priv(dev); struct pwm_ctlr *regs = priv->regs; + const u32 pwm_max_freq = dev_get_driver_data(dev); uint pulse_width; u32 reg; if (channel >= 4) return -EINVAL; debug("%s: Configure '%s' channel %u\n", __func__, dev->name, channel); - /* We ignore the period here and just use 32KHz */ - clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_SFROM32KHZ, 32768); + + clock_start_periph_pll(PERIPH_ID_PWM, CLOCK_ID_PERIPH, pwm_max_freq); pulse_width = duty_ns * 255 / period_ns; reg = pulse_width << PWM_WIDTH_SHIFT; reg |= 1 << PWM_DIVIDER_SHIFT; + reg |= PWM_ENABLE_MASK; writel(reg, ®s[channel].control); debug("%s: pulse_width=%u\n", __func__, pulse_width); @@ -68,8 +70,8 @@ static const struct pwm_ops tegra_pwm_ops = { }; static const struct udevice_id tegra_pwm_ids[] = { - { .compatible = "nvidia,tegra124-pwm" }, - { .compatible = "nvidia,tegra20-pwm" }, + { .compatible = "nvidia,tegra20-pwm", .data = 48 * 1000000 }, + { .compatible = "nvidia,tegra114-pwm", .data = 408 * 1000000 }, { } }; -- cgit v1.2.3 From 09ca4d802887defff2ba8ae6639703d6046136cf Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:29 +0200 Subject: spi: tegra20_slink: accept any word length Original t20 slink could work with commands only fully divisible by 8. This patch removes such restriction, so commands of any bitlength now can be passed and processed. Tested-by: Andreas Westman Dorcsak # ASUS TF600T T30 Tested-by: Svyatoslav Ryhel # LG P895 T30 Tested-by: Thierry Reding # T30 and T124 Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom --- drivers/spi/tegra20_slink.c | 19 +++++++++++-------- 1 file changed, 11 insertions(+), 8 deletions(-) diff --git a/drivers/spi/tegra20_slink.c b/drivers/spi/tegra20_slink.c index 209ba8b0cc..d0e788539e 100644 --- a/drivers/spi/tegra20_slink.c +++ b/drivers/spi/tegra20_slink.c @@ -208,16 +208,14 @@ static int tegra30_spi_xfer(struct udevice *dev, unsigned int bitlen, u32 reg, tmpdout, tmpdin = 0; const u8 *dout = data_out; u8 *din = data_in; - int num_bytes; - int ret; + int num_bytes, overflow; + int ret = 0; debug("%s: slave %u:%u dout %p din %p bitlen %u\n", __func__, dev_seq(bus), spi_chip_select(dev), dout, din, bitlen); - if (bitlen % 8) - return -1; - num_bytes = bitlen / 8; - ret = 0; + num_bytes = DIV_ROUND_UP(bitlen, 8); + overflow = bitlen % 8; reg = readl(®s->status); writel(reg, ®s->status); /* Clear all SPI events via R/W */ @@ -254,8 +252,13 @@ static int tegra30_spi_xfer(struct udevice *dev, unsigned int bitlen, num_bytes -= bytes; - clrsetbits_le32(®s->command, SLINK_CMD_BIT_LENGTH_MASK, - bytes * 8 - 1); + if (overflow && !num_bytes) + clrsetbits_le32(®s->command, SLINK_CMD_BIT_LENGTH_MASK, + (bytes - 1) * 8 + overflow - 1); + else + clrsetbits_le32(®s->command, SLINK_CMD_BIT_LENGTH_MASK, + bytes * 8 - 1); + writel(tmpdout, ®s->tx_fifo); setbits_le32(®s->command, SLINK_CMD_GO); -- cgit v1.2.3 From b1de4d7c6e14a78b6f321d205daa7846badb64ae Mon Sep 17 00:00:00 2001 From: Maxim Schwalm Date: Tue, 14 Feb 2023 19:35:30 +0200 Subject: ARM: tegra: provide default USB gadget setup All Nvidia boards use the same manufacturer, vendor ID and product ID for the gadgets. Make them the defaults to remove some boilerplate from the defconfigs. Inspired by commit e02687bda96c ("sunxi: provide default USB gadget setup") which did the same for Allwinner boards. Tested-by: Thierry Reding # T30 and T124 Signed-off-by: Maxim Schwalm Signed-off-by: Tom --- configs/beaver_defconfig | 3 --- configs/cei-tk1-som_defconfig | 3 --- configs/dalmore_defconfig | 3 --- configs/jetson-tk1_defconfig | 3 --- configs/nyan-big_defconfig | 3 --- configs/p2371-0000_defconfig | 3 --- configs/p2371-2180_defconfig | 3 --- configs/p2571_defconfig | 3 --- configs/p3450-0000_defconfig | 3 --- configs/venice2_defconfig | 3 --- drivers/usb/gadget/Kconfig | 3 +++ 11 files changed, 3 insertions(+), 30 deletions(-) diff --git a/configs/beaver_defconfig b/configs/beaver_defconfig index 94baba45c7..0a782ad2d9 100644 --- a/configs/beaver_defconfig +++ b/configs/beaver_defconfig @@ -64,8 +64,5 @@ CONFIG_USB_EHCI_TEGRA=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/cei-tk1-som_defconfig b/configs/cei-tk1-som_defconfig index 702f6bc20c..8d9351ea9d 100644 --- a/configs/cei-tk1-som_defconfig +++ b/configs/cei-tk1-som_defconfig @@ -70,8 +70,5 @@ CONFIG_USB_EHCI_TEGRA=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/dalmore_defconfig b/configs/dalmore_defconfig index e5fd0d5f50..baa2632d6c 100644 --- a/configs/dalmore_defconfig +++ b/configs/dalmore_defconfig @@ -60,8 +60,5 @@ CONFIG_USB_EHCI_TEGRA=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/jetson-tk1_defconfig b/configs/jetson-tk1_defconfig index fc5360a50c..fb1f337647 100644 --- a/configs/jetson-tk1_defconfig +++ b/configs/jetson-tk1_defconfig @@ -70,8 +70,5 @@ CONFIG_USB_EHCI_TEGRA=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/nyan-big_defconfig b/configs/nyan-big_defconfig index 6d6d8903c2..2017d5c700 100644 --- a/configs/nyan-big_defconfig +++ b/configs/nyan-big_defconfig @@ -93,9 +93,6 @@ CONFIG_USB_EHCI_TEGRA=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y CONFIG_VIDEO=y diff --git a/configs/p2371-0000_defconfig b/configs/p2371-0000_defconfig index e8074914c8..2962a7db75 100644 --- a/configs/p2371-0000_defconfig +++ b/configs/p2371-0000_defconfig @@ -48,8 +48,5 @@ CONFIG_USB_EHCI_TEGRA=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/p2371-2180_defconfig b/configs/p2371-2180_defconfig index ea62e18f73..6b44361b5b 100644 --- a/configs/p2371-2180_defconfig +++ b/configs/p2371-2180_defconfig @@ -57,8 +57,5 @@ CONFIG_USB_EHCI_TEGRA=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/p2571_defconfig b/configs/p2571_defconfig index bc3fb3e5ae..00b0dc6109 100644 --- a/configs/p2571_defconfig +++ b/configs/p2571_defconfig @@ -49,8 +49,5 @@ CONFIG_USB_EHCI_TEGRA=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/p3450-0000_defconfig b/configs/p3450-0000_defconfig index 8e16afde91..d35bea4220 100644 --- a/configs/p3450-0000_defconfig +++ b/configs/p3450-0000_defconfig @@ -61,8 +61,5 @@ CONFIG_USB_EHCI_TEGRA=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/configs/venice2_defconfig b/configs/venice2_defconfig index 09fa53199a..c30bd2538c 100644 --- a/configs/venice2_defconfig +++ b/configs/venice2_defconfig @@ -59,8 +59,5 @@ CONFIG_USB_EHCI_TEGRA=y CONFIG_USB_HOST_ETHER=y CONFIG_USB_ETHER_ASIX=y CONFIG_USB_GADGET=y -CONFIG_USB_GADGET_MANUFACTURER="NVIDIA" -CONFIG_USB_GADGET_VENDOR_NUM=0x0955 -CONFIG_USB_GADGET_PRODUCT_NUM=0x701a CONFIG_CI_UDC=y CONFIG_USB_GADGET_DOWNLOAD=y diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index e120efeb00..941f97c96d 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig @@ -40,6 +40,7 @@ if USB_GADGET config USB_GADGET_MANUFACTURER string "Vendor name of the USB device" + default "NVIDIA" if ARCH_TEGRA default "Allwinner Technology" if ARCH_SUNXI default "Rockchip" if ARCH_ROCKCHIP default "U-Boot" @@ -49,6 +50,7 @@ config USB_GADGET_MANUFACTURER config USB_GADGET_VENDOR_NUM hex "Vendor ID of the USB device" + default 0x0955 if ARCH_TEGRA default 0x1f3a if ARCH_SUNXI default 0x2207 if ARCH_ROCKCHIP default 0x0 @@ -59,6 +61,7 @@ config USB_GADGET_VENDOR_NUM config USB_GADGET_PRODUCT_NUM hex "Product ID of the USB device" + default 0x701a if ARCH_TEGRA default 0x1010 if ARCH_SUNXI default 0x310a if ROCKCHIP_RK3036 default 0x300a if ROCKCHIP_RK3066 -- cgit v1.2.3 From 1a7ce63c08837bfd144a3f772d32f326c454fc86 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:31 +0200 Subject: ARM: tegra: add late init support Late init function allows passing values like identifiers and perform device specific configurations of pre-boot stage. Tested-by: Andreas Westman Dorcsak # ASUS TF T30 Tested-by: Svyatoslav Ryhel # LG P895 T30 Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom --- arch/arm/include/asm/arch-tegra/sys_proto.h | 6 ++++++ arch/arm/mach-tegra/board2.c | 2 ++ 2 files changed, 8 insertions(+) diff --git a/arch/arm/include/asm/arch-tegra/sys_proto.h b/arch/arm/include/asm/arch-tegra/sys_proto.h index c3a2673e6c..566666a9a0 100644 --- a/arch/arm/include/asm/arch-tegra/sys_proto.h +++ b/arch/arm/include/asm/arch-tegra/sys_proto.h @@ -31,4 +31,10 @@ int tegra_lcd_pmic_init(int board_id); */ int nvidia_board_init(void); +/** + * nvidia_board_late_init() - perform any board-specific + * init on late stages + */ +void nvidia_board_late_init(void); + #endif diff --git a/arch/arm/mach-tegra/board2.c b/arch/arm/mach-tegra/board2.c index c7a45f4ff8..0df18360ca 100644 --- a/arch/arm/mach-tegra/board2.c +++ b/arch/arm/mach-tegra/board2.c @@ -56,6 +56,7 @@ __weak void gpio_early_init_uart(void) {} __weak void pin_mux_display(void) {} __weak void start_cpu_fan(void) {} __weak void cboot_late_init(void) {} +__weak void nvidia_board_late_init(void) {} #if defined(CONFIG_TEGRA_NAND) __weak void pin_mux_nand(void) @@ -267,6 +268,7 @@ int board_late_init(void) #endif start_cpu_fan(); cboot_late_init(); + nvidia_board_late_init(); return 0; } -- cgit v1.2.3 From 4213d52b332e9fad41a199f022fbc104d6b2d946 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:32 +0200 Subject: ARM: tegra: create common pre-dm i2c write This implementation allows pwr i2c writing on early SPL stages when DM is not yet setup. Such writing is needed to configure main voltages of PMIC on early SPL for bootloader to boot properly. Tested-by: Andreas Westman Dorcsak # ASUS TF T30 Tested-by: Robert Eckelmann # ASUS TF101 T20 Tested-by: Svyatoslav Ryhel # LG P895 T30 Tested-by: Thierry Reding # T30 and T124 Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom --- arch/arm/include/asm/arch-tegra/tegra_i2c.h | 17 +++++++++++++ arch/arm/mach-tegra/cpu.h | 1 - arch/arm/mach-tegra/tegra124/cpu.c | 4 ++++ arch/arm/mach-tegra/tegra30/cpu.c | 37 ++++++++++------------------- 4 files changed, 33 insertions(+), 26 deletions(-) diff --git a/arch/arm/include/asm/arch-tegra/tegra_i2c.h b/arch/arm/include/asm/arch-tegra/tegra_i2c.h index c49f43251d..afec6bbdda 100644 --- a/arch/arm/include/asm/arch-tegra/tegra_i2c.h +++ b/arch/arm/include/asm/arch-tegra/tegra_i2c.h @@ -8,6 +8,7 @@ #ifndef _TEGRA_I2C_H_ #define _TEGRA_I2C_H_ +#include #include struct udevice; @@ -154,4 +155,20 @@ struct i2c_ctlr { */ int tegra_i2c_get_dvc_bus(struct udevice **busp); +/* Pre-dm section used for initial setup of PMIC */ +#define I2C_SEND_2_BYTES 0x0A02 + +static inline void tegra_i2c_ll_write(uint addr, uint data) +{ + struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; + + writel(addr, ®->cmd_addr0); + writel(0x2, ®->cnfg); + + writel(data, ®->cmd_data1); + writel(I2C_SEND_2_BYTES, ®->cnfg); +} + +void pmic_enable_cpu_vdd(void); + #endif /* _TEGRA_I2C_H_ */ diff --git a/arch/arm/mach-tegra/cpu.h b/arch/arm/mach-tegra/cpu.h index d541825441..006aae3d07 100644 --- a/arch/arm/mach-tegra/cpu.h +++ b/arch/arm/mach-tegra/cpu.h @@ -74,4 +74,3 @@ int tegra_get_chip(void); int tegra_get_sku_info(void); int tegra_get_chip_sku(void); void adjust_pllp_out_freqs(void); -void pmic_enable_cpu_vdd(void); diff --git a/arch/arm/mach-tegra/tegra124/cpu.c b/arch/arm/mach-tegra/tegra124/cpu.c index d5f2683b26..b1bfe8fb5e 100644 --- a/arch/arm/mach-tegra/tegra124/cpu.c +++ b/arch/arm/mach-tegra/tegra124/cpu.c @@ -14,10 +14,14 @@ #include #include #include +#include #include #include #include "../cpu.h" +/* In case this function is not defined */ +__weak void pmic_enable_cpu_vdd(void) {} + /* Tegra124-specific CPU init code */ static void enable_cpu_power_rail(void) diff --git a/arch/arm/mach-tegra/tegra30/cpu.c b/arch/arm/mach-tegra/tegra30/cpu.c index 651edd27ee..6ac45af51a 100644 --- a/arch/arm/mach-tegra/tegra30/cpu.c +++ b/arch/arm/mach-tegra/tegra30/cpu.c @@ -15,23 +15,6 @@ #include #include "../cpu.h" -/* Tegra30-specific CPU init code */ -void tegra_i2c_ll_write_addr(uint addr, uint config) -{ - struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; - - writel(addr, ®->cmd_addr0); - writel(config, ®->cnfg); -} - -void tegra_i2c_ll_write_data(uint data, uint config) -{ - struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; - - writel(data, ®->cmd_data1); - writel(config, ®->cnfg); -} - #define TPS62366A_I2C_ADDR 0xC0 #define TPS62366A_SET1_REG 0x01 #define TPS62366A_SET1_DATA (0x4600 | TPS62366A_SET1_REG) @@ -45,7 +28,9 @@ void tegra_i2c_ll_write_data(uint data, uint config) #define TPS65911_VDDCTRL_SR_REG 0x27 #define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) #define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) -#define I2C_SEND_2_BYTES 0x0A02 + +/* In case this function is not defined */ +__weak void pmic_enable_cpu_vdd(void) {} static void enable_cpu_power_rail(void) { @@ -59,12 +44,12 @@ static void enable_cpu_power_rail(void) /* Set VDD_CORE to 1.200V. */ #ifdef CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 - tegra_i2c_ll_write_addr(TPS62366A_I2C_ADDR, 2); - tegra_i2c_ll_write_data(TPS62366A_SET1_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(TPS62366A_I2C_ADDR, + TPS62366A_SET1_DATA); #endif #ifdef CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 - tegra_i2c_ll_write_addr(TPS62361B_I2C_ADDR, 2); - tegra_i2c_ll_write_data(TPS62361B_SET3_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(TPS62361B_I2C_ADDR, + TPS62361B_SET3_DATA); #endif udelay(1000); @@ -72,10 +57,11 @@ static void enable_cpu_power_rail(void) * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. * First set VDD to 1.0125V, then enable the VDD regulator. */ - tegra_i2c_ll_write_addr(TPS65911_I2C_ADDR, 2); - tegra_i2c_ll_write_data(TPS65911_VDDCTRL_OP_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_OP_DATA); udelay(1000); - tegra_i2c_ll_write_data(TPS65911_VDDCTRL_SR_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_SR_DATA); udelay(10 * 1000); } @@ -142,6 +128,7 @@ void start_cpu(u32 reset_vector) /* Enable VDD_CPU */ enable_cpu_power_rail(); + pmic_enable_cpu_vdd(); set_cpu_running(0); -- cgit v1.2.3 From e7184debf4c2f35518811990473103793a1f639d Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:33 +0200 Subject: board: tegra124: switch to updated pre-dm i2c write Configure PMIC for early stages using updated i2c write. Tested-by: Thierry Reding # Jetson TK1 T124 Signed-off-by: Svyatoslav Ryhel Reviewed-by: Simon Glass Signed-off-by: Tom --- board/nvidia/venice2/as3722_init.c | 65 ++++++++++++++++---------- board/nvidia/venice2/as3722_init.h | 43 ----------------- board/toradex/apalis-tk1/as3722_init.c | 85 +++++++++++++++++++--------------- board/toradex/apalis-tk1/as3722_init.h | 40 ---------------- 4 files changed, 88 insertions(+), 145 deletions(-) delete mode 100644 board/nvidia/venice2/as3722_init.h delete mode 100644 board/toradex/apalis-tk1/as3722_init.h diff --git a/board/nvidia/venice2/as3722_init.c b/board/nvidia/venice2/as3722_init.c index ba676547d3..395bdd99c7 100644 --- a/board/nvidia/venice2/as3722_init.c +++ b/board/nvidia/venice2/as3722_init.c @@ -9,25 +9,42 @@ #include #include #include -#include "as3722_init.h" -/* AS3722-PMIC-specific early init code - get CPU rails up, etc */ +/* AS3722-PMIC-specific early init regs */ -void tegra_i2c_ll_write_addr(uint addr, uint config) -{ - struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; +#define AS3722_I2C_ADDR 0x80 - writel(addr, ®->cmd_addr0); - writel(config, ®->cnfg); -} +#define AS3722_SD0VOLTAGE_REG 0x00 /* CPU */ +#define AS3722_SD1VOLTAGE_REG 0x01 /* CORE, already set by OTP */ +#define AS3722_SD6VOLTAGE_REG 0x06 /* GPU */ +#define AS3722_SDCONTROL_REG 0x4D -void tegra_i2c_ll_write_data(uint data, uint config) -{ - struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; +#define AS3722_LDO2VOLTAGE_REG 0x12 /* VPP_FUSE */ +#define AS3722_LDO6VOLTAGE_REG 0x16 /* VDD_SDMMC */ +#define AS3722_LDCONTROL_REG 0x4E - writel(data, ®->cmd_data1); - writel(config, ®->cnfg); -} +#if defined(CONFIG_TARGET_VENICE2) +#define AS3722_SD0VOLTAGE_DATA (0x2800 | AS3722_SD0VOLTAGE_REG) +#else /* TK1 or Nyan-Big */ +#define AS3722_SD0VOLTAGE_DATA (0x3C00 | AS3722_SD0VOLTAGE_REG) +#endif +#define AS3722_SD0CONTROL_DATA (0x0100 | AS3722_SDCONTROL_REG) + +#if defined(CONFIG_TARGET_JETSON_TK1) || defined(CONFIG_TARGET_CEI_TK1_SOM) +#define AS3722_SD1VOLTAGE_DATA (0x2800 | AS3722_SD1VOLTAGE_REG) +#define AS3722_SD1CONTROL_DATA (0x0200 | AS3722_SDCONTROL_REG) +#endif + +#define AS3722_SD6CONTROL_DATA (0x4000 | AS3722_SDCONTROL_REG) +#define AS3722_SD6VOLTAGE_DATA (0x2800 | AS3722_SD6VOLTAGE_REG) + +#define AS3722_LDO2CONTROL_DATA (0x0400 | AS3722_LDCONTROL_REG) +#define AS3722_LDO2VOLTAGE_DATA (0x1000 | AS3722_LDO2VOLTAGE_REG) + +#define AS3722_LDO6CONTROL_DATA (0x4000 | AS3722_LDCONTROL_REG) +#define AS3722_LDO6VOLTAGE_DATA (0x3F00 | AS3722_LDO6VOLTAGE_REG) + +/* AS3722-PMIC-specific early init code - get CPU rails up, etc */ void pmic_enable_cpu_vdd(void) { @@ -37,8 +54,8 @@ void pmic_enable_cpu_vdd(void) /* Set up VDD_CORE, for boards where OTP is incorrect*/ debug("%s: Setting VDD_CORE via AS3722 reg 1\n", __func__); /* Configure VDD_CORE via the AS3722 PMIC on the PWR I2C bus */ - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(AS3722_SD1VOLTAGE_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, + AS3722_SD1VOLTAGE_DATA); /* * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. * tegra_i2c_ll_write_data(AS3722_SD1CONTROL_DATA, I2C_SEND_2_BYTES); @@ -51,8 +68,8 @@ void pmic_enable_cpu_vdd(void) * Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus. * First set VDD to 1.0V, then enable the VDD regulator. */ - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(AS3722_SD0VOLTAGE_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, + AS3722_SD0VOLTAGE_DATA); /* * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. * tegra_i2c_ll_write_data(AS3722_SD0CONTROL_DATA, I2C_SEND_2_BYTES); @@ -64,8 +81,8 @@ void pmic_enable_cpu_vdd(void) * Bring up VDD_GPU via the AS3722 PMIC on the PWR I2C bus. * First set VDD to 1.0V, then enable the VDD regulator. */ - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(AS3722_SD6VOLTAGE_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, + AS3722_SD6VOLTAGE_DATA); /* * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. * tegra_i2c_ll_write_data(AS3722_SD6CONTROL_DATA, I2C_SEND_2_BYTES); @@ -77,8 +94,8 @@ void pmic_enable_cpu_vdd(void) * Bring up VPP_FUSE via the AS3722 PMIC on the PWR I2C bus. * First set VDD to 1.2V, then enable the VDD regulator. */ - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(AS3722_LDO2VOLTAGE_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, + AS3722_LDO2VOLTAGE_DATA); /* * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled. * tegra_i2c_ll_write_data(AS3722_LDO2CONTROL_DATA, I2C_SEND_2_BYTES); @@ -93,8 +110,8 @@ void pmic_enable_cpu_vdd(void) * NOTE: We do this early because doing it later seems to hose the CPU * power rail/partition startup. Need to debug. */ - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(AS3722_LDO6VOLTAGE_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, + AS3722_LDO6VOLTAGE_DATA); /* * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled. * tegra_i2c_ll_write_data(AS3722_LDO6CONTROL_DATA, I2C_SEND_2_BYTES); diff --git a/board/nvidia/venice2/as3722_init.h b/board/nvidia/venice2/as3722_init.h deleted file mode 100644 index 17e7d76ae7..0000000000 --- a/board/nvidia/venice2/as3722_init.h +++ /dev/null @@ -1,43 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * (C) Copyright 2013 - * NVIDIA Corporation - */ - -/* AS3722-PMIC-specific early init regs */ - -#define AS3722_I2C_ADDR 0x80 - -#define AS3722_SD0VOLTAGE_REG 0x00 /* CPU */ -#define AS3722_SD1VOLTAGE_REG 0x01 /* CORE, already set by OTP */ -#define AS3722_SD6VOLTAGE_REG 0x06 /* GPU */ -#define AS3722_SDCONTROL_REG 0x4D - -#define AS3722_LDO2VOLTAGE_REG 0x12 /* VPP_FUSE */ -#define AS3722_LDO6VOLTAGE_REG 0x16 /* VDD_SDMMC */ -#define AS3722_LDCONTROL_REG 0x4E - -#if defined(CONFIG_TARGET_VENICE2) -#define AS3722_SD0VOLTAGE_DATA (0x2800 | AS3722_SD0VOLTAGE_REG) -#else /* TK1 or Nyan-Big */ -#define AS3722_SD0VOLTAGE_DATA (0x3C00 | AS3722_SD0VOLTAGE_REG) -#endif -#define AS3722_SD0CONTROL_DATA (0x0100 | AS3722_SDCONTROL_REG) - -#if defined(CONFIG_TARGET_JETSON_TK1) || defined(CONFIG_TARGET_CEI_TK1_SOM) -#define AS3722_SD1VOLTAGE_DATA (0x2800 | AS3722_SD1VOLTAGE_REG) -#define AS3722_SD1CONTROL_DATA (0x0200 | AS3722_SDCONTROL_REG) -#endif - -#define AS3722_SD6CONTROL_DATA (0x4000 | AS3722_SDCONTROL_REG) -#define AS3722_SD6VOLTAGE_DATA (0x2800 | AS3722_SD6VOLTAGE_REG) - -#define AS3722_LDO2CONTROL_DATA (0x0400 | AS3722_LDCONTROL_REG) -#define AS3722_LDO2VOLTAGE_DATA (0x1000 | AS3722_LDO2VOLTAGE_REG) - -#define AS3722_LDO6CONTROL_DATA (0x4000 | AS3722_LDCONTROL_REG) -#define AS3722_LDO6VOLTAGE_DATA (0x3F00 | AS3722_LDO6VOLTAGE_REG) - -#define I2C_SEND_2_BYTES 0x0A02 - -void pmic_enable_cpu_vdd(void); diff --git a/board/toradex/apalis-tk1/as3722_init.c b/board/toradex/apalis-tk1/as3722_init.c index 68169f5548..e9bd1028be 100644 --- a/board/toradex/apalis-tk1/as3722_init.c +++ b/board/toradex/apalis-tk1/as3722_init.c @@ -8,25 +8,40 @@ #include #include #include -#include "as3722_init.h" -/* AS3722-PMIC-specific early init code - get CPU rails up, etc */ +/* AS3722-PMIC-specific early init regs */ -void tegra_i2c_ll_write_addr(uint addr, uint config) -{ - struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; +#define AS3722_I2C_ADDR 0x80 - writel(addr, ®->cmd_addr0); - writel(config, ®->cnfg); -} +#define AS3722_SD0VOLTAGE_REG 0x00 /* CPU */ +#define AS3722_SD1VOLTAGE_REG 0x01 /* CORE, already set by OTP */ +#define AS3722_SD6VOLTAGE_REG 0x06 /* GPU */ +#define AS3722_SDCONTROL_REG 0x4D -void tegra_i2c_ll_write_data(uint data, uint config) -{ - struct i2c_ctlr *reg = (struct i2c_ctlr *)TEGRA_DVC_BASE; +#define AS3722_LDO1VOLTAGE_REG 0x11 /* VDD_SDMMC1 */ +#define AS3722_LDO2VOLTAGE_REG 0x12 /* VPP_FUSE */ +#define AS3722_LDO6VOLTAGE_REG 0x16 /* VDD_SDMMC3 */ +#define AS3722_LDCONTROL_REG 0x4E - writel(data, ®->cmd_data1); - writel(config, ®->cnfg); -} +#define AS3722_SD0VOLTAGE_DATA (0x3C00 | AS3722_SD0VOLTAGE_REG) +#define AS3722_SD0CONTROL_DATA (0x0100 | AS3722_SDCONTROL_REG) + +#define AS3722_SD1VOLTAGE_DATA (0x3200 | AS3722_SD1VOLTAGE_REG) +#define AS3722_SD1CONTROL_DATA (0x0200 | AS3722_SDCONTROL_REG) + +#define AS3722_SD6CONTROL_DATA (0x4000 | AS3722_SDCONTROL_REG) +#define AS3722_SD6VOLTAGE_DATA (0x2800 | AS3722_SD6VOLTAGE_REG) + +#define AS3722_LDO1CONTROL_DATA (0x0200 | AS3722_LDCONTROL_REG) +#define AS3722_LDO1VOLTAGE_DATA (0x7F00 | AS3722_LDO1VOLTAGE_REG) + +#define AS3722_LDO2CONTROL_DATA (0x0400 | AS3722_LDCONTROL_REG) +#define AS3722_LDO2VOLTAGE_DATA (0x1000 | AS3722_LDO2VOLTAGE_REG) + +#define AS3722_LDO6CONTROL_DATA (0x4000 | AS3722_LDCONTROL_REG) +#define AS3722_LDO6VOLTAGE_DATA (0x3F00 | AS3722_LDO6VOLTAGE_REG) + +/* AS3722-PMIC-specific early init code - get CPU rails up, etc */ void pmic_enable_cpu_vdd(void) { @@ -36,8 +51,8 @@ void pmic_enable_cpu_vdd(void) /* Set up VDD_CORE, for boards where OTP is incorrect*/ debug("%s: Setting VDD_CORE via AS3722 reg 1\n", __func__); /* Configure VDD_CORE via the AS3722 PMIC on the PWR I2C bus */ - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(AS3722_SD1VOLTAGE_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, + AS3722_SD1VOLTAGE_DATA); /* * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. * tegra_i2c_ll_write_data(AS3722_SD1CONTROL_DATA, I2C_SEND_2_BYTES); @@ -49,23 +64,17 @@ void pmic_enable_cpu_vdd(void) * Make sure all non-fused regulators are down. * That way we're in known state after software reboot from linux */ - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(0x0003, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, 0x0003); udelay(10 * 1000); - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(0x0004, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, 0x0004); udelay(10 * 1000); - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(0x001b, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, 0x001b); udelay(10 * 1000); - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(0x0014, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, 0x0014); udelay(10 * 1000); - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(0x001a, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, 0x001a); udelay(10 * 1000); - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(0x0019, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, 0x0019); udelay(10 * 1000); debug("%s: Setting VDD_CPU to 1.0V via AS3722 reg 0/4D\n", __func__); @@ -73,8 +82,8 @@ void pmic_enable_cpu_vdd(void) * Bring up VDD_CPU via the AS3722 PMIC on the PWR I2C bus. * First set VDD to 1.0V, then enable the VDD regulator. */ - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(AS3722_SD0VOLTAGE_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, + AS3722_SD0VOLTAGE_DATA); /* * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. * tegra_i2c_ll_write_data(AS3722_SD0CONTROL_DATA, I2C_SEND_2_BYTES); @@ -86,8 +95,8 @@ void pmic_enable_cpu_vdd(void) * Bring up VDD_GPU via the AS3722 PMIC on the PWR I2C bus. * First set VDD to 1.0V, then enable the VDD regulator. */ - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(AS3722_SD6VOLTAGE_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, + AS3722_SD6VOLTAGE_DATA); /* * Don't write SDCONTROL - it's already 0x7F, i.e. all SDs enabled. * tegra_i2c_ll_write_data(AS3722_SD6CONTROL_DATA, I2C_SEND_2_BYTES); @@ -99,8 +108,8 @@ void pmic_enable_cpu_vdd(void) * Bring up VPP_FUSE via the AS3722 PMIC on the PWR I2C bus. * First set VDD to 1.2V, then enable the VDD regulator. */ - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(AS3722_LDO2VOLTAGE_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, + AS3722_LDO2VOLTAGE_DATA); /* * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled. * tegra_i2c_ll_write_data(AS3722_LDO2CONTROL_DATA, I2C_SEND_2_BYTES); @@ -115,8 +124,8 @@ void pmic_enable_cpu_vdd(void) * NOTE: We do this early because doing it later seems to hose the CPU * power rail/partition startup. Need to debug. */ - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(AS3722_LDO1VOLTAGE_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, + AS3722_LDO1VOLTAGE_DATA); /* * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled. * tegra_i2c_ll_write_data(AS3722_LDO1CONTROL_DATA, I2C_SEND_2_BYTES); @@ -131,8 +140,8 @@ void pmic_enable_cpu_vdd(void) * NOTE: We do this early because doing it later seems to hose the CPU * power rail/partition startup. Need to debug. */ - tegra_i2c_ll_write_addr(AS3722_I2C_ADDR, 2); - tegra_i2c_ll_write_data(AS3722_LDO6VOLTAGE_DATA, I2C_SEND_2_BYTES); + tegra_i2c_ll_write(AS3722_I2C_ADDR, + AS3722_LDO6VOLTAGE_DATA); /* * Don't write LDCONTROL - it's already 0xFF, i.e. all LDOs enabled. * tegra_i2c_ll_write_data(AS3722_LDO6CONTROL_DATA, I2C_SEND_2_BYTES); diff --git a/board/toradex/apalis-tk1/as3722_init.h b/board/toradex/apalis-tk1/as3722_init.h deleted file mode 100644 index 99836de966..0000000000 --- a/board/toradex/apalis-tk1/as3722_init.h +++ /dev/null @@ -1,40 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2012-2016 Toradex, Inc. - */ - -/* AS3722-PMIC-specific early init regs */ - -#define AS3722_I2C_ADDR 0x80 - -#define AS3722_SD0VOLTAGE_REG 0x00 /* CPU */ -#define AS3722_SD1VOLTAGE_REG 0x01 /* CORE, already set by OTP */ -#define AS3722_SD6VOLTAGE_REG 0x06 /* GPU */ -#define AS3722_SDCONTROL_REG 0x4D - -#define AS3722_LDO1VOLTAGE_REG 0x11 /* VDD_SDMMC1 */ -#define AS3722_LDO2VOLTAGE_REG 0x12 /* VPP_FUSE */ -#define AS3722_LDO6VOLTAGE_REG 0x16 /* VDD_SDMMC3 */ -#define AS3722_LDCONTROL_REG 0x4E - -#define AS3722_SD0VOLTAGE_DATA (0x3C00 | AS3722_SD0VOLTAGE_REG) -#define AS3722_SD0CONTROL_DATA (0x0100 | AS3722_SDCONTROL_REG) - -#define AS3722_SD1VOLTAGE_DATA (0x3200 | AS3722_SD1VOLTAGE_REG) -#define AS3722_SD1CONTROL_DATA (0x0200 | AS3722_SDCONTROL_REG) - -#define AS3722_SD6CONTROL_DATA (0x4000 | AS3722_SDCONTROL_REG) -#define AS3722_SD6VOLTAGE_DATA (0x2800 | AS3722_SD6VOLTAGE_REG) - -#define AS3722_LDO1CONTROL_DATA (0x0200 | AS3722_LDCONTROL_REG) -#define AS3722_LDO1VOLTAGE_DATA (0x7F00 | AS3722_LDO1VOLTAGE_REG) - -#define AS3722_LDO2CONTROL_DATA (0x0400 | AS3722_LDCONTROL_REG) -#define AS3722_LDO2VOLTAGE_DATA (0x1000 | AS3722_LDO2VOLTAGE_REG) - -#define AS3722_LDO6CONTROL_DATA (0x4000 | AS3722_LDCONTROL_REG) -#define AS3722_LDO6VOLTAGE_DATA (0x3F00 | AS3722_LDO6VOLTAGE_REG) - -#define I2C_SEND_2_BYTES 0x0A02 - -void pmic_enable_cpu_vdd(void); -- cgit v1.2.3 From 5668c75ce97d9209d4a0d193b16791a100cc99a8 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:34 +0200 Subject: board: tegra30: switch to updated pre-dm i2c write Configure PMIC voltages for early stages using updated early i2c write. Tested-by: Thierry Reding # Beaver T30 Signed-off-by: Svyatoslav Ryhel Reviewed-by: Simon Glass Signed-off-by: Tom --- arch/arm/mach-tegra/tegra30/Kconfig | 8 ------ arch/arm/mach-tegra/tegra30/cpu.c | 36 ------------------------ board/avionic-design/tec-ng/Makefile | 4 ++- board/avionic-design/tec-ng/tec-ng-spl.c | 34 +++++++++++++++++++++++ board/nvidia/beaver/Makefile | 2 ++ board/nvidia/beaver/beaver-spl.c | 43 +++++++++++++++++++++++++++++ board/nvidia/cardhu/Makefile | 4 ++- board/nvidia/cardhu/cardhu-spl.c | 43 +++++++++++++++++++++++++++++ board/toradex/apalis_t30/Makefile | 2 ++ board/toradex/apalis_t30/apalis_t30-spl.c | 34 +++++++++++++++++++++++ board/toradex/colibri_t30/Makefile | 2 ++ board/toradex/colibri_t30/colibri_t30-spl.c | 34 +++++++++++++++++++++++ 12 files changed, 200 insertions(+), 46 deletions(-) create mode 100644 board/avionic-design/tec-ng/tec-ng-spl.c create mode 100644 board/nvidia/beaver/beaver-spl.c create mode 100644 board/nvidia/cardhu/cardhu-spl.c create mode 100644 board/toradex/apalis_t30/apalis_t30-spl.c create mode 100644 board/toradex/colibri_t30/colibri_t30-spl.c diff --git a/arch/arm/mach-tegra/tegra30/Kconfig b/arch/arm/mach-tegra/tegra30/Kconfig index 5619d1cd42..85b8ce294f 100644 --- a/arch/arm/mach-tegra/tegra30/Kconfig +++ b/arch/arm/mach-tegra/tegra30/Kconfig @@ -1,11 +1,5 @@ if TEGRA30 -config TEGRA_VDD_CORE_TPS62361B_SET3 - bool - -config TEGRA_VDD_CORE_TPS62366A_SET1 - bool - choice prompt "Tegra30 board select" optional @@ -17,12 +11,10 @@ config TARGET_APALIS_T30 config TARGET_BEAVER bool "NVIDIA Tegra30 Beaver evaluation board" select BOARD_LATE_INIT - select TEGRA_VDD_CORE_TPS62366A_SET1 config TARGET_CARDHU bool "NVIDIA Tegra30 Cardhu evaluation board" select BOARD_LATE_INIT - select TEGRA_VDD_CORE_TPS62361B_SET3 config TARGET_COLIBRI_T30 bool "Toradex Colibri T30 board" diff --git a/arch/arm/mach-tegra/tegra30/cpu.c b/arch/arm/mach-tegra/tegra30/cpu.c index 6ac45af51a..60bbf13ea5 100644 --- a/arch/arm/mach-tegra/tegra30/cpu.c +++ b/arch/arm/mach-tegra/tegra30/cpu.c @@ -15,20 +15,6 @@ #include #include "../cpu.h" -#define TPS62366A_I2C_ADDR 0xC0 -#define TPS62366A_SET1_REG 0x01 -#define TPS62366A_SET1_DATA (0x4600 | TPS62366A_SET1_REG) - -#define TPS62361B_I2C_ADDR 0xC0 -#define TPS62361B_SET3_REG 0x03 -#define TPS62361B_SET3_DATA (0x4600 | TPS62361B_SET3_REG) - -#define TPS65911_I2C_ADDR 0x5A -#define TPS65911_VDDCTRL_OP_REG 0x28 -#define TPS65911_VDDCTRL_SR_REG 0x27 -#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) -#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) - /* In case this function is not defined */ __weak void pmic_enable_cpu_vdd(void) {} @@ -41,28 +27,6 @@ static void enable_cpu_power_rail(void) reg = readl(&pmc->pmc_cntrl); reg |= CPUPWRREQ_OE; writel(reg, &pmc->pmc_cntrl); - - /* Set VDD_CORE to 1.200V. */ -#ifdef CONFIG_TEGRA_VDD_CORE_TPS62366A_SET1 - tegra_i2c_ll_write(TPS62366A_I2C_ADDR, - TPS62366A_SET1_DATA); -#endif -#ifdef CONFIG_TEGRA_VDD_CORE_TPS62361B_SET3 - tegra_i2c_ll_write(TPS62361B_I2C_ADDR, - TPS62361B_SET3_DATA); -#endif - udelay(1000); - - /* - * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. - * First set VDD to 1.0125V, then enable the VDD regulator. - */ - tegra_i2c_ll_write(TPS65911_I2C_ADDR, - TPS65911_VDDCTRL_OP_DATA); - udelay(1000); - tegra_i2c_ll_write(TPS65911_I2C_ADDR, - TPS65911_VDDCTRL_SR_DATA); - udelay(10 * 1000); } /** diff --git a/board/avionic-design/tec-ng/Makefile b/board/avionic-design/tec-ng/Makefile index 46df14d991..d6890e5797 100644 --- a/board/avionic-design/tec-ng/Makefile +++ b/board/avionic-design/tec-ng/Makefile @@ -3,4 +3,6 @@ # (C) Copyright 2013 # Avionic Design GmbH -obj-y := ../common/tamonten-ng.o +obj-$(CONFIG_SPL_BUILD) += tec-ng-spl.o + +obj-y += ../common/tamonten-ng.o diff --git a/board/avionic-design/tec-ng/tec-ng-spl.c b/board/avionic-design/tec-ng/tec-ng-spl.c new file mode 100644 index 0000000000..6e54464183 --- /dev/null +++ b/board/avionic-design/tec-ng/tec-ng-spl.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2021 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +/* I2C addr is in 8 bit */ +#define TPS65911_I2C_ADDR 0x5A +#define TPS65911_VDDCTRL_OP_REG 0x28 +#define TPS65911_VDDCTRL_SR_REG 0x27 +#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) +#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) + +void pmic_enable_cpu_vdd(void) +{ + /* + * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. + * First set VDD to 1.0125V, then enable the VDD regulator. + */ + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_OP_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_SR_DATA); + udelay(10 * 1000); +} diff --git a/board/nvidia/beaver/Makefile b/board/nvidia/beaver/Makefile index 80cff3eb9c..5e9e70825c 100644 --- a/board/nvidia/beaver/Makefile +++ b/board/nvidia/beaver/Makefile @@ -2,4 +2,6 @@ # # Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. +obj-$(CONFIG_SPL_BUILD) += beaver-spl.o + obj-y = ../cardhu/cardhu.o diff --git a/board/nvidia/beaver/beaver-spl.c b/board/nvidia/beaver/beaver-spl.c new file mode 100644 index 0000000000..b5d0c14854 --- /dev/null +++ b/board/nvidia/beaver/beaver-spl.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2021 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +/* I2C addr is in 8 bit */ +#define TPS65911_I2C_ADDR 0x5A +#define TPS65911_VDDCTRL_OP_REG 0x28 +#define TPS65911_VDDCTRL_SR_REG 0x27 +#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) +#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) + +#define TPS62366A_I2C_ADDR 0xC0 +#define TPS62366A_SET1_REG 0x01 +#define TPS62366A_SET1_DATA (0x4600 | TPS62366A_SET1_REG) + +void pmic_enable_cpu_vdd(void) +{ + /* Set VDD_CORE to 1.200V. */ + tegra_i2c_ll_write(TPS62366A_I2C_ADDR, + TPS62366A_SET1_DATA); + + udelay(1000); + + /* + * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. + * First set VDD to 1.0125V, then enable the VDD regulator. + */ + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_OP_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_SR_DATA); + udelay(10 * 1000); +} diff --git a/board/nvidia/cardhu/Makefile b/board/nvidia/cardhu/Makefile index 95971053d9..6f480cdfd3 100644 --- a/board/nvidia/cardhu/Makefile +++ b/board/nvidia/cardhu/Makefile @@ -3,4 +3,6 @@ # (C) Copyright 2010-2012 # NVIDIA Corporation -obj-y := cardhu.o +obj-$(CONFIG_SPL_BUILD) += cardhu-spl.o + +obj-y += cardhu.o diff --git a/board/nvidia/cardhu/cardhu-spl.c b/board/nvidia/cardhu/cardhu-spl.c new file mode 100644 index 0000000000..de2fa300f1 --- /dev/null +++ b/board/nvidia/cardhu/cardhu-spl.c @@ -0,0 +1,43 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2021 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +/* I2C addr is in 8 bit */ +#define TPS65911_I2C_ADDR 0x5A +#define TPS65911_VDDCTRL_OP_REG 0x28 +#define TPS65911_VDDCTRL_SR_REG 0x27 +#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) +#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) + +#define TPS62361B_I2C_ADDR 0xC0 +#define TPS62361B_SET3_REG 0x03 +#define TPS62361B_SET3_DATA (0x4600 | TPS62361B_SET3_REG) + +void pmic_enable_cpu_vdd(void) +{ + /* Set VDD_CORE to 1.200V. */ + tegra_i2c_ll_write(TPS62361B_I2C_ADDR, + TPS62361B_SET3_DATA); + + udelay(1000); + + /* + * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. + * First set VDD to 1.0125V, then enable the VDD regulator. + */ + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_OP_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_SR_DATA); + udelay(10 * 1000); +} diff --git a/board/toradex/apalis_t30/Makefile b/board/toradex/apalis_t30/Makefile index 0ea3d8f217..eed607043f 100644 --- a/board/toradex/apalis_t30/Makefile +++ b/board/toradex/apalis_t30/Makefile @@ -1,4 +1,6 @@ # Copyright (c) 2014 Marcel Ziswiler # SPDX-License-Identifier: GPL-2.0+ +obj-$(CONFIG_SPL_BUILD) += apalis_t30-spl.o + obj-y += apalis_t30.o diff --git a/board/toradex/apalis_t30/apalis_t30-spl.c b/board/toradex/apalis_t30/apalis_t30-spl.c new file mode 100644 index 0000000000..6e54464183 --- /dev/null +++ b/board/toradex/apalis_t30/apalis_t30-spl.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2021 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +/* I2C addr is in 8 bit */ +#define TPS65911_I2C_ADDR 0x5A +#define TPS65911_VDDCTRL_OP_REG 0x28 +#define TPS65911_VDDCTRL_SR_REG 0x27 +#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) +#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) + +void pmic_enable_cpu_vdd(void) +{ + /* + * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. + * First set VDD to 1.0125V, then enable the VDD regulator. + */ + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_OP_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_SR_DATA); + udelay(10 * 1000); +} diff --git a/board/toradex/colibri_t30/Makefile b/board/toradex/colibri_t30/Makefile index 4242902dae..8f333235b1 100644 --- a/board/toradex/colibri_t30/Makefile +++ b/board/toradex/colibri_t30/Makefile @@ -1,4 +1,6 @@ # Copyright (c) 2013-2014 Stefan Agner # SPDX-License-Identifier: GPL-2.0+ +obj-$(CONFIG_SPL_BUILD) += colibri_t30-spl.o + obj-y += colibri_t30.o diff --git a/board/toradex/colibri_t30/colibri_t30-spl.c b/board/toradex/colibri_t30/colibri_t30-spl.c new file mode 100644 index 0000000000..6e54464183 --- /dev/null +++ b/board/toradex/colibri_t30/colibri_t30-spl.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * (C) Copyright 2010-2013 + * NVIDIA Corporation + * + * (C) Copyright 2021 + * Svyatoslav Ryhel + */ + +#include +#include +#include + +/* I2C addr is in 8 bit */ +#define TPS65911_I2C_ADDR 0x5A +#define TPS65911_VDDCTRL_OP_REG 0x28 +#define TPS65911_VDDCTRL_SR_REG 0x27 +#define TPS65911_VDDCTRL_OP_DATA (0x2400 | TPS65911_VDDCTRL_OP_REG) +#define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG) + +void pmic_enable_cpu_vdd(void) +{ + /* + * Bring up CPU VDD via the TPS65911x PMIC on the DVC I2C bus. + * First set VDD to 1.0125V, then enable the VDD regulator. + */ + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_OP_DATA); + udelay(1000); + tegra_i2c_ll_write(TPS65911_I2C_ADDR, + TPS65911_VDDCTRL_SR_DATA); + udelay(10 * 1000); +} -- cgit v1.2.3 From 8ed2bd1d1b908ff71925b80b6fe611c5384b407d Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:35 +0200 Subject: ARM: tegra: expose crypto module for all Tegra SoCs Move crypto module from T20 only into common Tegra dir. Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom --- arch/arm/mach-tegra/Kconfig | 5 ++ arch/arm/mach-tegra/Makefile | 1 + arch/arm/mach-tegra/crypto.c | 143 +++++++++++++++++++++++++++++++++++ arch/arm/mach-tegra/crypto.h | 19 +++++ arch/arm/mach-tegra/tegra20/Kconfig | 1 + arch/arm/mach-tegra/tegra20/Makefile | 2 +- arch/arm/mach-tegra/tegra20/crypto.c | 143 ----------------------------------- arch/arm/mach-tegra/tegra20/crypto.h | 19 ----- 8 files changed, 170 insertions(+), 163 deletions(-) create mode 100644 arch/arm/mach-tegra/crypto.c create mode 100644 arch/arm/mach-tegra/crypto.h delete mode 100644 arch/arm/mach-tegra/tegra20/crypto.c delete mode 100644 arch/arm/mach-tegra/tegra20/crypto.h diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 4fc79ebadb..5b0cd92d9e 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -15,6 +15,11 @@ config SPL_SERIAL config TEGRA_CLKRST bool +config TEGRA_CRYPTO + bool "Tegra AES128 crypto module" + select AES + default n + config TEGRA_GP_PADCTRL bool diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index 7165d70a60..9147050b32 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile @@ -16,6 +16,7 @@ obj-$(CONFIG_TEGRA_GP_PADCTRL) += ap.o obj-y += board.o board2.o obj-y += cache.o obj-$(CONFIG_TEGRA_CLKRST) += clock.o +obj-$(CONFIG_$(SPL_)TEGRA_CRYPTO) += crypto.o obj-$(CONFIG_TEGRA_PINCTRL) += pinmux-common.o obj-$(CONFIG_TEGRA_PMC) += powergate.o obj-y += xusb-padctl-dummy.o diff --git a/arch/arm/mach-tegra/crypto.c b/arch/arm/mach-tegra/crypto.c new file mode 100644 index 0000000000..1efaa5c3ec --- /dev/null +++ b/arch/arm/mach-tegra/crypto.c @@ -0,0 +1,143 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2010 - 2011 NVIDIA Corporation + */ + +#include +#include +#include +#include "crypto.h" +#include "uboot_aes.h" + +static u8 zero_key[16]; + +#define AES_CMAC_CONST_RB 0x87 /* from RFC 4493, Figure 2.2 */ + +enum security_op { + SECURITY_SIGN = 1 << 0, /* Sign the data */ + SECURITY_ENCRYPT = 1 << 1, /* Encrypt the data */ +}; + +/** + * Shift a vector left by one bit + * + * \param in Input vector + * \param out Output vector + * \param size Length of vector in bytes + */ +static void left_shift_vector(u8 *in, u8 *out, int size) +{ + int carry = 0; + int i; + + for (i = size - 1; i >= 0; i--) { + out[i] = (in[i] << 1) | carry; + carry = in[i] >> 7; /* get most significant bit */ + } +} + +/** + * Sign a block of data, putting the result into dst. + * + * \param key Input AES key, length AES128_KEY_LENGTH + * \param key_schedule Expanded key to use + * \param src Source data of length 'num_aes_blocks' blocks + * \param dst Destination buffer, length AES128_KEY_LENGTH + * \param num_aes_blocks Number of AES blocks to encrypt + */ +static void sign_object(u8 *key, u8 *key_schedule, u8 *src, u8 *dst, + u32 num_aes_blocks) +{ + u8 tmp_data[AES128_KEY_LENGTH]; + u8 iv[AES128_KEY_LENGTH] = {0}; + u8 left[AES128_KEY_LENGTH]; + u8 k1[AES128_KEY_LENGTH]; + u8 *cbc_chain_data; + unsigned i; + + cbc_chain_data = zero_key; /* Convenient array of 0's for IV */ + + /* compute K1 constant needed by AES-CMAC calculation */ + for (i = 0; i < AES128_KEY_LENGTH; i++) + tmp_data[i] = 0; + + aes_cbc_encrypt_blocks(AES128_KEY_LENGTH, key_schedule, iv, + tmp_data, left, 1); + + left_shift_vector(left, k1, sizeof(left)); + + if ((left[0] >> 7) != 0) /* get MSB of L */ + k1[AES128_KEY_LENGTH - 1] ^= AES_CMAC_CONST_RB; + + /* compute the AES-CMAC value */ + for (i = 0; i < num_aes_blocks; i++) { + /* Apply the chain data */ + aes_apply_cbc_chain_data(cbc_chain_data, src, tmp_data); + + /* for the final block, XOR K1 into the IV */ + if (i == num_aes_blocks - 1) + aes_apply_cbc_chain_data(tmp_data, k1, tmp_data); + + /* encrypt the AES block */ + aes_encrypt(AES128_KEY_LENGTH, tmp_data, + key_schedule, dst); + + debug("sign_obj: block %d of %d\n", i, num_aes_blocks); + + /* Update pointers for next loop. */ + cbc_chain_data = dst; + src += AES128_KEY_LENGTH; + } +} + +/** + * Encrypt and sign a block of data (depending on security mode). + * + * \param key Input AES key, length AES128_KEY_LENGTH + * \param oper Security operations mask to perform (enum security_op) + * \param src Source data + * \param length Size of source data + * \param sig_dst Destination address for signature, AES128_KEY_LENGTH bytes + */ +static int encrypt_and_sign(u8 *key, enum security_op oper, u8 *src, + u32 length, u8 *sig_dst) +{ + u32 num_aes_blocks; + u8 key_schedule[AES128_EXPAND_KEY_LENGTH]; + u8 iv[AES128_KEY_LENGTH] = {0}; + + debug("encrypt_and_sign: length = %d\n", length); + + /* + * The only need for a key is for signing/checksum purposes, so + * if not encrypting, expand a key of 0s. + */ + aes_expand_key(oper & SECURITY_ENCRYPT ? key : zero_key, + AES128_KEY_LENGTH, key_schedule); + + num_aes_blocks = (length + AES128_KEY_LENGTH - 1) / AES128_KEY_LENGTH; + + if (oper & SECURITY_ENCRYPT) { + /* Perform this in place, resulting in src being encrypted. */ + debug("encrypt_and_sign: begin encryption\n"); + aes_cbc_encrypt_blocks(AES128_KEY_LENGTH, key_schedule, iv, src, + src, num_aes_blocks); + debug("encrypt_and_sign: end encryption\n"); + } + + if (oper & SECURITY_SIGN) { + /* encrypt the data, overwriting the result in signature. */ + debug("encrypt_and_sign: begin signing\n"); + sign_object(key, key_schedule, src, sig_dst, num_aes_blocks); + debug("encrypt_and_sign: end signing\n"); + } + + return 0; +} + +int sign_data_block(u8 *source, unsigned length, u8 *signature) +{ + return encrypt_and_sign(zero_key, SECURITY_SIGN, source, + length, signature); +} diff --git a/arch/arm/mach-tegra/crypto.h b/arch/arm/mach-tegra/crypto.h new file mode 100644 index 0000000000..a773d03fc7 --- /dev/null +++ b/arch/arm/mach-tegra/crypto.h @@ -0,0 +1,19 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2010 - 2011 NVIDIA Corporation + */ + +#ifndef _CRYPTO_H_ +#define _CRYPTO_H_ + +/** + * Sign a block of data + * + * \param source Source data + * \param length Size of source data + * \param signature Destination address for signature, AES_KEY_LENGTH bytes + */ +int sign_data_block(u8 *source, unsigned length, u8 *signature); + +#endif /* #ifndef _CRYPTO_H_ */ diff --git a/arch/arm/mach-tegra/tegra20/Kconfig b/arch/arm/mach-tegra/tegra20/Kconfig index 955786c0c4..57d11024bf 100644 --- a/arch/arm/mach-tegra/tegra20/Kconfig +++ b/arch/arm/mach-tegra/tegra20/Kconfig @@ -3,6 +3,7 @@ if TEGRA20 config TEGRA_LP0 bool select TEGRA_CLOCK_SCALING + select TEGRA_CRYPTO config TEGRA_PMU bool diff --git a/arch/arm/mach-tegra/tegra20/Makefile b/arch/arm/mach-tegra/tegra20/Makefile index bb17c90cca..67454ff5f4 100644 --- a/arch/arm/mach-tegra/tegra20/Makefile +++ b/arch/arm/mach-tegra/tegra20/Makefile @@ -13,6 +13,6 @@ CFLAGS_warmboot_avp.o = -march=armv4t -U__LINUX_ARM_ARCH__ \ CFLAGS_REMOVE_warmboot_avp.o := $(LTO_CFLAGS) obj-y += clock.o funcmux.o pinmux.o -obj-$(CONFIG_TEGRA_LP0) += warmboot.o crypto.o warmboot_avp.o +obj-$(CONFIG_TEGRA_LP0) += warmboot.o warmboot_avp.o obj-$(CONFIG_TEGRA_CLOCK_SCALING) += emc.o obj-$(CONFIG_TEGRA_PMU) += pmu.o diff --git a/arch/arm/mach-tegra/tegra20/crypto.c b/arch/arm/mach-tegra/tegra20/crypto.c deleted file mode 100644 index 1efaa5c3ec..0000000000 --- a/arch/arm/mach-tegra/tegra20/crypto.c +++ /dev/null @@ -1,143 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2010 - 2011 NVIDIA Corporation - */ - -#include -#include -#include -#include "crypto.h" -#include "uboot_aes.h" - -static u8 zero_key[16]; - -#define AES_CMAC_CONST_RB 0x87 /* from RFC 4493, Figure 2.2 */ - -enum security_op { - SECURITY_SIGN = 1 << 0, /* Sign the data */ - SECURITY_ENCRYPT = 1 << 1, /* Encrypt the data */ -}; - -/** - * Shift a vector left by one bit - * - * \param in Input vector - * \param out Output vector - * \param size Length of vector in bytes - */ -static void left_shift_vector(u8 *in, u8 *out, int size) -{ - int carry = 0; - int i; - - for (i = size - 1; i >= 0; i--) { - out[i] = (in[i] << 1) | carry; - carry = in[i] >> 7; /* get most significant bit */ - } -} - -/** - * Sign a block of data, putting the result into dst. - * - * \param key Input AES key, length AES128_KEY_LENGTH - * \param key_schedule Expanded key to use - * \param src Source data of length 'num_aes_blocks' blocks - * \param dst Destination buffer, length AES128_KEY_LENGTH - * \param num_aes_blocks Number of AES blocks to encrypt - */ -static void sign_object(u8 *key, u8 *key_schedule, u8 *src, u8 *dst, - u32 num_aes_blocks) -{ - u8 tmp_data[AES128_KEY_LENGTH]; - u8 iv[AES128_KEY_LENGTH] = {0}; - u8 left[AES128_KEY_LENGTH]; - u8 k1[AES128_KEY_LENGTH]; - u8 *cbc_chain_data; - unsigned i; - - cbc_chain_data = zero_key; /* Convenient array of 0's for IV */ - - /* compute K1 constant needed by AES-CMAC calculation */ - for (i = 0; i < AES128_KEY_LENGTH; i++) - tmp_data[i] = 0; - - aes_cbc_encrypt_blocks(AES128_KEY_LENGTH, key_schedule, iv, - tmp_data, left, 1); - - left_shift_vector(left, k1, sizeof(left)); - - if ((left[0] >> 7) != 0) /* get MSB of L */ - k1[AES128_KEY_LENGTH - 1] ^= AES_CMAC_CONST_RB; - - /* compute the AES-CMAC value */ - for (i = 0; i < num_aes_blocks; i++) { - /* Apply the chain data */ - aes_apply_cbc_chain_data(cbc_chain_data, src, tmp_data); - - /* for the final block, XOR K1 into the IV */ - if (i == num_aes_blocks - 1) - aes_apply_cbc_chain_data(tmp_data, k1, tmp_data); - - /* encrypt the AES block */ - aes_encrypt(AES128_KEY_LENGTH, tmp_data, - key_schedule, dst); - - debug("sign_obj: block %d of %d\n", i, num_aes_blocks); - - /* Update pointers for next loop. */ - cbc_chain_data = dst; - src += AES128_KEY_LENGTH; - } -} - -/** - * Encrypt and sign a block of data (depending on security mode). - * - * \param key Input AES key, length AES128_KEY_LENGTH - * \param oper Security operations mask to perform (enum security_op) - * \param src Source data - * \param length Size of source data - * \param sig_dst Destination address for signature, AES128_KEY_LENGTH bytes - */ -static int encrypt_and_sign(u8 *key, enum security_op oper, u8 *src, - u32 length, u8 *sig_dst) -{ - u32 num_aes_blocks; - u8 key_schedule[AES128_EXPAND_KEY_LENGTH]; - u8 iv[AES128_KEY_LENGTH] = {0}; - - debug("encrypt_and_sign: length = %d\n", length); - - /* - * The only need for a key is for signing/checksum purposes, so - * if not encrypting, expand a key of 0s. - */ - aes_expand_key(oper & SECURITY_ENCRYPT ? key : zero_key, - AES128_KEY_LENGTH, key_schedule); - - num_aes_blocks = (length + AES128_KEY_LENGTH - 1) / AES128_KEY_LENGTH; - - if (oper & SECURITY_ENCRYPT) { - /* Perform this in place, resulting in src being encrypted. */ - debug("encrypt_and_sign: begin encryption\n"); - aes_cbc_encrypt_blocks(AES128_KEY_LENGTH, key_schedule, iv, src, - src, num_aes_blocks); - debug("encrypt_and_sign: end encryption\n"); - } - - if (oper & SECURITY_SIGN) { - /* encrypt the data, overwriting the result in signature. */ - debug("encrypt_and_sign: begin signing\n"); - sign_object(key, key_schedule, src, sig_dst, num_aes_blocks); - debug("encrypt_and_sign: end signing\n"); - } - - return 0; -} - -int sign_data_block(u8 *source, unsigned length, u8 *signature) -{ - return encrypt_and_sign(zero_key, SECURITY_SIGN, source, - length, signature); -} diff --git a/arch/arm/mach-tegra/tegra20/crypto.h b/arch/arm/mach-tegra/tegra20/crypto.h deleted file mode 100644 index a773d03fc7..0000000000 --- a/arch/arm/mach-tegra/tegra20/crypto.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2010 - 2011 NVIDIA Corporation - */ - -#ifndef _CRYPTO_H_ -#define _CRYPTO_H_ - -/** - * Sign a block of data - * - * \param source Source data - * \param length Size of source data - * \param signature Destination address for signature, AES_KEY_LENGTH bytes - */ -int sign_data_block(u8 *source, unsigned length, u8 *signature); - -#endif /* #ifndef _CRYPTO_H_ */ -- cgit v1.2.3 From bab087802a8c2237f9d9c4aec95918fea52e73d5 Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:36 +0200 Subject: ARM: tegra: crypto: extend crypto functional Add support for encryption, decryption and signinig with non-zero key saving backward compatibility. Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom --- arch/arm/include/asm/arch-tegra/crypto.h | 47 ++++++++++++++++++++++++ arch/arm/mach-tegra/crypto.c | 63 ++++++++++++++++++++++---------- arch/arm/mach-tegra/crypto.h | 19 ---------- 3 files changed, 91 insertions(+), 38 deletions(-) create mode 100644 arch/arm/include/asm/arch-tegra/crypto.h delete mode 100644 arch/arm/mach-tegra/crypto.h diff --git a/arch/arm/include/asm/arch-tegra/crypto.h b/arch/arm/include/asm/arch-tegra/crypto.h new file mode 100644 index 0000000000..7646163b97 --- /dev/null +++ b/arch/arm/include/asm/arch-tegra/crypto.h @@ -0,0 +1,47 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (c) 2011 The Chromium OS Authors. + * (C) Copyright 2010 - 2011 NVIDIA Corporation + */ + +#ifndef _CRYPTO_H_ +#define _CRYPTO_H_ + +/** + * Sign a block of data + * + * \param source Source data + * \param length Size of source data + * \param signature Destination address for signature, AES_KEY_LENGTH bytes + */ +int sign_data_block(u8 *source, unsigned int length, u8 *signature); + +/** + * Sign an encrypted block of data + * + * \param source Source data + * \param length Size of source data + * \param signature Destination address for signature, AES_KEY_LENGTH bytes + * \param key AES128 encryption key + */ +int sign_enc_data_block(u8 *source, unsigned int length, u8 *signature, u8 *key); + +/** + * Encrypt a block of data + * + * \param source Source data + * \param length Size of source data + * \param key AES128 encryption key + */ +int encrypt_data_block(u8 *source, unsigned int length, u8 *key); + +/** + * Decrypt a block of data + * + * \param source Source data + * \param length Size of source data + * \param key AES128 encryption key + */ +int decrypt_data_block(u8 *source, unsigned int length, u8 *key); + +#endif /* #ifndef _CRYPTO_H_ */ diff --git a/arch/arm/mach-tegra/crypto.c b/arch/arm/mach-tegra/crypto.c index 1efaa5c3ec..893da35e0b 100644 --- a/arch/arm/mach-tegra/crypto.c +++ b/arch/arm/mach-tegra/crypto.c @@ -7,7 +7,7 @@ #include #include #include -#include "crypto.h" +#include #include "uboot_aes.h" static u8 zero_key[16]; @@ -17,6 +17,7 @@ static u8 zero_key[16]; enum security_op { SECURITY_SIGN = 1 << 0, /* Sign the data */ SECURITY_ENCRYPT = 1 << 1, /* Encrypt the data */ + SECURITY_DECRYPT = 1 << 2, /* Dectypt the data */ }; /** @@ -54,7 +55,7 @@ static void sign_object(u8 *key, u8 *key_schedule, u8 *src, u8 *dst, u8 left[AES128_KEY_LENGTH]; u8 k1[AES128_KEY_LENGTH]; u8 *cbc_chain_data; - unsigned i; + unsigned int i; cbc_chain_data = zero_key; /* Convenient array of 0's for IV */ @@ -92,7 +93,7 @@ static void sign_object(u8 *key, u8 *key_schedule, u8 *src, u8 *dst, } /** - * Encrypt and sign a block of data (depending on security mode). + * Decrypt, encrypt or sign a block of data (depending on security mode). * * \param key Input AES key, length AES128_KEY_LENGTH * \param oper Security operations mask to perform (enum security_op) @@ -100,44 +101,68 @@ static void sign_object(u8 *key, u8 *key_schedule, u8 *src, u8 *dst, * \param length Size of source data * \param sig_dst Destination address for signature, AES128_KEY_LENGTH bytes */ -static int encrypt_and_sign(u8 *key, enum security_op oper, u8 *src, - u32 length, u8 *sig_dst) +static int tegra_crypto_core(u8 *key, enum security_op oper, u8 *src, + u32 length, u8 *sig_dst) { u32 num_aes_blocks; u8 key_schedule[AES128_EXPAND_KEY_LENGTH]; u8 iv[AES128_KEY_LENGTH] = {0}; - debug("encrypt_and_sign: length = %d\n", length); + debug("%s: length = %d\n", __func__, length); - /* - * The only need for a key is for signing/checksum purposes, so - * if not encrypting, expand a key of 0s. - */ - aes_expand_key(oper & SECURITY_ENCRYPT ? key : zero_key, - AES128_KEY_LENGTH, key_schedule); + aes_expand_key(key, AES128_KEY_LENGTH, key_schedule); num_aes_blocks = (length + AES128_KEY_LENGTH - 1) / AES128_KEY_LENGTH; + if (oper & SECURITY_DECRYPT) { + /* Perform this in place, resulting in src being decrypted. */ + debug("%s: begin decryption\n", __func__); + aes_cbc_decrypt_blocks(AES128_KEY_LENGTH, key_schedule, iv, src, + src, num_aes_blocks); + debug("%s: end decryption\n", __func__); + } + if (oper & SECURITY_ENCRYPT) { /* Perform this in place, resulting in src being encrypted. */ - debug("encrypt_and_sign: begin encryption\n"); + debug("%s: begin encryption\n", __func__); aes_cbc_encrypt_blocks(AES128_KEY_LENGTH, key_schedule, iv, src, src, num_aes_blocks); - debug("encrypt_and_sign: end encryption\n"); + debug("%s: end encryption\n", __func__); } if (oper & SECURITY_SIGN) { /* encrypt the data, overwriting the result in signature. */ - debug("encrypt_and_sign: begin signing\n"); + debug("%s: begin signing\n", __func__); sign_object(key, key_schedule, src, sig_dst, num_aes_blocks); - debug("encrypt_and_sign: end signing\n"); + debug("%s: end signing\n", __func__); } return 0; } -int sign_data_block(u8 *source, unsigned length, u8 *signature) +/** + * Tegra crypto group + */ +int sign_data_block(u8 *source, unsigned int length, u8 *signature) +{ + return tegra_crypto_core(zero_key, SECURITY_SIGN, source, + length, signature); +} + +int sign_enc_data_block(u8 *source, unsigned int length, u8 *signature, u8 *key) +{ + return tegra_crypto_core(key, SECURITY_SIGN, source, + length, signature); +} + +int encrypt_data_block(u8 *source, unsigned int length, u8 *key) +{ + return tegra_crypto_core(key, SECURITY_ENCRYPT, source, + length, NULL); +} + +int decrypt_data_block(u8 *source, unsigned int length, u8 *key) { - return encrypt_and_sign(zero_key, SECURITY_SIGN, source, - length, signature); + return tegra_crypto_core(key, SECURITY_DECRYPT, source, + length, NULL); } diff --git a/arch/arm/mach-tegra/crypto.h b/arch/arm/mach-tegra/crypto.h deleted file mode 100644 index a773d03fc7..0000000000 --- a/arch/arm/mach-tegra/crypto.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (c) 2011 The Chromium OS Authors. - * (C) Copyright 2010 - 2011 NVIDIA Corporation - */ - -#ifndef _CRYPTO_H_ -#define _CRYPTO_H_ - -/** - * Sign a block of data - * - * \param source Source data - * \param length Size of source data - * \param signature Destination address for signature, AES_KEY_LENGTH bytes - */ -int sign_data_block(u8 *source, unsigned length, u8 *signature); - -#endif /* #ifndef _CRYPTO_H_ */ -- cgit v1.2.3 From 327ff8e0a49e2e16ac946d059cae7df964c6ea59 Mon Sep 17 00:00:00 2001 From: Ramin Khonsari Date: Tue, 14 Feb 2023 19:35:37 +0200 Subject: ARM: tegra30: implement BCT patching This function allows updating bootloader from u-boot on production devices without need in host PC. Be aware! It works only with re-crypted BCT. Tested-by: Andreas Westman Dorcsak # ASUS TF T30 Tested-by: Svyatoslav Ryhel # LG P895 T30 Signed-off-by: Ramin Khonsari Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom --- arch/arm/mach-tegra/Kconfig | 9 ++++ arch/arm/mach-tegra/tegra30/Makefile | 1 + arch/arm/mach-tegra/tegra30/bct.c | 79 ++++++++++++++++++++++++++++++++++++ arch/arm/mach-tegra/tegra30/bct.h | 42 +++++++++++++++++++ 4 files changed, 131 insertions(+) create mode 100644 arch/arm/mach-tegra/tegra30/bct.c create mode 100644 arch/arm/mach-tegra/tegra30/bct.h diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 5b0cd92d9e..8490d42a7b 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -229,4 +229,13 @@ config CMD_ENTERRCM for mechanical button actuators, or hooking up relays/... to the button. +config CMD_EBTUPDATE + bool "Enable 'ebtupdate' command" + depends on TEGRA30 + select TEGRA_CRYPTO + help + Updating u-boot from within u-boot in rather complex or even + impossible on production devices. To make it easier procedure of + re-cryption was created. If your device was re-crypted choose Y. + endif diff --git a/arch/arm/mach-tegra/tegra30/Makefile b/arch/arm/mach-tegra/tegra30/Makefile index 9f170576e7..28dd486d8d 100644 --- a/arch/arm/mach-tegra/tegra30/Makefile +++ b/arch/arm/mach-tegra/tegra30/Makefile @@ -3,5 +3,6 @@ # Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. obj-$(CONFIG_SPL_BUILD) += cpu.o +obj-$(CONFIG_$(SPL_)CMD_EBTUPDATE) += bct.o obj-y += clock.o funcmux.o pinmux.o diff --git a/arch/arm/mach-tegra/tegra30/bct.c b/arch/arm/mach-tegra/tegra30/bct.c new file mode 100644 index 0000000000..c56958da69 --- /dev/null +++ b/arch/arm/mach-tegra/tegra30/bct.c @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2022, Ramin + * Copyright (c) 2022, Svyatoslav Ryhel + */ + +#include +#include +#include +#include +#include "bct.h" +#include "uboot_aes.h" + +/* + * @param bct boot config table start in RAM + * @param ect bootloader start in RAM + * @param ebt_size bootloader file size in bytes + * Return: 0, or 1 if failed + */ +static int bct_patch(u8 *bct, u8 *ebt, u32 ebt_size) +{ + struct nvboot_config_table *bct_tbl = NULL; + u8 ebt_hash[AES128_KEY_LENGTH] = { 0 }; + u8 sbk[AES128_KEY_LENGTH] = { 0 }; + u8 *bct_hash = bct; + int ret; + + bct += BCT_HASH; + + memcpy(sbk, (u8 *)(bct + BCT_LENGTH), + NVBOOT_CMAC_AES_HASH_LENGTH * 4); + + ret = decrypt_data_block(bct, BCT_LENGTH, sbk); + if (ret) + return 1; + + ebt_size = roundup(ebt_size, EBT_ALIGNMENT); + + ret = encrypt_data_block(ebt, ebt_size, sbk); + if (ret) + return 1; + + ret = sign_enc_data_block(ebt, ebt_size, ebt_hash, sbk); + if (ret) + return 1; + + bct_tbl = (struct nvboot_config_table *)bct; + + memcpy((u8 *)&bct_tbl->bootloader[0].crypto_hash, + ebt_hash, NVBOOT_CMAC_AES_HASH_LENGTH * 4); + bct_tbl->bootloader[0].entry_point = CONFIG_SPL_TEXT_BASE; + bct_tbl->bootloader[0].load_addr = CONFIG_SPL_TEXT_BASE; + bct_tbl->bootloader[0].length = ebt_size; + + ret = encrypt_data_block(bct, BCT_LENGTH, sbk); + if (ret) + return 1; + + ret = sign_enc_data_block(bct, BCT_LENGTH, bct_hash, sbk); + if (ret) + return 1; + + return 0; +} + +static int do_ebtupdate(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + u32 bct_addr = hextoul(argv[1], NULL); + u32 ebt_addr = hextoul(argv[2], NULL); + u32 ebt_size = hextoul(argv[3], NULL); + + return bct_patch((u8 *)bct_addr, (u8 *)ebt_addr, ebt_size); +} + +U_BOOT_CMD(ebtupdate, 4, 0, do_ebtupdate, + "update bootloader on re-crypted Tegra30 devices", + "" +); diff --git a/arch/arm/mach-tegra/tegra30/bct.h b/arch/arm/mach-tegra/tegra30/bct.h new file mode 100644 index 0000000000..9797384da3 --- /dev/null +++ b/arch/arm/mach-tegra/tegra30/bct.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef _BCT_H_ +#define _BCT_H_ + +/* + * Defines the BCT parametres for T30 + */ +#define BCT_LENGTH 0x17E0 +#define BCT_HASH 0x10 +#define EBT_ALIGNMENT 0x10 + +/* + * Defines the CMAC-AES-128 hash length in 32 bit words. (128 bits = 4 words) + */ +#define NVBOOT_CMAC_AES_HASH_LENGTH 4 + +/* + * Defines the maximum number of bootloader descriptions in the BCT. + */ +#define NVBOOT_MAX_BOOTLOADERS 4 + +struct nv_bootloader_info { + u32 version; + u32 start_blk; + u32 start_page; + u32 length; + u32 load_addr; + u32 entry_point; + u32 attribute; + u32 crypto_hash[NVBOOT_CMAC_AES_HASH_LENGTH]; +}; + +struct nvboot_config_table { + u32 unused0[4]; + u32 boot_data_version; + u32 unused1[972]; + struct nv_bootloader_info bootloader[NVBOOT_MAX_BOOTLOADERS]; + u32 unused2[508]; +}; + +#endif /* _BCT_H_ */ -- cgit v1.2.3 From 5a8fe1ee818e0f8a74fa088f6a3d705a01b6afbe Mon Sep 17 00:00:00 2001 From: Svyatoslav Ryhel Date: Tue, 14 Feb 2023 19:35:38 +0200 Subject: ARM: tegra20: implement BCT patching This function allows updating bootloader from u-boot on production devices without need in host PC. Be aware! It works only with re-crypt BCT. Tested-by: Robert Eckelmann # ASUS TF101 T20 Signed-off-by: Ramin Khonsari Signed-off-by: Svyatoslav Ryhel Signed-off-by: Tom --- arch/arm/mach-tegra/Kconfig | 2 +- arch/arm/mach-tegra/tegra20/Makefile | 5 +-- arch/arm/mach-tegra/tegra20/bct.c | 79 ++++++++++++++++++++++++++++++++++++ arch/arm/mach-tegra/tegra20/bct.h | 42 +++++++++++++++++++ doc/usage/cmd/ebtupdate.rst | 69 +++++++++++++++++++++++++++++++ 5 files changed, 193 insertions(+), 4 deletions(-) create mode 100644 arch/arm/mach-tegra/tegra20/bct.c create mode 100644 arch/arm/mach-tegra/tegra20/bct.h create mode 100644 doc/usage/cmd/ebtupdate.rst diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index 8490d42a7b..464bd0798f 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig @@ -231,7 +231,7 @@ config CMD_ENTERRCM config CMD_EBTUPDATE bool "Enable 'ebtupdate' command" - depends on TEGRA30 + depends on TEGRA20 || TEGRA30 select TEGRA_CRYPTO help Updating u-boot from within u-boot in rather complex or even diff --git a/arch/arm/mach-tegra/tegra20/Makefile b/arch/arm/mach-tegra/tegra20/Makefile index 67454ff5f4..991cabeec5 100644 --- a/arch/arm/mach-tegra/tegra20/Makefile +++ b/arch/arm/mach-tegra/tegra20/Makefile @@ -2,9 +2,8 @@ # # (C) Copyright 2010,2011 Nvidia Corporation. -ifdef CONFIG_SPL_BUILD -obj-y += cpu.o -endif +obj-$(CONFIG_SPL_BUILD) += cpu.o +obj-$(CONFIG_$(SPL_)CMD_EBTUPDATE) += bct.o # The AVP is ARMv4T architecture so we must use special compiler # flags for any startup files it might use. diff --git a/arch/arm/mach-tegra/tegra20/bct.c b/arch/arm/mach-tegra/tegra20/bct.c new file mode 100644 index 0000000000..5eb48990b6 --- /dev/null +++ b/arch/arm/mach-tegra/tegra20/bct.c @@ -0,0 +1,79 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2022, Ramin + * Copyright (c) 2022, Svyatoslav Ryhel + */ + +#include +#include +#include +#include +#include "bct.h" +#include "uboot_aes.h" + +/* + * @param bct boot config table start in RAM + * @param ect bootloader start in RAM + * @param ebt_size bootloader file size in bytes + * Return: 0, or 1 if failed + */ +static int bct_patch(u8 *bct, u8 *ebt, u32 ebt_size) +{ + struct nvboot_config_table *bct_tbl = NULL; + u8 ebt_hash[AES128_KEY_LENGTH] = { 0 }; + u8 sbk[AES128_KEY_LENGTH] = { 0 }; + u8 *bct_hash = bct; + int ret; + + bct += BCT_HASH; + + memcpy(sbk, (u8 *)(bct + BCT_LENGTH), + NVBOOT_CMAC_AES_HASH_LENGTH * 4); + + ret = decrypt_data_block(bct, BCT_LENGTH, sbk); + if (ret) + return 1; + + ebt_size = roundup(ebt_size, EBT_ALIGNMENT); + + ret = encrypt_data_block(ebt, ebt_size, sbk); + if (ret) + return 1; + + ret = sign_enc_data_block(ebt, ebt_size, ebt_hash, sbk); + if (ret) + return 1; + + bct_tbl = (struct nvboot_config_table *)bct; + + memcpy((u8 *)&bct_tbl->bootloader[0].crypto_hash, + ebt_hash, NVBOOT_CMAC_AES_HASH_LENGTH * 4); + bct_tbl->bootloader[0].entry_point = CONFIG_SPL_TEXT_BASE; + bct_tbl->bootloader[0].load_addr = CONFIG_SPL_TEXT_BASE; + bct_tbl->bootloader[0].length = ebt_size; + + ret = encrypt_data_block(bct, BCT_LENGTH, sbk); + if (ret) + return 1; + + ret = sign_enc_data_block(bct, BCT_LENGTH, bct_hash, sbk); + if (ret) + return 1; + + return 0; +} + +static int do_ebtupdate(struct cmd_tbl *cmdtp, int flag, int argc, + char *const argv[]) +{ + u32 bct_addr = hextoul(argv[1], NULL); + u32 ebt_addr = hextoul(argv[2], NULL); + u32 ebt_size = hextoul(argv[3], NULL); + + return bct_patch((u8 *)bct_addr, (u8 *)ebt_addr, ebt_size); +} + +U_BOOT_CMD(ebtupdate, 4, 0, do_ebtupdate, + "update bootloader on re-crypted Tegra20 devices", + "" +); diff --git a/arch/arm/mach-tegra/tegra20/bct.h b/arch/arm/mach-tegra/tegra20/bct.h new file mode 100644 index 0000000000..4b78aef7cf --- /dev/null +++ b/arch/arm/mach-tegra/tegra20/bct.h @@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef _BCT_H_ +#define _BCT_H_ + +/* + * Defines the BCT parametres for T20 + */ +#define BCT_LENGTH 0xFE0 +#define BCT_HASH 0x10 +#define EBT_ALIGNMENT 0x10 + +/* + * Defines the CMAC-AES-128 hash length in 32 bit words. (128 bits = 4 words) + */ +#define NVBOOT_CMAC_AES_HASH_LENGTH 4 + +/* + * Defines the maximum number of bootloader descriptions in the BCT. + */ +#define NVBOOT_MAX_BOOTLOADERS 4 + +struct nv_bootloader_info { + u32 version; + u32 start_blk; + u32 start_page; + u32 length; + u32 load_addr; + u32 entry_point; + u32 attribute; + u32 crypto_hash[NVBOOT_CMAC_AES_HASH_LENGTH]; +}; + +struct nvboot_config_table { + u32 unused0[4]; + u32 boot_data_version; + u32 unused1[668]; + struct nv_bootloader_info bootloader[NVBOOT_MAX_BOOTLOADERS]; + u32 unused2[508]; +}; + +#endif /* _BCT_H_ */ diff --git a/doc/usage/cmd/ebtupdate.rst b/doc/usage/cmd/ebtupdate.rst new file mode 100644 index 0000000000..040cef37ec --- /dev/null +++ b/doc/usage/cmd/ebtupdate.rst @@ -0,0 +1,69 @@ +.. SPDX-License-Identifier: GPL-2.0+: + +ebtupdate command +============= + +Synopsis +-------- + +:: + + ebtupdate [ [] []] + +Description +----------- + +The "ebtupdate" command is used to self-update bootloader on Tegra 2 and Tegra 3 +production devices which were processed using re-cryption. + +The "ebtupdate" performs encryption of new bootloader and decryption, patching +and re-encryption of BCT "in situ". After BCT and bootloader can be written in +their respective places. + +bct + address of BCT block pre-loaded into RAM. + +ebt + address of the bootloader pre-loaded into RAM. + +size + size of the pre-loaded bootloader. + +Example +------- + +This is the boot log of a LG Optimus Vu: + +:: + + => mmc dev 0 1 + switch to partitions #1, OK + mmc0(part 1) is current device + => mmc read $kernel_addr_r 0 $boot_block_size + MMC read: dev # 0, block # 0, count 4096 ... 4096 blocks read: OK + => load mmc 0:1 $ramdisk_addr_r $bootloader_file + 684783 bytes read in 44 ms (14.8 MiB/s) + => size mmc 0:1 $bootloader_file + => ebtupdate $kernel_addr_r $ramdisk_addr_r $filesize + => mmc dev 0 1 + switch to partitions #1, OK + mmc0(part 1) is current device + => mmc write $kernel_addr_r 0 $boot_block_size + MMC write: dev # 0, block # 0, count 4096 ... 4096 blocks written: OK + => mmc dev 0 2 + switch to partitions #2, OK + mmc0(part 2) is current device + => mmc write $ramdisk_addr_r 0 $boot_block_size + MMC write: dev # 0, block # 0, count 4096 ... 4096 blocks written: OK + +Configuration +------------- + +The ebtupdate command is only available if CONFIG_CMD_EBTUPDATE=y and +only on Tegra 2 and Tegra 3 configurations. + +Return value +------------ + +The return value $? is set to 0 (true) if everything went successfully. If an +error occurs, the return value $? is set to 1 (false). -- cgit v1.2.3 From 2a433a5b53231fcfb53773fd928e584ca1550f0b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 27 Feb 2023 09:11:57 -0500 Subject: configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini --- configs/seaboard_defconfig | 1 - configs/socfpga_chameleonv3_defconfig | 4 ++-- 2 files changed, 2 insertions(+), 3 deletions(-) diff --git a/configs/seaboard_defconfig b/configs/seaboard_defconfig index cf4df06960..00cca91171 100644 --- a/configs/seaboard_defconfig +++ b/configs/seaboard_defconfig @@ -66,4 +66,3 @@ CONFIG_VIDEO=y # CONFIG_VIDEO_BPP8 is not set CONFIG_VIDEO_TEGRA20=y CONFIG_CONSOLE_SCROLL_LINES=10 -CONFIG_AES=y diff --git a/configs/socfpga_chameleonv3_defconfig b/configs/socfpga_chameleonv3_defconfig index 41231e2382..9cf39b6a37 100644 --- a/configs/socfpga_chameleonv3_defconfig +++ b/configs/socfpga_chameleonv3_defconfig @@ -5,21 +5,21 @@ CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x4400 CONFIG_DEFAULT_DEVICE_TREE="socfpga_arria10_chameleonv3_480_2" CONFIG_SPL_TEXT_BASE=0xFFE00000 -CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_DRIVERS_MISC=y CONFIG_TARGET_SOCFPGA_CHAMELEONV3=y -CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FS_FAT=y CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y CONFIG_SPL_FIT=y CONFIG_MISC_INIT_R=y +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_NO_BSS_LIMIT=y CONFIG_SYS_SPL_MALLOC=y CONFIG_HAS_CUSTOM_SPL_MALLOC_START=y CONFIG_CUSTOM_SYS_SPL_MALLOC_ADDR=0xffe2b000 CONFIG_SYS_SPL_MALLOC_SIZE=0x15000 CONFIG_SPL_ENV_SUPPORT=y +CONFIG_SPL_FS_EXT4=y CONFIG_SPL_FPGA=y CONFIG_SYS_BOOTM_LEN=0x2000000 CONFIG_ENV_IS_IN_MMC=y -- cgit v1.2.3 From e8c80ac0f7a13bf0fc016ce324b870c0cff7a2b8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Mon, 27 Feb 2023 17:18:36 -0500 Subject: Prepare v2023.04-rc3 Signed-off-by: Tom Rini --- Makefile | 2 +- doc/develop/release_cycle.rst | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/Makefile b/Makefile index bc1ee94fb7..700be23764 100644 --- a/Makefile +++ b/Makefile @@ -3,7 +3,7 @@ VERSION = 2023 PATCHLEVEL = 04 SUBLEVEL = -EXTRAVERSION = -rc2 +EXTRAVERSION = -rc3 NAME = # *DOCUMENTATION* diff --git a/doc/develop/release_cycle.rst b/doc/develop/release_cycle.rst index 2809d95985..80b50be90e 100644 --- a/doc/develop/release_cycle.rst +++ b/doc/develop/release_cycle.rst @@ -68,7 +68,7 @@ For the next scheduled release, release candidates were made on:: * U-Boot v2023.04-rc2 was released on Mon 13 February 2023. -.. * U-Boot v2023.04-rc3 was released on Mon 27 February 2023. +* U-Boot v2023.04-rc3 was released on Mon 27 February 2023. .. * U-Boot v2023.04-rc4 was released on Mon 13 March 2023. -- cgit v1.2.3