From 61ad1a527a198a3c5ce4cdf25d74108bd038ebb4 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Mon, 10 Jul 2023 10:38:45 +0200 Subject: ARM: dts: stm32mp: alignment with v6.4 Device tree alignment with Linux kernel v6.4. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- arch/arm/dts/stm32mp13-pinctrl.dtsi | 129 ++++++++++++++++++++++++++++++++++++ arch/arm/dts/stm32mp131.dtsi | 99 ++++++++++++++++++++++++++- arch/arm/dts/stm32mp135f-dk.dts | 42 +++++++++++- arch/arm/dts/stm32mp15-pinctrl.dtsi | 34 +++++----- arch/arm/dts/stm32mp151.dtsi | 4 +- arch/arm/dts/stm32mp157a-dk1.dts | 3 - arch/arm/dts/stm32mp157c-dk2.dts | 3 - arch/arm/dts/stm32mp157c-ed1.dts | 17 ++--- arch/arm/dts/stm32mp157c-ev1.dts | 9 ++- arch/arm/dts/stm32mp15xx-dkx.dtsi | 15 ++--- 10 files changed, 299 insertions(+), 56 deletions(-) diff --git a/arch/arm/dts/stm32mp13-pinctrl.dtsi b/arch/arm/dts/stm32mp13-pinctrl.dtsi index b2dce3a29f..27e0c38267 100644 --- a/arch/arm/dts/stm32mp13-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp13-pinctrl.dtsi @@ -258,4 +258,133 @@ bias-disable; }; }; + + uart4_idle_pins_a: uart4-idle-0 { + pins1 { + pinmux = ; /* UART4_TX */ + }; + pins2 { + pinmux = ; /* UART4_RX */ + bias-disable; + }; + }; + + uart4_sleep_pins_a: uart4-sleep-0 { + pins { + pinmux = , /* UART4_TX */ + ; /* UART4_RX */ + }; + }; + + uart8_pins_a: uart8-0 { + pins1 { + pinmux = ; /* UART8_TX */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = ; /* UART8_RX */ + bias-pull-up; + }; + }; + + uart8_idle_pins_a: uart8-idle-0 { + pins1 { + pinmux = ; /* UART8_TX */ + }; + pins2 { + pinmux = ; /* UART8_RX */ + bias-pull-up; + }; + }; + + uart8_sleep_pins_a: uart8-sleep-0 { + pins { + pinmux = , /* UART8_TX */ + ; /* UART8_RX */ + }; + }; + + usart1_pins_a: usart1-0 { + pins1 { + pinmux = , /* USART1_TX */ + ; /* USART1_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART1_RX */ + ; /* USART1_CTS_NSS */ + bias-pull-up; + }; + }; + + usart1_idle_pins_a: usart1-idle-0 { + pins1 { + pinmux = , /* USART1_TX */ + ; /* USART1_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART1_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { + pinmux = ; /* USART1_RX */ + bias-pull-up; + }; + }; + + usart1_sleep_pins_a: usart1-sleep-0 { + pins { + pinmux = , /* USART1_TX */ + , /* USART1_RTS */ + , /* USART1_CTS_NSS */ + ; /* USART1_RX */ + }; + }; + + usart2_pins_a: usart2-0 { + pins1 { + pinmux = , /* USART2_TX */ + ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins2 { + pinmux = , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + bias-disable; + }; + }; + + usart2_idle_pins_a: usart2-idle-0 { + pins1 { + pinmux = , /* USART2_TX */ + ; /* USART2_CTS_NSS */ + }; + pins2 { + pinmux = ; /* USART2_RTS */ + bias-disable; + drive-push-pull; + slew-rate = <0>; + }; + pins3 { + pinmux = ; /* USART2_RX */ + bias-disable; + }; + }; + + usart2_sleep_pins_a: usart2-sleep-0 { + pins { + pinmux = , /* USART2_TX */ + , /* USART2_RTS */ + , /* USART2_RX */ + ; /* USART2_CTS_NSS */ + }; + }; }; diff --git a/arch/arm/dts/stm32mp131.dtsi b/arch/arm/dts/stm32mp131.dtsi index d94ba25472..d163c267e3 100644 --- a/arch/arm/dts/stm32mp131.dtsi +++ b/arch/arm/dts/stm32mp131.dtsi @@ -397,12 +397,42 @@ status = "disabled"; }; + usart3: serial@4000f000 { + compatible = "st,stm32h7-uart"; + reg = <0x4000f000 0x400>; + interrupts-extended = <&exti 28 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART3_K>; + resets = <&rcc USART3_R>; + wakeup-source; + dmas = <&dmamux1 45 0x400 0x5>, + <&dmamux1 46 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + uart4: serial@40010000 { compatible = "st,stm32h7-uart"; reg = <0x40010000 0x400>; - interrupts = ; + interrupts-extended = <&exti 30 IRQ_TYPE_LEVEL_HIGH>; clocks = <&rcc UART4_K>; resets = <&rcc UART4_R>; + wakeup-source; + dmas = <&dmamux1 63 0x400 0x5>, + <&dmamux1 64 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart5: serial@40011000 { + compatible = "st,stm32h7-uart"; + reg = <0x40011000 0x400>; + interrupts-extended = <&exti 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc UART5_K>; + resets = <&rcc UART5_R>; + wakeup-source; + dmas = <&dmamux1 65 0x400 0x5>, + <&dmamux1 66 0x400 0x1>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -442,6 +472,32 @@ status = "disabled"; }; + uart7: serial@40018000 { + compatible = "st,stm32h7-uart"; + reg = <0x40018000 0x400>; + interrupts-extended = <&exti 32 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc UART7_K>; + resets = <&rcc UART7_R>; + wakeup-source; + dmas = <&dmamux1 79 0x400 0x5>, + <&dmamux1 80 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + uart8: serial@40019000 { + compatible = "st,stm32h7-uart"; + reg = <0x40019000 0x400>; + interrupts-extended = <&exti 33 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc UART8_K>; + resets = <&rcc UART8_R>; + wakeup-source; + dmas = <&dmamux1 81 0x400 0x5>, + <&dmamux1 82 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + timers1: timer@44000000 { #address-cells = <1>; #size-cells = <0>; @@ -524,6 +580,19 @@ }; }; + usart6: serial@44003000 { + compatible = "st,stm32h7-uart"; + reg = <0x44003000 0x400>; + interrupts-extended = <&exti 29 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART6_K>; + resets = <&rcc USART6_R>; + wakeup-source; + dmas = <&dmamux1 71 0x400 0x5>, + <&dmamux1 72 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + i2s1: audio-controller@44004000 { compatible = "st,stm32h7-i2s"; reg = <0x44004000 0x400>; @@ -748,6 +817,32 @@ status = "disabled"; }; + usart1: serial@4c000000 { + compatible = "st,stm32h7-uart"; + reg = <0x4c000000 0x400>; + interrupts-extended = <&exti 26 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART1_K>; + resets = <&rcc USART1_R>; + wakeup-source; + dmas = <&dmamux1 41 0x400 0x5>, + <&dmamux1 42 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + usart2: serial@4c001000 { + compatible = "st,stm32h7-uart"; + reg = <0x4c001000 0x400>; + interrupts-extended = <&exti 27 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&rcc USART2_K>; + resets = <&rcc USART2_R>; + wakeup-source; + dmas = <&dmamux1 43 0x400 0x5>, + <&dmamux1 44 0x400 0x1>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + i2s4: audio-controller@4c002000 { compatible = "st,stm32h7-i2s"; reg = <0x4c002000 0x400>; @@ -1001,8 +1096,6 @@ reg = <0x50000000 0x1000>; #clock-cells = <1>; #reset-cells = <1>; - interrupts = ; - clock-names = "hse", "hsi", "csi", "lse", "lsi"; clocks = <&scmi_clk CK_SCMI_HSE>, <&scmi_clk CK_SCMI_HSI>, diff --git a/arch/arm/dts/stm32mp135f-dk.dts b/arch/arm/dts/stm32mp135f-dk.dts index c40686cb2b..f0900ca672 100644 --- a/arch/arm/dts/stm32mp135f-dk.dts +++ b/arch/arm/dts/stm32mp135f-dk.dts @@ -19,6 +19,13 @@ aliases { serial0 = &uart4; + serial1 = &usart1; + serial2 = &uart8; + serial3 = &usart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; }; memory@c0000000 { @@ -267,8 +274,41 @@ }; &uart4 { - pinctrl-names = "default"; + pinctrl-names = "default", "sleep", "idle"; pinctrl-0 = <&uart4_pins_a>; + pinctrl-1 = <&uart4_sleep_pins_a>; + pinctrl-2 = <&uart4_idle_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; + status = "okay"; +}; + +&uart8 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&uart8_pins_a>; + pinctrl-1 = <&uart8_sleep_pins_a>; + pinctrl-2 = <&uart8_idle_pins_a>; + /delete-property/dmas; + /delete-property/dma-names; + status = "disabled"; +}; + +&usart1 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart1_pins_a>; + pinctrl-1 = <&usart1_sleep_pins_a>; + pinctrl-2 = <&usart1_idle_pins_a>; + uart-has-rtscts; + status = "disabled"; +}; + +/* Bluetooth */ +&usart2 { + pinctrl-names = "default", "sleep", "idle"; + pinctrl-0 = <&usart2_pins_a>; + pinctrl-1 = <&usart2_sleep_pins_a>; + pinctrl-2 = <&usart2_idle_pins_a>; + uart-has-rtscts; status = "okay"; }; diff --git a/arch/arm/dts/stm32mp15-pinctrl.dtsi b/arch/arm/dts/stm32mp15-pinctrl.dtsi index a9d2bec990..e86d989dd3 100644 --- a/arch/arm/dts/stm32mp15-pinctrl.dtsi +++ b/arch/arm/dts/stm32mp15-pinctrl.dtsi @@ -1880,6 +1880,21 @@ }; }; + spi1_pins_b: spi1-1 { + pins1 { + pinmux = , /* SPI1_SCK */ + ; /* SPI1_MOSI */ + bias-disable; + drive-push-pull; + slew-rate = <1>; + }; + + pins2 { + pinmux = ; /* SPI1_MISO */ + bias-disable; + }; + }; + spi2_pins_a: spi2-0 { pins1 { pinmux = , /* SPI2_SCK */ @@ -2163,7 +2178,7 @@ ; /* USART2_RTS */ bias-disable; drive-push-pull; - slew-rate = <3>; + slew-rate = <0>; }; pins2 { pinmux = , /* USART2_RX */ @@ -2181,7 +2196,7 @@ pinmux = ; /* USART2_RTS */ bias-disable; drive-push-pull; - slew-rate = <3>; + slew-rate = <0>; }; pins3 { pinmux = ; /* USART2_RX */ @@ -2448,19 +2463,4 @@ bias-disable; }; }; - - spi1_pins_b: spi1-1 { - pins1 { - pinmux = , /* SPI1_SCK */ - ; /* SPI1_MOSI */ - bias-disable; - drive-push-pull; - slew-rate = <1>; - }; - - pins2 { - pinmux = ; /* SPI1_MISO */ - bias-disable; - }; - }; }; diff --git a/arch/arm/dts/stm32mp151.dtsi b/arch/arm/dts/stm32mp151.dtsi index b3baacbb26..21d11be328 100644 --- a/arch/arm/dts/stm32mp151.dtsi +++ b/arch/arm/dts/stm32mp151.dtsi @@ -1148,8 +1148,8 @@ usbotg_hs: usb-otg@49000000 { compatible = "st,stm32mp15-hsotg", "snps,dwc2"; reg = <0x49000000 0x10000>; - clocks = <&rcc USBO_K>; - clock-names = "otg"; + clocks = <&rcc USBO_K>, <&usbphyc>; + clock-names = "otg", "utmi"; resets = <&rcc USBO_R>; reset-names = "dwc2"; interrupts = ; diff --git a/arch/arm/dts/stm32mp157a-dk1.dts b/arch/arm/dts/stm32mp157a-dk1.dts index 4c8be9c8eb..0da3667ab1 100644 --- a/arch/arm/dts/stm32mp157a-dk1.dts +++ b/arch/arm/dts/stm32mp157a-dk1.dts @@ -17,9 +17,6 @@ aliases { ethernet0 = ðernet0; - serial0 = &uart4; - serial1 = &usart3; - serial2 = &uart7; }; chosen { diff --git a/arch/arm/dts/stm32mp157c-dk2.dts b/arch/arm/dts/stm32mp157c-dk2.dts index 2bc92ef3ae..ab13e340f4 100644 --- a/arch/arm/dts/stm32mp157c-dk2.dts +++ b/arch/arm/dts/stm32mp157c-dk2.dts @@ -18,9 +18,6 @@ aliases { ethernet0 = ðernet0; - serial0 = &uart4; - serial1 = &usart3; - serial2 = &uart7; serial3 = &usart2; }; diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts index fe5c8f25ce..3541a17dce 100644 --- a/arch/arm/dts/stm32mp157c-ed1.dts +++ b/arch/arm/dts/stm32mp157c-ed1.dts @@ -16,6 +16,10 @@ model = "STMicroelectronics STM32MP157C eval daughter"; compatible = "st,stm32mp157c-ed1", "st,stm32mp157"; + aliases { + serial0 = &uart4; + }; + chosen { stdout-path = "serial0:115200n8"; }; @@ -65,15 +69,6 @@ reg = <0x38000000 0x10000>; no-map; }; - - gpu_reserved: gpu@e8000000 { - reg = <0xe8000000 0x8000000>; - no-map; - }; - }; - - aliases { - serial0 = &uart4; }; sd_switch: regulator-sd_switch { @@ -148,10 +143,6 @@ status = "okay"; }; -&gpu { - contiguous-area = <&gpu_reserved>; -}; - &hash1 { status = "okay"; }; diff --git a/arch/arm/dts/stm32mp157c-ev1.dts b/arch/arm/dts/stm32mp157c-ev1.dts index 542226cfcf..ba8e9d9a42 100644 --- a/arch/arm/dts/stm32mp157c-ev1.dts +++ b/arch/arm/dts/stm32mp157c-ev1.dts @@ -14,16 +14,15 @@ model = "STMicroelectronics STM32MP157C eval daughter on eval mother"; compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157"; - chosen { - stdout-path = "serial0:115200n8"; - }; - aliases { - serial0 = &uart4; serial1 = &usart3; ethernet0 = ðernet0; }; + chosen { + stdout-path = "serial0:115200n8"; + }; + clocks { clk_ext_camera: clk-ext-camera { #clock-cells = <0>; diff --git a/arch/arm/dts/stm32mp15xx-dkx.dtsi b/arch/arm/dts/stm32mp15xx-dkx.dtsi index 49b3e768c8..f4de6c0b75 100644 --- a/arch/arm/dts/stm32mp15xx-dkx.dtsi +++ b/arch/arm/dts/stm32mp15xx-dkx.dtsi @@ -8,6 +8,12 @@ #include / { + aliases { + serial0 = &uart4; + serial1 = &usart3; + serial2 = &uart7; + }; + memory@c0000000 { device_type = "memory"; reg = <0xc0000000 0x20000000>; @@ -53,11 +59,6 @@ reg = <0x38000000 0x10000>; no-map; }; - - gpu_reserved: gpu@d4000000 { - reg = <0xd4000000 0x4000000>; - no-map; - }; }; led { @@ -159,10 +160,6 @@ }; }; -&gpu { - contiguous-area = <&gpu_reserved>; -}; - &hash1 { status = "okay"; }; -- cgit v1.2.3