From a6c64d255e5117bcf78aec6911d7c034fbfe46f7 Mon Sep 17 00:00:00 2001 From: Suman Anna Date: Mon, 26 Jul 2021 18:22:48 -0500 Subject: board: ti: k2g: Program PadConfig_202 before locking RSTMUX8 The PADCONFIG_202 register (0x02621328) is affected by the locking of the RSTMUX8 register (0x02620328), and so cannot be configured in kernel. This has been confirmed as a hardware bug and affects all K2G SoCs. Setup the pinmux for this pin before locking the RSTMUX8 register to allow the ICSS1 PRU1 Ethernet PHY port to work properly. The workaround was added only for the K2G-ICE board to configure the pins needed for the PRUSS Ethernet usecase. Signed-off-by: Suman Anna Signed-off-by: Lokesh Vutla Link: https://lore.kernel.org/r/20210726232248.24395-1-s-anna@ti.com --- board/ti/ks2_evm/mux-k2g.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/board/ti/ks2_evm/mux-k2g.h b/board/ti/ks2_evm/mux-k2g.h index fa6c92cbdf..f24e62850b 100644 --- a/board/ti/ks2_evm/mux-k2g.h +++ b/board/ti/ks2_evm/mux-k2g.h @@ -368,6 +368,9 @@ struct pin_cfg k2g_ice_evm_pin_cfg[] = { { 98, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_DATA */ { 99, BUFFER_CLASS_B | PIN_PDIS | MODE(0) }, /* MDIO_CLK */ + /* ICSS1 Padconf Workaround */ + { 202, MODE(1) | PIN_PDIS }, /* PR1_PRU1_GPO1.PR1_PRU1_GPI1 (PR1_MII1_RXD1) */ + { MAX_PIN_N, } }; -- cgit v1.2.3