From d1c3d8bdfa41a7002bc9c9c0fe8cf7b41d573c0e Mon Sep 17 00:00:00 2001 From: Daniel Schwierzeck Date: Fri, 7 Sep 2018 19:18:44 +0200 Subject: MIPS: start.S: make boot config at offset 0x10 configurable Some MIPS systems store some board-specific boot configuration in the U-Boot binary at offset 0x10. This is used by Malta boards and by Lantiq/Intel SoC's when booting from parallel NOR flash. Convert the hard-coded values to Kconfig options to remove such board-specific stuff out of the generic start.S code. This also deprecates the config option CONFIG_SYS_XWAY_EBU_BOOTCFG. Signed-off-by: Daniel Schwierzeck --- README | 5 ----- 1 file changed, 5 deletions(-) (limited to 'README') diff --git a/README b/README index 09822a317d..21d1f8a007 100644 --- a/README +++ b/README @@ -542,11 +542,6 @@ The following options need to be configured: CONF_CM_CACHABLE_CUW CONF_CM_CACHABLE_ACCELERATED - CONFIG_SYS_XWAY_EBU_BOOTCFG - - Special option for Lantiq XWAY SoCs for booting from NOR flash. - See also arch/mips/cpu/mips32/start.S. - CONFIG_XWAY_SWAP_BYTES Enable compilation of tools/xway-swap-bytes needed for Lantiq -- cgit v1.2.3