From 9b7993bba939220dba945b2dbf979d2c3e68123d Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 14 May 2021 21:34:10 -0400 Subject: m68k: Remove M5475x boards These board has not been converted to CONFIG_DM_PCI by the deadline. Remove them. As this is the last of the mcf547x_8x family of boards, remove that support as well. Cc: TsiChung Liew Signed-off-by: Tom Rini --- arch/m68k/cpu/mcf547x_8x/Makefile | 9 -- arch/m68k/cpu/mcf547x_8x/cpu.c | 153 -------------------- arch/m68k/cpu/mcf547x_8x/cpu_init.c | 150 ------------------- arch/m68k/cpu/mcf547x_8x/interrupts.c | 35 ----- arch/m68k/cpu/mcf547x_8x/pci.c | 154 -------------------- arch/m68k/cpu/mcf547x_8x/slicetimer.c | 95 ------------ arch/m68k/cpu/mcf547x_8x/speed.c | 33 ----- arch/m68k/cpu/mcf547x_8x/start.S | 264 ---------------------------------- 8 files changed, 893 deletions(-) delete mode 100644 arch/m68k/cpu/mcf547x_8x/Makefile delete mode 100644 arch/m68k/cpu/mcf547x_8x/cpu.c delete mode 100644 arch/m68k/cpu/mcf547x_8x/cpu_init.c delete mode 100644 arch/m68k/cpu/mcf547x_8x/interrupts.c delete mode 100644 arch/m68k/cpu/mcf547x_8x/pci.c delete mode 100644 arch/m68k/cpu/mcf547x_8x/slicetimer.c delete mode 100644 arch/m68k/cpu/mcf547x_8x/speed.c delete mode 100644 arch/m68k/cpu/mcf547x_8x/start.S (limited to 'arch/m68k/cpu') diff --git a/arch/m68k/cpu/mcf547x_8x/Makefile b/arch/m68k/cpu/mcf547x_8x/Makefile deleted file mode 100644 index 0db3386aa8..0000000000 --- a/arch/m68k/cpu/mcf547x_8x/Makefile +++ /dev/null @@ -1,9 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0+ -# -# (C) Copyright 2000-2004 -# Wolfgang Denk, DENX Software Engineering, wd@denx.de. - -# ccflags-y += -DET_DEBUG - -extra-y = start.o -obj-y = cpu.o speed.o cpu_init.o pci.o interrupts.o slicetimer.o diff --git a/arch/m68k/cpu/mcf547x_8x/cpu.c b/arch/m68k/cpu/mcf547x_8x/cpu.c deleted file mode 100644 index c1361e7057..0000000000 --- a/arch/m68k/cpu/mcf547x_8x/cpu.c +++ /dev/null @@ -1,153 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) -{ - gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR); - - out_be16(&gptmr->pre, 10); - out_be16(&gptmr->cnt, 1); - - /* enable watchdog, set timeout to 0 and wait */ - out_8(&gptmr->mode, GPT_TMS_SGPIO); - out_8(&gptmr->ctrl, GPT_CTRL_WDEN | GPT_CTRL_CE); - - /* we don't return! */ - return 1; -}; - -#if defined(CONFIG_DISPLAY_CPUINFO) -int print_cpuinfo(void) -{ - siu_t *siu = (siu_t *) MMAP_SIU; - u16 id = 0; - - puts("CPU: "); - - switch ((in_be32(&siu->jtagid) & 0x000FF000) >> 12) { - case 0x0C: - id = 5485; - break; - case 0x0D: - id = 5484; - break; - case 0x0E: - id = 5483; - break; - case 0x0F: - id = 5482; - break; - case 0x10: - id = 5481; - break; - case 0x11: - id = 5480; - break; - case 0x12: - id = 5475; - break; - case 0x13: - id = 5474; - break; - case 0x14: - id = 5473; - break; - case 0x15: - id = 5472; - break; - case 0x16: - id = 5471; - break; - case 0x17: - id = 5470; - break; - } - - if (id) { - char buf1[32], buf2[32]; - - printf("Freescale MCF%d\n", id); - printf(" CPU CLK %s MHz BUS CLK %s MHz\n", - strmhz(buf1, gd->cpu_clk), - strmhz(buf2, gd->bus_clk)); - } - - return 0; -}; -#endif /* CONFIG_DISPLAY_CPUINFO */ - -#if defined(CONFIG_HW_WATCHDOG) -/* Called by macro WATCHDOG_RESET */ -void hw_watchdog_reset(void) -{ - gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR); - - out_8(&gptmr->ocpw, 0xa5); -} - -int watchdog_disable(void) -{ - gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR); - - /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */ - out_8(&gptmr->mode, 0); - out_8(&gptmr->ctrl, 0); - - puts("WATCHDOG:disabled\n"); - - return (0); -} - -int watchdog_init(void) -{ - gptmr_t *gptmr = (gptmr_t *) (MMAP_GPTMR); - - out_be16(&gptmr->pre, CONFIG_WATCHDOG_TIMEOUT); - out_be16(&gptmr->cnt, CONFIG_SYS_TIMER_PRESCALER * 1000); - - out_8(&gptmr->mode, GPT_TMS_SGPIO); - out_8(&gptmr->ctrl, GPT_CTRL_CE | GPT_CTRL_WDEN); - puts("WATCHDOG:enabled\n"); - - return (0); -} -#endif /* CONFIG_HW_WATCHDOG */ - -#if defined(CONFIG_FSLDMAFEC) || defined(CONFIG_MCFFEC) -/* Default initializations for MCFFEC controllers. To override, - * create a board-specific function called: - * int board_eth_init(struct bd_info *bis) - */ - -int cpu_eth_init(struct bd_info *bis) -{ -#if defined(CONFIG_FSLDMAFEC) - mcdmafec_initialize(bis); -#endif -#if defined(CONFIG_MCFFEC) - mcffec_initialize(bis); -#endif - return 0; -} -#endif diff --git a/arch/m68k/cpu/mcf547x_8x/cpu_init.c b/arch/m68k/cpu/mcf547x_8x/cpu_init.c deleted file mode 100644 index 8e42b63141..0000000000 --- a/arch/m68k/cpu/mcf547x_8x/cpu_init.c +++ /dev/null @@ -1,150 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2007, 2012 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -#include -#include -#include -#include -#include -#include - -#if defined(CONFIG_CMD_NET) -#include -#include -#include -#include -#endif - -/* - * Breath some life into the CPU... - * - * Set up the memory map, - * initialize a bunch of registers, - * initialize the UPM's - */ -void cpu_init_f(void) -{ - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS; - xlbarb_t *xlbarb = (xlbarb_t *) MMAP_XARB; - - out_be32(&xlbarb->adrto, 0x2000); - out_be32(&xlbarb->datto, 0x2500); - out_be32(&xlbarb->busto, 0x3000); - - out_be32(&xlbarb->cfg, XARB_CFG_AT | XARB_CFG_DT); - - /* Master Priority Enable */ - out_be32(&xlbarb->prien, 0xff); - out_be32(&xlbarb->pri, 0); - -#if (defined(CONFIG_SYS_CS0_BASE) && defined(CONFIG_SYS_CS0_MASK) && defined(CONFIG_SYS_CS0_CTRL)) - out_be32(&fbcs->csar0, CONFIG_SYS_CS0_BASE); - out_be32(&fbcs->cscr0, CONFIG_SYS_CS0_CTRL); - out_be32(&fbcs->csmr0, CONFIG_SYS_CS0_MASK); -#endif - -#if (defined(CONFIG_SYS_CS1_BASE) && defined(CONFIG_SYS_CS1_MASK) && defined(CONFIG_SYS_CS1_CTRL)) - out_be32(&fbcs->csar1, CONFIG_SYS_CS1_BASE); - out_be32(&fbcs->cscr1, CONFIG_SYS_CS1_CTRL); - out_be32(&fbcs->csmr1, CONFIG_SYS_CS1_MASK); -#endif - -#if (defined(CONFIG_SYS_CS2_BASE) && defined(CONFIG_SYS_CS2_MASK) && defined(CONFIG_SYS_CS2_CTRL)) - out_be32(&fbcs->csar2, CONFIG_SYS_CS2_BASE); - out_be32(&fbcs->cscr2, CONFIG_SYS_CS2_CTRL); - out_be32(&fbcs->csmr2, CONFIG_SYS_CS2_MASK); -#endif - -#if (defined(CONFIG_SYS_CS3_BASE) && defined(CONFIG_SYS_CS3_MASK) && defined(CONFIG_SYS_CS3_CTRL)) - out_be32(&fbcs->csar3, CONFIG_SYS_CS3_BASE); - out_be32(&fbcs->cscr3, CONFIG_SYS_CS3_CTRL); - out_be32(&fbcs->csmr3, CONFIG_SYS_CS3_MASK); -#endif - -#if (defined(CONFIG_SYS_CS4_BASE) && defined(CONFIG_SYS_CS4_MASK) && defined(CONFIG_SYS_CS4_CTRL)) - out_be32(&fbcs->csar4, CONFIG_SYS_CS4_BASE); - out_be32(&fbcs->cscr4, CONFIG_SYS_CS4_CTRL); - out_be32(&fbcs->csmr4, CONFIG_SYS_CS4_MASK); -#endif - -#if (defined(CONFIG_SYS_CS5_BASE) && defined(CONFIG_SYS_CS5_MASK) && defined(CONFIG_SYS_CS5_CTRL)) - out_be32(&fbcs->csar5, CONFIG_SYS_CS5_BASE); - out_be32(&fbcs->cscr5, CONFIG_SYS_CS5_CTRL); - out_be32(&fbcs->csmr5, CONFIG_SYS_CS5_MASK); -#endif - -#ifdef CONFIG_SYS_I2C_FSL - out_be16(&gpio->par_feci2cirq, - GPIO_PAR_FECI2CIRQ_SCL | GPIO_PAR_FECI2CIRQ_SDA); -#endif - - icache_enable(); -} - -/* - * initialize higher level parts of CPU like timers - */ -int cpu_init_r(void) -{ -#if defined(CONFIG_CMD_NET) && defined(CONFIG_FSLDMAFEC) - MCD_initDma((dmaRegs *) (MMAP_MCDMA), (void *)(MMAP_SRAM + 512), - MCD_RELOC_TASKS); -#endif - return (0); -} - -void uart_port_conf(int port) -{ - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - u8 *pscsicr = (u8 *) (CONFIG_SYS_UART_BASE + 0x40); - - /* Setup Ports: */ - switch (port) { - case 0: - out_8(&gpio->par_psc0, GPIO_PAR_PSC0_TXD0 | GPIO_PAR_PSC0_RXD0); - break; - case 1: - out_8(&gpio->par_psc1, GPIO_PAR_PSC1_TXD1 | GPIO_PAR_PSC1_RXD1); - break; - case 2: - out_8(&gpio->par_psc2, GPIO_PAR_PSC2_TXD2 | GPIO_PAR_PSC2_RXD2); - break; - case 3: - out_8(&gpio->par_psc3, GPIO_PAR_PSC3_TXD3 | GPIO_PAR_PSC3_RXD3); - break; - } - - clrbits_8(pscsicr, 0x07); -} - -#if defined(CONFIG_CMD_NET) -int fecpin_setclear(fec_info_t *info, int setclear) -{ - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - u32 fec0_base; - - if (fec_get_base_addr(0, &fec0_base)) - return -1; - - if (setclear) { - if (info->iobase == fec0_base) - setbits_be16(&gpio->par_feci2cirq, 0xf000); - else - setbits_be16(&gpio->par_feci2cirq, 0x0fc0); - } else { - if (info->iobase == fec0_base) - clrbits_be16(&gpio->par_feci2cirq, 0xf000); - else - clrbits_be16(&gpio->par_feci2cirq, 0x0fc0); - } - return 0; -} -#endif diff --git a/arch/m68k/cpu/mcf547x_8x/interrupts.c b/arch/m68k/cpu/mcf547x_8x/interrupts.c deleted file mode 100644 index 703090ddc2..0000000000 --- a/arch/m68k/cpu/mcf547x_8x/interrupts.c +++ /dev/null @@ -1,35 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * - * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -/* CPU specific interrupt routine */ -#include -#include -#include -#include - -int interrupt_init(void) -{ - int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); - - /* Make sure all interrupts are disabled */ - setbits_be32(&intp->imrh0, 0xffffffff); - setbits_be32(&intp->imrl0, 0xffffffff); - - enable_interrupts(); - - return 0; -} - -#if defined(CONFIG_SLTTMR) -void dtimer_intr_setup(void) -{ - int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE); - - out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); - clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK); -} -#endif diff --git a/arch/m68k/cpu/mcf547x_8x/pci.c b/arch/m68k/cpu/mcf547x_8x/pci.c deleted file mode 100644 index 74ba68124f..0000000000 --- a/arch/m68k/cpu/mcf547x_8x/pci.c +++ /dev/null @@ -1,154 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -/* - * PCI Configuration space access support - */ -#include -#include -#include -#include -#include - -#if defined(CONFIG_PCI) -/* System RAM mapped over PCI */ -#define CONFIG_SYS_PCI_SYS_MEM_BUS CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_PCI_SYS_MEM_PHYS CONFIG_SYS_SDRAM_BASE -#define CONFIG_SYS_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024) - -#define cfg_read(val, addr, type, op) *val = op((type)(addr)); -#define cfg_write(val, addr, type, op) op((type *)(addr), (val)); - -#define PCI_OP(rw, size, type, op, mask) \ -int pci_##rw##_cfg_##size(struct pci_controller *hose, \ - pci_dev_t dev, int offset, type val) \ -{ \ - u32 addr = 0; \ - u16 cfg_type = 0; \ - addr = ((offset & 0xfc) | cfg_type | (dev) | 0x80000000); \ - out_be32(hose->cfg_addr, addr); \ - cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \ - __asm__ __volatile__("nop"); \ - __asm__ __volatile__("nop"); \ - out_be32(hose->cfg_addr, addr & 0x7fffffff); \ - return 0; \ -} - -PCI_OP(read, byte, u8 *, in_8, 3) -PCI_OP(read, word, u16 *, in_le16, 2) -PCI_OP(write, byte, u8, out_8, 3) -PCI_OP(write, word, u16, out_le16, 2) -PCI_OP(write, dword, u32, out_le32, 0) - -int pci_read_cfg_dword(struct pci_controller *hose, pci_dev_t dev, - int offset, u32 * val) -{ - u32 addr; - u32 tmpv; - u32 mask = 2; /* word access */ - /* Read lower 16 bits */ - addr = ((offset & 0xfc) | (dev) | 0x80000000); - out_be32(hose->cfg_addr, addr); - *val = (u32) in_le16((u16 *) (hose->cfg_data + (offset & mask))); - __asm__ __volatile__("nop"); - out_be32(hose->cfg_addr, addr & 0x7fffffff); - - /* Read upper 16 bits */ - offset += 2; - addr = ((offset & 0xfc) | 1 | (dev) | 0x80000000); - out_be32(hose->cfg_addr, addr); - tmpv = (u32) in_le16((u16 *) (hose->cfg_data + (offset & mask))); - __asm__ __volatile__("nop"); - out_be32(hose->cfg_addr, addr & 0x7fffffff); - - /* combine results into dword value */ - *val = (tmpv << 16) | *val; - - return 0; -} - -void pci_mcf547x_8x_init(struct pci_controller *hose) -{ - pci_t *pci = (pci_t *) MMAP_PCI; - gpio_t *gpio = (gpio_t *) MMAP_GPIO; - - /* Port configuration */ - out_be16(&gpio->par_pcibg, - GPIO_PAR_PCIBG_PCIBG0(3) | GPIO_PAR_PCIBG_PCIBG1(3) | - GPIO_PAR_PCIBG_PCIBG2(3) | GPIO_PAR_PCIBG_PCIBG3(3) | - GPIO_PAR_PCIBG_PCIBG4(3)); - out_be16(&gpio->par_pcibr, - GPIO_PAR_PCIBR_PCIBR0(3) | GPIO_PAR_PCIBR_PCIBR1(3) | - GPIO_PAR_PCIBR_PCIBR2(3) | GPIO_PAR_PCIBR_PCIBR3(3) | - GPIO_PAR_PCIBR_PCIBR4(3)); - - /* Assert reset bit */ - setbits_be32(&pci->gscr, PCI_GSCR_PR); - - out_be32(&pci->tcr1, PCI_TCR1_P); - - /* Initiator windows */ - out_be32(&pci->iw0btar, - CONFIG_SYS_PCI_MEM_PHYS | (CONFIG_SYS_PCI_MEM_PHYS >> 16)); - out_be32(&pci->iw1btar, - CONFIG_SYS_PCI_IO_PHYS | (CONFIG_SYS_PCI_IO_PHYS >> 16)); - out_be32(&pci->iw2btar, - CONFIG_SYS_PCI_CFG_PHYS | (CONFIG_SYS_PCI_CFG_PHYS >> 16)); - - out_be32(&pci->iwcr, - PCI_IWCR_W0C_EN | PCI_IWCR_W1C_EN | PCI_IWCR_W1C_IO | - PCI_IWCR_W2C_EN | PCI_IWCR_W2C_IO); - - out_be32(&pci->icr, 0); - - /* Enable bus master and mem access */ - out_be32(&pci->scr, PCI_SCR_B | PCI_SCR_M); - - /* Cache line size and master latency */ - out_be32(&pci->cr1, PCI_CR1_CLS(8) | PCI_CR1_LTMR(0xf8)); - out_be32(&pci->cr2, 0); - -#ifdef CONFIG_SYS_PCI_BAR0 - out_be32(&pci->bar0, PCI_BAR_BAR0(CONFIG_SYS_PCI_BAR0)); - out_be32(&pci->tbatr0a, CONFIG_SYS_PCI_TBATR0 | PCI_TBATR_EN); -#endif -#ifdef CONFIG_SYS_PCI_BAR1 - out_be32(&pci->bar1, PCI_BAR_BAR1(CONFIG_SYS_PCI_BAR1)); - out_be32(&pci->tbatr1a, CONFIG_SYS_PCI_TBATR1 | PCI_TBATR_EN); -#endif - - /* Deassert reset bit */ - clrbits_be32(&pci->gscr, PCI_GSCR_PR); - udelay(1000); - - /* Enable PCI bus master support */ - hose->first_busno = 0; - hose->last_busno = 0xff; - - pci_set_region(hose->regions + 0, CONFIG_SYS_PCI_MEM_BUS, CONFIG_SYS_PCI_MEM_PHYS, - CONFIG_SYS_PCI_MEM_SIZE, PCI_REGION_MEM); - - pci_set_region(hose->regions + 1, CONFIG_SYS_PCI_IO_BUS, CONFIG_SYS_PCI_IO_PHYS, - CONFIG_SYS_PCI_IO_SIZE, PCI_REGION_IO); - - pci_set_region(hose->regions + 2, CONFIG_SYS_PCI_SYS_MEM_BUS, - CONFIG_SYS_PCI_SYS_MEM_PHYS, CONFIG_SYS_PCI_SYS_MEM_SIZE, - PCI_REGION_MEM | PCI_REGION_SYS_MEMORY); - - hose->region_count = 3; - - hose->cfg_addr = &(pci->car); - hose->cfg_data = (volatile unsigned char *)CONFIG_SYS_PCI_CFG_BUS; - - pci_set_ops(hose, pci_read_cfg_byte, pci_read_cfg_word, - pci_read_cfg_dword, pci_write_cfg_byte, pci_write_cfg_word, - pci_write_cfg_dword); - - /* Hose scan */ - pci_register_hose(hose); - hose->last_busno = pci_hose_scan(hose); -} -#endif /* CONFIG_PCI */ diff --git a/arch/m68k/cpu/mcf547x_8x/slicetimer.c b/arch/m68k/cpu/mcf547x_8x/slicetimer.c deleted file mode 100644 index dc076fc6e8..0000000000 --- a/arch/m68k/cpu/mcf547x_8x/slicetimer.c +++ /dev/null @@ -1,95 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * (C) Copyright 2007, 2012 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -DECLARE_GLOBAL_DATA_PTR; - -static ulong timestamp; - -#if defined(CONFIG_SLTTMR) -#ifndef CONFIG_SYS_UDELAY_BASE -# error "uDelay base not defined!" -#endif - -#if !defined(CONFIG_SYS_TMR_BASE) || !defined(CONFIG_SYS_INTR_BASE) || !defined(CONFIG_SYS_TMRINTR_NO) || !defined(CONFIG_SYS_TMRINTR_MASK) -# error "TMR_BASE, INTR_BASE, TMRINTR_NO or TMRINTR_MASk not defined!" -#endif -extern void dtimer_intr_setup(void); - -void __udelay(unsigned long usec) -{ - slt_t *timerp = (slt_t *) (CONFIG_SYS_UDELAY_BASE); - u32 now, freq; - - /* 1 us period */ - freq = CONFIG_SYS_TIMER_PRESCALER; - - /* Disable */ - out_be32(&timerp->cr, 0); - out_be32(&timerp->tcnt, usec * freq); - out_be32(&timerp->cr, SLT_CR_TEN); - - now = in_be32(&timerp->cnt); - while (now != 0) - now = in_be32(&timerp->cnt); - - setbits_be32(&timerp->sr, SLT_SR_ST); - out_be32(&timerp->cr, 0); -} - -void dtimer_interrupt(void *not_used) -{ - slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE); - - /* check for timer interrupt asserted */ - if ((CONFIG_SYS_TMRPND_REG & CONFIG_SYS_TMRINTR_MASK) == CONFIG_SYS_TMRINTR_PEND) { - setbits_be32(&timerp->sr, SLT_SR_ST); - timestamp++; - return; - } -} - -int timer_init(void) -{ - slt_t *timerp = (slt_t *) (CONFIG_SYS_TMR_BASE); - - timestamp = 0; - - /* disable timer */ - out_be32(&timerp->cr, 0); - out_be32(&timerp->tcnt, 0); - /* clear status */ - out_be32(&timerp->sr, SLT_SR_BE | SLT_SR_ST); - - /* initialize and enable timer interrupt */ - irq_install_handler(CONFIG_SYS_TMRINTR_NO, dtimer_interrupt, 0); - - /* Interrupt every ms */ - out_be32(&timerp->tcnt, 1000 * CONFIG_SYS_TIMER_PRESCALER); - - dtimer_intr_setup(); - - /* set a period of 1us, set timer mode to restart and - enable timer and interrupt */ - out_be32(&timerp->cr, SLT_CR_RUN | SLT_CR_IEN | SLT_CR_TEN); - return 0; -} - -ulong get_timer(ulong base) -{ - return (timestamp - base); -} - -#endif /* CONFIG_SLTTMR */ diff --git a/arch/m68k/cpu/mcf547x_8x/speed.c b/arch/m68k/cpu/mcf547x_8x/speed.c deleted file mode 100644 index bbcf601f38..0000000000 --- a/arch/m68k/cpu/mcf547x_8x/speed.c +++ /dev/null @@ -1,33 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -/* - * - * (C) Copyright 2000-2003 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * Copyright (C) 2004-2007 Freescale Semiconductor, Inc. - * TsiChung Liew (Tsi-Chung.Liew@freescale.com) - */ - -#include -#include -#include -#include - -#include - -DECLARE_GLOBAL_DATA_PTR; - -/* - * get_clocks() fills in gd->cpu_clock and gd->bus_clk - */ -int get_clocks(void) -{ - gd->bus_clk = CONFIG_SYS_CLK; - gd->cpu_clk = (gd->bus_clk * 2); - -#ifdef CONFIG_SYS_I2C_FSL - gd->arch.i2c1_clk = gd->bus_clk; -#endif - - return (0); -} diff --git a/arch/m68k/cpu/mcf547x_8x/start.S b/arch/m68k/cpu/mcf547x_8x/start.S deleted file mode 100644 index b70842b2b8..0000000000 --- a/arch/m68k/cpu/mcf547x_8x/start.S +++ /dev/null @@ -1,264 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2003 Josef Baumgartner - * Based on code from Bernhard Kuhn - */ - -#include -#include -#include "version.h" -#include - -#define _START _start -#define _FAULT _fault - -#define SAVE_ALL \ - move.w #0x2700,%sr; /* disable intrs */ \ - subl #60,%sp; /* space for 15 regs */ \ - moveml %d0-%d7/%a0-%a6,%sp@; - -#define RESTORE_ALL \ - moveml %sp@,%d0-%d7/%a0-%a6; \ - addl #60,%sp; /* space for 15 regs */ \ - rte; - -.text - -/* - * Vector table. This is used for initial platform startup. - * These vectors are to catch any un-intended traps. - */ -_vectors: -INITSP: .long 0x00000000 /* Initial SP */ -INITPC: .long _START /* Initial PC */ - -vector02_0F: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -/* Reserved */ -vector10_17: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -vector18_1F: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -/* TRAP #0 - #15 */ -vector20_2F: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -/* Reserved */ -vector30_3F: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -vector64_127: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -vector128_191: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -vector192_255: -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT -.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT - -.text - -.globl _start -_start: - nop - nop - move.w #0x2700,%sr /* Mask off Interrupt */ - - /* Set vector base register at the beginning of the Flash */ - move.l #CONFIG_SYS_FLASH_BASE, %d0 - movec %d0, %VBR - - move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_CTRL), %d0 - movec %d0, %RAMBAR0 - - move.l #(CONFIG_SYS_INIT_RAM1_ADDR + CONFIG_SYS_INIT_RAM1_CTRL), %d0 - movec %d0, %RAMBAR1 - - move.l #CONFIG_SYS_MBAR, %d0 /* set MBAR address */ - move.c %d0, %MBAR - - /* invalidate and disable cache */ - move.l #0x01040100, %d0 /* Invalidate cache cmd */ - movec %d0, %CACR /* Invalidate cache */ - move.l #0, %d0 - movec %d0, %ACR0 - movec %d0, %ACR1 - movec %d0, %ACR2 - movec %d0, %ACR3 - - /* initialize general use internal ram */ - move.l #0, %d0 - move.l #(ICACHE_STATUS), %a1 /* icache */ - move.l #(DCACHE_STATUS), %a2 /* icache */ - move.l %d0, (%a1) - move.l %d0, (%a2) - - /* put relocation table address to a5 */ - move.l #__got_start, %a5 - - /* setup stack initially on top of internal static ram */ - move.l #(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE), %sp - - /* - * if configured, malloc_f arena will be reserved first, - * then (and always) gd struct space will be reserved - */ - move.l %sp, -(%sp) - move.l #board_init_f_alloc_reserve, %a1 - jsr (%a1) - - /* update stack and frame-pointers */ - move.l %d0, %sp - move.l %sp, %fp - - /* initialize reserved area */ - move.l %d0, -(%sp) - move.l #board_init_f_init_reserve, %a1 - jsr (%a1) - - /* run low-level CPU init code (from flash) */ - jbsr cpu_init_f - - /* run low-level board init code (from flash) */ - clr.l %sp@- - jbsr board_init_f - - /* board_init_f() does not return */ - -/******************************************************************************/ - -/* - * void relocate_code(addr_sp, gd, addr_moni) - * - * This "function" does not return, instead it continues in RAM - * after relocating the monitor code. - * - * r3 = dest - * r4 = src - * r5 = length in bytes - * r6 = cachelinesize - */ -.globl relocate_code -relocate_code: - link.w %a6,#0 - move.l 8(%a6), %sp /* set new stack pointer */ - - move.l 12(%a6), %d0 /* Save copy of Global Data pointer */ - move.l 16(%a6), %a0 /* Save copy of Destination Address */ - - move.l #CONFIG_SYS_MONITOR_BASE, %a1 - move.l #__init_end, %a2 - move.l %a0, %a3 - - /* copy the code to RAM */ -1: - move.l (%a1)+, (%a3)+ - cmp.l %a1,%a2 - bgt.s 1b - -/* - * We are done. Do not return, instead branch to second part of board - * initialization, now running from RAM. - */ - move.l %a0, %a1 - add.l #(in_ram - CONFIG_SYS_MONITOR_BASE), %a1 - jmp (%a1) - -in_ram: - -clear_bss: - /* - * Now clear BSS segment - */ - move.l %a0, %a1 - add.l #(_sbss - CONFIG_SYS_MONITOR_BASE),%a1 - move.l %a0, %d1 - add.l #(_ebss - CONFIG_SYS_MONITOR_BASE),%d1 -6: - clr.l (%a1)+ - cmp.l %a1,%d1 - bgt.s 6b - - /* - * fix got table in RAM - */ - move.l %a0, %a1 - add.l #(__got_start - CONFIG_SYS_MONITOR_BASE),%a1 - move.l %a1,%a5 /* fix got pointer register a5 */ - - move.l %a0, %a2 - add.l #(__got_end - CONFIG_SYS_MONITOR_BASE),%a2 - -7: - move.l (%a1),%d1 - sub.l #_start,%d1 - add.l %a0,%d1 - move.l %d1,(%a1)+ - cmp.l %a2, %a1 - bne 7b - - /* calculate relative jump to board_init_r in ram */ - move.l %a0, %a1 - add.l #(board_init_r - CONFIG_SYS_MONITOR_BASE), %a1 - - /* set parameters for board_init_r */ - move.l %a0,-(%sp) /* dest_addr */ - move.l %d0,-(%sp) /* gd */ - jsr (%a1) - -/******************************************************************************/ - -/* exception code */ -.globl _fault -_fault: - bra _fault - -.globl _exc_handler -_exc_handler: - SAVE_ALL - movel %sp,%sp@- - bsr exc_handler - addql #4,%sp - RESTORE_ALL - -.globl _int_handler -_int_handler: - SAVE_ALL - movel %sp,%sp@- - bsr int_handler - addql #4,%sp - RESTORE_ALL - -/******************************************************************************/ - -.globl version_string -version_string: -.ascii U_BOOT_VERSION_STRING, "\0" -.align 4 -- cgit v1.2.3