From 0dbe3fb0be546f2be7adaee6baf6d550fbba4e26 Mon Sep 17 00:00:00 2001 From: Samin Guo Date: Tue, 1 Nov 2022 16:19:48 +0800 Subject: board:starfive:evb: add get_chip_type Read the chip model from the rgpio3 and setenv "chip_vision" 1: jh7110B 0: JH7110A defalut: JH7110A Signed-off-by: Samin Guo --- arch/riscv/include/asm/arch-jh7110/jh7110-regs.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h b/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h index 6a2b67bb3c..ad04e8877c 100644 --- a/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h +++ b/arch/riscv/include/asm/arch-jh7110/jh7110-regs.h @@ -15,6 +15,7 @@ #define AON_SYSCON_BASE 0x17010000 #define SYS_CRG_BASE 0x13020000 #define AON_CRG_BASE 0x17000000 +#define AON_IOMUX_BASE 0x17020000 #define STG_CRG_BASE 0x10230000 #define CLK_ENABLE_MASK 0x80000000U #define SYS_CRG_RESET_ASSERT3_SHIFT 0X304U @@ -75,6 +76,7 @@ #define PCIE_USB3_RX_STANDBY_MASK 0x80U #define PCIE_USB3_PHY_ENABLE_SHIFT 0x4U #define PCIE_USB3_PHY_ENABLE_MASK 0x10U +#define AON_GPIO_DIN_REG 0x2c /*timer cfg*/ #define TIMER_CLK_APB_SHIFT 0x1F0U -- cgit v1.2.3