From 64a12202ed113c4696c0f4b6c3d6a35d97383851 Mon Sep 17 00:00:00 2001 From: David Wu Date: Sat, 13 Jan 2018 14:07:04 +0800 Subject: clk: rockchip: clk_rk3368: Implement "assign-clock-parent" Implement the setting parent for gmac clock, and add internal pll div set for mac clk. Signed-off-by: David Wu Acked-by: Philipp Tomsich Reviewed-by: Philipp Tomsich --- arch/arm/include/asm/arch-rockchip/cru_rk3368.h | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch') diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h index 5f6a5fbe4c..6a6fe4775d 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3368.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3368.h @@ -95,6 +95,13 @@ enum { CLK_SARADC_DIV_CON_WIDTH = 8, /* CLKSEL43_CON */ + GMAC_DIV_CON_SHIFT = 0x0, + GMAC_DIV_CON_MASK = GENMASK(4, 0), + GMAC_PLL_SHIFT = 6, + GMAC_PLL_MASK = GENMASK(7, 6), + GMAC_PLL_SELECT_NEW = (0x0 << GMAC_PLL_SHIFT), + GMAC_PLL_SELECT_CODEC = (0x1 << GMAC_PLL_SHIFT), + GMAC_PLL_SELECT_GENERAL = (0x2 << GMAC_PLL_SHIFT), GMAC_MUX_SEL_EXTCLK = BIT(8), /* CLKSEL51_CON */ -- cgit v1.2.3