From a7e7baea0a12decfb3e4cfae8b7c08ac48ad1bae Mon Sep 17 00:00:00 2001 From: Amit Singh Tomar Date: Thu, 2 Dec 2021 23:53:28 +0530 Subject: ARM: dts: sync Actions Semi S700 DT from Linux v5.16-rc3 This Synchronizes the Actions Semi S700 SoC DT changes from commit "g58e1100fdc59" ("Linux v5.16-rc3"). Signed-off-by: Amit Singh Tomar --- arch/arm/dts/s700.dtsi | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/dts/s700.dtsi b/arch/arm/dts/s700.dtsi index 2006ad5424..2c78caebf5 100644 --- a/arch/arm/dts/s700.dtsi +++ b/arch/arm/dts/s700.dtsi @@ -5,6 +5,7 @@ #include #include +#include #include / { @@ -231,7 +232,7 @@ pinctrl: pinctrl@e01b0000 { compatible = "actions,s700-pinctrl"; - reg = <0x0 0xe01b0000 0x0 0x1000>; + reg = <0x0 0xe01b0000 0x0 0x100>; clocks = <&cmu CLK_GPIO>; gpio-controller; gpio-ranges = <&pinctrl 0 0 136>; @@ -244,5 +245,19 @@ , ; }; + + dma: dma-controller@e0230000 { + compatible = "actions,s700-dma"; + reg = <0x0 0xe0230000 0x0 0x1000>; + interrupts = , + , + , + ; + #dma-cells = <1>; + dma-channels = <10>; + dma-requests = <44>; + clocks = <&cmu CLK_DMAC>; + power-domains = <&sps S700_PD_DMA>; + }; }; }; -- cgit v1.2.3 From 3739cd58a486b4e54d8a22c853fed02306b5b021 Mon Sep 17 00:00:00 2001 From: Amit Singh Tomar Date: Sun, 28 Nov 2021 17:02:23 +0530 Subject: ARM: dts: s700: add MMC/SD controller node This patch adds node for mmc/sd controller found on Action Semi OWL S700 SoC. Since, upstream Linux binding has not been merged for S700 MMC/SD controller, Changes are put in u-boot specific dtsi file. Signed-off-by: Amit Singh Tomar --- arch/arm/dts/s700-u-boot.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch') diff --git a/arch/arm/dts/s700-u-boot.dtsi b/arch/arm/dts/s700-u-boot.dtsi index 1b2768272c..3c3396bccf 100644 --- a/arch/arm/dts/s700-u-boot.dtsi +++ b/arch/arm/dts/s700-u-boot.dtsi @@ -19,6 +19,16 @@ status = "okay"; }; + mmc0: mmc@e0210000 { + compatible = "actions,s700-mmc", "actions,owl-mmc"; + reg = <0x0 0xe0210000 0x0 0x4000>; + interrupts = ; + clocks = <&cmu CLK_SD0>; + dmas = <&dma 2>; + dma-names = "mmc"; + bus-width = <4>; + status = "okay"; + }; }; }; -- cgit v1.2.3 From abc75897caee34f150a710109107236e76c5d8a3 Mon Sep 17 00:00:00 2001 From: Dylan Hung Date: Thu, 9 Dec 2021 10:12:26 +0800 Subject: ARM: dts: ast2600: Add MDIO devices There are 4 MDIO bus controllers in AST2600 SOC. Each of them can connect to one or more PHY chips and is flexible to work with the 4 MAC devices in AST2600. On AST2600 EVB, MDIO 0,1,2,3 connect to the PHY chips used by MAC 0,1,2,3 respectively. Signed-off-by: Dylan Hung Reviewed-by: Ramon Fried --- arch/arm/dts/ast2600-evb.dts | 68 ++++++++++++++++++++++++++++++++++++++++++++ arch/arm/dts/ast2600.dtsi | 46 ++++++++++++++++++++++++++---- 2 files changed, 109 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/arm/dts/ast2600-evb.dts b/arch/arm/dts/ast2600-evb.dts index 05362d19bd..c17988ec3c 100644 --- a/arch/arm/dts/ast2600-evb.dts +++ b/arch/arm/dts/ast2600-evb.dts @@ -163,6 +163,74 @@ pinctrl-0 = <&pinctrl_i2c9_default>; }; +&mdio0 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + ethphy0: ethernet-phy@0 { + reg = <0>; + }; +}; + +&mdio1 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + ethphy1: ethernet-phy@0 { + reg = <0>; + }; +}; + +&mdio2 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + ethphy2: ethernet-phy@0 { + reg = <0>; + }; +}; + +&mdio3 { + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + ethphy3: ethernet-phy@0 { + reg = <0>; + }; +}; + +&mac0 { + status = "okay"; + phy-mode = "rgmii-rxid"; + phy-handle = <ðphy0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii1_default>; +}; + +&mac1 { + status = "okay"; + phy-mode = "rgmii-rxid"; + phy-handle = <ðphy1>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii2_default>; +}; + +&mac2 { + status = "okay"; + phy-mode = "rgmii"; + phy-handle = <ðphy2>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii3_default>; +}; + +&mac3 { + status = "okay"; + phy-mode = "rgmii"; + phy-handle = <ðphy3>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_rgmii4_default>; +}; + &scu { mac0-clk-delay = <0x1d 0x1c 0x10 0x17 diff --git a/arch/arm/dts/ast2600.dtsi b/arch/arm/dts/ast2600.dtsi index 31905fd208..98840ce7b0 100644 --- a/arch/arm/dts/ast2600.dtsi +++ b/arch/arm/dts/ast2600.dtsi @@ -210,11 +210,47 @@ interrupts = ; }; - mdio: ethernet@1e650000 { - compatible = "aspeed,aspeed-mdio"; - reg = <0x1e650000 0x40>; - resets = <&rst ASPEED_RESET_MII>; - status = "disabled"; + mdio: bus@1e650000 { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1e650000 0x100>; + + mdio0: mdio@0 { + compatible = "aspeed,ast2600-mdio"; + reg = <0 0x8>; + resets = <&rst ASPEED_RESET_MII>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mdio1_default>; + status = "disabled"; + }; + + mdio1: mdio@8 { + compatible = "aspeed,ast2600-mdio"; + reg = <0x8 0x8>; + resets = <&rst ASPEED_RESET_MII>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mdio2_default>; + status = "disabled"; + }; + + mdio2: mdio@10 { + compatible = "aspeed,ast2600-mdio"; + reg = <0x10 0x8>; + resets = <&rst ASPEED_RESET_MII>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mdio3_default>; + status = "disabled"; + }; + + mdio3: mdio@18 { + compatible = "aspeed,ast2600-mdio"; + reg = <0x18 0x8>; + resets = <&rst ASPEED_RESET_MII>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_mdio4_default>; + status = "disabled"; + }; }; mac0: ftgmac@1e660000 { -- cgit v1.2.3