From a8571337d78093d2aff25add22df5cdc4e30f8a9 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 14 May 2021 21:34:20 -0400 Subject: ppc: Remove MPC8541CDS board This board has not been converted to CONFIG_DM_PCI by the deadline and is also missing conversion to CONFIG_DM. Remove it. As this is the only MPC8541 target left, remove that architecture support as well. Cc: Priyanka Jain Signed-off-by: Tom Rini --- arch/powerpc/cpu/mpc85xx/Kconfig | 18 +----------------- arch/powerpc/cpu/mpc85xx/cpu.c | 4 ++-- arch/powerpc/cpu/mpc85xx/pci.c | 2 +- arch/powerpc/cpu/mpc85xx/speed.c | 4 ++-- arch/powerpc/include/asm/cpm_85xx.h | 2 +- arch/powerpc/include/asm/fsl_lbc.h | 3 +-- arch/powerpc/include/asm/immap_85xx.h | 1 - 7 files changed, 8 insertions(+), 26 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/cpu/mpc85xx/Kconfig b/arch/powerpc/cpu/mpc85xx/Kconfig index 22cfa4dc34..0b13856952 100644 --- a/arch/powerpc/cpu/mpc85xx/Kconfig +++ b/arch/powerpc/cpu/mpc85xx/Kconfig @@ -44,11 +44,6 @@ config TARGET_P5040DS imply CMD_SATA imply PANIC_HANG -config TARGET_MPC8541CDS - bool "Support MPC8541CDS" - select ARCH_MPC8541 - select FSL_VIA - config TARGET_MPC8548CDS bool "Support MPC8548CDS" select ARCH_MPC8548 @@ -364,14 +359,6 @@ config ARCH_MPC8540 select FSL_LAW select SYS_FSL_HAS_DDR1 -config ARCH_MPC8541 - bool - select FSL_LAW - select SYS_FSL_HAS_DDR1 - select SYS_FSL_HAS_SEC - select SYS_FSL_SEC_BE - select SYS_FSL_SEC_COMPAT_2 - config ARCH_MPC8544 bool select FSL_LAW @@ -959,7 +946,6 @@ config SYS_CCSRBAR_DEFAULT ARCH_C29X || \ ARCH_MPC8536 || \ ARCH_MPC8540 || \ - ARCH_MPC8541 || \ ARCH_MPC8544 || \ ARCH_MPC8548 || \ ARCH_MPC8555 || \ @@ -1193,7 +1179,6 @@ config SYS_FSL_NUM_LAWS ARCH_MPC8548 || \ ARCH_MPC8568 default 8 if ARCH_MPC8540 || \ - ARCH_MPC8541 || \ ARCH_MPC8555 || \ ARCH_MPC8560 help @@ -1267,7 +1252,7 @@ config SYS_FSL_IFC_CLK_DIV config SYS_FSL_LBC_CLK_DIV int "Divider of platform clock" depends on FSL_ELBC || ARCH_MPC8540 || \ - ARCH_MPC8548 || ARCH_MPC8541 || \ + ARCH_MPC8548 || \ ARCH_MPC8555 || ARCH_MPC8560 || \ ARCH_MPC8568 @@ -1286,7 +1271,6 @@ config FSL_VIA source "board/emulation/qemu-ppce500/Kconfig" source "board/freescale/corenet_ds/Kconfig" -source "board/freescale/mpc8541cds/Kconfig" source "board/freescale/mpc8548cds/Kconfig" source "board/freescale/mpc8555cds/Kconfig" source "board/freescale/mpc8568mds/Kconfig" diff --git a/arch/powerpc/cpu/mpc85xx/cpu.c b/arch/powerpc/cpu/mpc85xx/cpu.c index fc25bb28ad..e8126c98f8 100644 --- a/arch/powerpc/cpu/mpc85xx/cpu.c +++ b/arch/powerpc/cpu/mpc85xx/cpu.c @@ -301,8 +301,8 @@ int checkcpu (void) int do_reset(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]) { /* Everything after the first generation of PQ3 parts has RSTCR */ -#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \ - defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_ARCH_MPC8560) +#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8555) || \ + defined(CONFIG_ARCH_MPC8560) unsigned long val, msr; /* diff --git a/arch/powerpc/cpu/mpc85xx/pci.c b/arch/powerpc/cpu/mpc85xx/pci.c index 9a6fc13b73..559730181e 100644 --- a/arch/powerpc/cpu/mpc85xx/pci.c +++ b/arch/powerpc/cpu/mpc85xx/pci.c @@ -120,7 +120,7 @@ pci_mpc85xx_init(struct pci_controller *board_hose) pci_register_hose(hose); -#if defined(CONFIG_TARGET_MPC8555CDS) || defined(CONFIG_TARGET_MPC8541CDS) +#if defined(CONFIG_TARGET_MPC8555CDS) /* * This is a SW workaround for an apparent HW problem * in the PCI controller on the MPC85555/41 CDS boards. diff --git a/arch/powerpc/cpu/mpc85xx/speed.c b/arch/powerpc/cpu/mpc85xx/speed.c index 864c53ce2e..90c9fe1af5 100644 --- a/arch/powerpc/cpu/mpc85xx/speed.c +++ b/arch/powerpc/cpu/mpc85xx/speed.c @@ -607,8 +607,8 @@ int get_clocks(void) * for that SOC. This information is taken from application note * AN2919. */ -#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8541) || \ - defined(CONFIG_ARCH_MPC8560) || defined(CONFIG_ARCH_MPC8555) +#if defined(CONFIG_ARCH_MPC8540) || defined(CONFIG_ARCH_MPC8560) || \ + defined(CONFIG_ARCH_MPC8555) gd->arch.i2c1_clk = sys_info.freq_systembus; #elif defined(CONFIG_ARCH_MPC8544) /* diff --git a/arch/powerpc/include/asm/cpm_85xx.h b/arch/powerpc/include/asm/cpm_85xx.h index b46e20e5ce..e6f1fab5fb 100644 --- a/arch/powerpc/include/asm/cpm_85xx.h +++ b/arch/powerpc/include/asm/cpm_85xx.h @@ -77,7 +77,7 @@ */ #define CPM_DATAONLY_BASE ((uint)128) #define CPM_DP_NOSPACE ((uint)0x7FFFFFFF) -#if defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555) +#if defined(CONFIG_ARCH_MPC8555) #define CPM_FCC_SPECIAL_BASE ((uint)0x00009000) #define CPM_DATAONLY_SIZE ((uint)(8 * 1024) - CPM_DATAONLY_BASE) #else /* MPC8540, MPC8560 */ diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h index bf352d9a56..ae17608276 100644 --- a/arch/powerpc/include/asm/fsl_lbc.h +++ b/arch/powerpc/include/asm/fsl_lbc.h @@ -325,8 +325,7 @@ void lbc_sdram_init(void); #define LCRR_CLKDIV 0x0000001F #define LCRR_CLKDIV_SHIFT 0 #if defined(CONFIG_MPC83xx) || defined(CONFIG_ARCH_MPC8540) || \ - defined(CONFIG_ARCH_MPC8541) || defined(CONFIG_ARCH_MPC8555) || \ - defined(CONFIG_ARCH_MPC8560) + defined(CONFIG_ARCH_MPC8555) || defined(CONFIG_ARCH_MPC8560) #define LCRR_CLKDIV_2 0x00000002 #define LCRR_CLKDIV_4 0x00000004 #define LCRR_CLKDIV_8 0x00000008 diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index 59bc32fd17..b6770c4cf4 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -124,7 +124,6 @@ typedef struct ccsr_i2c { } ccsr_i2c_t; #if defined(CONFIG_ARCH_MPC8540) || \ - defined(CONFIG_ARCH_MPC8541) || \ defined(CONFIG_ARCH_MPC8548) || \ defined(CONFIG_ARCH_MPC8555) /* DUART Registers */ -- cgit v1.2.3