From c64ac3b3185aeb3846297ad7391fc6df8ecd73bf Mon Sep 17 00:00:00 2001 From: Marek BehĂșn Date: Wed, 8 Apr 2020 19:25:22 +0200 Subject: arm: mvebu: turris_mox: fix PCIe ranges in device tree MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Use the new a3700_fdt_fix_pcie_regions function in turris_mox.c so that MOX boards with 4 GB RAM are fully supported. Signed-off-by: Marek BehĂșn Reviewed-by: Stefan Roese --- board/CZ.NIC/turris_mox/turris_mox.c | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'board/CZ.NIC') diff --git a/board/CZ.NIC/turris_mox/turris_mox.c b/board/CZ.NIC/turris_mox/turris_mox.c index 8e4c023103..470ea32f9c 100644 --- a/board/CZ.NIC/turris_mox/turris_mox.c +++ b/board/CZ.NIC/turris_mox/turris_mox.c @@ -4,6 +4,7 @@ */ #include +#include #include #include #include @@ -104,6 +105,11 @@ int board_fix_fdt(void *blob) return 0; } + if (a3700_fdt_fix_pcie_regions(blob) < 0) { + printf("Cannot fix PCIe regions in U-Boot's device tree!\n"); + return 0; + } + return 0; } #endif @@ -708,6 +714,11 @@ int ft_board_setup(void *blob, bd_t *bd) res = fdt_setprop_string(blob, node, "status", "okay"); if (res < 0) return res; + + /* Fix PCIe regions for devices with 4 GB RAM */ + res = a3700_fdt_fix_pcie_regions(blob); + if (res < 0) + return res; } /* -- cgit v1.2.3