From d34e56241de299e12639ea39ef65c537cf0ded18 Mon Sep 17 00:00:00 2001 From: Ying Zhang Date: Fri, 6 Sep 2013 17:30:57 +0800 Subject: powerpc : p1_p2_rdb_pc : Enable p1_p2_rdb_pc to start from eSPI with SPL Enable p1_p2_rdb_pc to start from eSPI with SPL. Signed-off-by: Ying Zhang --- board/freescale/p1_p2_rdb_pc/spl.c | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'board/freescale/p1_p2_rdb_pc') diff --git a/board/freescale/p1_p2_rdb_pc/spl.c b/board/freescale/p1_p2_rdb_pc/spl.c index 5b8e0ffa6d..07fab46349 100644 --- a/board/freescale/p1_p2_rdb_pc/spl.c +++ b/board/freescale/p1_p2_rdb_pc/spl.c @@ -11,6 +11,7 @@ #include #include #include +#include DECLARE_GLOBAL_DATA_PTR; @@ -39,6 +40,10 @@ void board_init_f(ulong bootflag) /* Read back the register to synchronize the write. */ in_be32(&gur->pmuxcr); +#ifdef CONFIG_SPL_SPI_BOOT + clrbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_SD_DATA); +#endif + /* initialize selected port with appropriate baud rate */ plat_ratio = in_be32(&gur->porpllsr) & MPC85xx_PORPLLSR_PLAT_RATIO; plat_ratio >>= 1; @@ -49,6 +54,8 @@ void board_init_f(ulong bootflag) bus_clk / 16 / CONFIG_BAUDRATE); #ifdef CONFIG_SPL_MMC_BOOT puts("\nSD boot...\n"); +#elif defined(CONFIG_SPL_SPI_BOOT) + puts("\nSPI Flash boot...\n"); #endif /* copy code to RAM and jump to it - this should not return */ @@ -94,5 +101,7 @@ void board_init_r(gd_t *gd, ulong dest_addr) #ifdef CONFIG_SPL_MMC_BOOT mmc_boot(); +#elif defined(CONFIG_SPL_SPI_BOOT) + spi_boot(); #endif } -- cgit v1.2.3