From 1f03cbfae221b24ba1341a0a3f62ff01c5c874df Mon Sep 17 00:00:00 2001 From: Peter Tyser Date: Tue, 23 Dec 2008 16:32:00 -0600 Subject: XPedite5200 board support cleanup Signed-off-by: Peter Tyser --- board/xes/common/actl_nand.c | 65 +++++++++++++++++++++++++++++++++++++++++ board/xes/common/fsl_85xx_pci.c | 6 ++-- 2 files changed, 68 insertions(+), 3 deletions(-) create mode 100644 board/xes/common/actl_nand.c (limited to 'board/xes/common') diff --git a/board/xes/common/actl_nand.c b/board/xes/common/actl_nand.c new file mode 100644 index 0000000000..465aeb0991 --- /dev/null +++ b/board/xes/common/actl_nand.c @@ -0,0 +1,65 @@ +/* + * Copyright 2008 Extreme Engineering Solutions, Inc. + * + * This driver support NAND devices which have address lines + * connected as ALE and CLE inputs. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +/* + * Hardware specific access to control-lines + */ +static void nand_addr_hwcontrol(struct mtd_info *mtd, int cmd, uint ctrl) +{ + struct nand_chip *this = mtd->priv; + ulong IO_ADDR_W; + + if (ctrl & NAND_CTRL_CHANGE) { + IO_ADDR_W = (ulong)this->IO_ADDR_W; + + IO_ADDR_W &= ~(CONFIG_SYS_NAND_ACTL_CLE | + CONFIG_SYS_NAND_ACTL_ALE | + CONFIG_SYS_NAND_ACTL_NCE); + if (ctrl & NAND_CLE) + IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_CLE; + if (ctrl & NAND_ALE) + IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_ALE; + if (ctrl & NAND_NCE) + IO_ADDR_W |= CONFIG_SYS_NAND_ACTL_NCE; + + this->IO_ADDR_W = (void *)IO_ADDR_W; + } + + if (cmd != NAND_CMD_NONE) + writeb(cmd, this->IO_ADDR_W); +} + +int board_nand_init(struct nand_chip *nand) +{ + nand->ecc.mode = NAND_ECC_SOFT; + nand->cmd_ctrl = nand_addr_hwcontrol; + nand->chip_delay = CONFIG_SYS_NAND_ACTL_DELAY; + + return 0; +} diff --git a/board/xes/common/fsl_85xx_pci.c b/board/xes/common/fsl_85xx_pci.c index 56f3447958..cd65a7341e 100644 --- a/board/xes/common/fsl_85xx_pci.c +++ b/board/xes/common/fsl_85xx_pci.c @@ -179,7 +179,7 @@ void pci_init_board(void) fsl_pci_init(hose); - first_free_busno = hose->last_busno+1; + first_free_busno = hose->last_busno + 1; printf(" PCI1 on bus %02x - %02x\n", hose->first_busno, hose->last_busno); } else { @@ -289,7 +289,7 @@ void pci_init_board(void) if (!host) fsl_pci_config_unlock(hose); - first_free_busno = hose->last_busno+1; + first_free_busno = hose->last_busno + 1; printf(" PCIE2 on bus %02x - %02x\n", hose->first_busno, hose->last_busno); } @@ -343,7 +343,7 @@ void pci_init_board(void) if (!host) fsl_pci_config_unlock(hose); - first_free_busno = hose->last_busno+1; + first_free_busno = hose->last_busno + 1; printf(" PCIE3 on bus %02x - %02x\n", hose->first_busno, hose->last_busno); } -- cgit v1.2.3