From e4d0d61275ac1b14375be8f62585398e05b19f3f Mon Sep 17 00:00:00 2001 From: Kever Yang Date: Tue, 2 Apr 2019 20:41:22 +0800 Subject: rockchip: rk322x: add CLK_EMMC_SAMPLE clock support Signed-off-by: Kever Yang --- drivers/clk/rockchip/clk_rk322x.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/clk/rockchip/clk_rk322x.c') diff --git a/drivers/clk/rockchip/clk_rk322x.c b/drivers/clk/rockchip/clk_rk322x.c index 48ed14b2af..4b599fbb24 100644 --- a/drivers/clk/rockchip/clk_rk322x.c +++ b/drivers/clk/rockchip/clk_rk322x.c @@ -217,6 +217,7 @@ static ulong rockchip_mmc_get_clk(struct rk322x_cru *cru, uint clk_general_rate, switch (periph) { case HCLK_EMMC: case SCLK_EMMC: + case SCLK_EMMC_SAMPLE: con = readl(&cru->cru_clksel_con[11]); mux = (con & EMMC_PLL_MASK) >> EMMC_PLL_SHIFT; con = readl(&cru->cru_clksel_con[12]); @@ -293,6 +294,7 @@ static ulong rockchip_mmc_set_clk(struct rk322x_cru *cru, uint clk_general_rate, switch (periph) { case HCLK_EMMC: case SCLK_EMMC: + case SCLK_EMMC_SAMPLE: rk_clrsetreg(&cru->cru_clksel_con[11], EMMC_PLL_MASK, mux << EMMC_PLL_SHIFT); -- cgit v1.2.3