From 6d5d0c955e2ca035481bc133d453fccd065b80e8 Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Wed, 18 Aug 2021 23:12:35 -0400 Subject: i2c: fsl_i2c: Migrate to Kconfig - As there are no boards that use different values for speed / slave on different buses, use a single option. - Switch to using the common SYS_I2C_SPEED / SYS_I2C_SLAVE options. - Introduce _HAS_ options for additional buses as only the first one is common to all users. - Convert all remaining symbols to Kconfig. Signed-off-by: Tom Rini --- drivers/i2c/Kconfig | 27 ++++++++++++++++++++++++++- drivers/i2c/fsl_i2c.c | 8 ++++---- 2 files changed, 30 insertions(+), 5 deletions(-) (limited to 'drivers/i2c') diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig index 158420c403..5d27f503bf 100644 --- a/drivers/i2c/Kconfig +++ b/drivers/i2c/Kconfig @@ -153,11 +153,36 @@ config SYS_I2C_IPROC config SYS_I2C_FSL bool "Freescale I2C bus driver" - depends on DM_I2C help Add support for Freescale I2C busses as used on MPC8240, MPC8245, and MPC85xx processors. +if SYS_I2C_FSL && (SYS_I2C_LEGACY || SPL_SYS_I2C_LEGACY) +config SYS_FSL_I2C_OFFSET + hex "Offset from the IMMR of the address of the first I2C controller" + +config SYS_FSL_HAS_I2C2_OFFSET + bool "Support a second I2C controller" + +config SYS_FSL_I2C2_OFFSET + hex "Offset from the IMMR of the address of the second I2C controller" + depends on SYS_FSL_HAS_I2C2_OFFSET + +config SYS_FSL_HAS_I2C3_OFFSET + bool "Support a third I2C controller" + +config SYS_FSL_I2C3_OFFSET + hex "Offset from the IMMR of the address of the third I2C controller" + depends on SYS_FSL_HAS_I2C3_OFFSET + +config SYS_FSL_HAS_I2C4_OFFSET + bool "Support a fourth I2C controller" + +config SYS_FSL_I2C4_OFFSET + hex "Offset from the IMMR of the address of the fourth I2C controller" + depends on SYS_FSL_HAS_I2C4_OFFSET +endif + config SYS_I2C_CADENCE tristate "Cadence I2C Controller" depends on DM_I2C diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c index 2200303ea8..eafd801cdc 100644 --- a/drivers/i2c/fsl_i2c.c +++ b/drivers/i2c/fsl_i2c.c @@ -538,24 +538,24 @@ static uint fsl_i2c_set_bus_speed(struct i2c_adapter *adap, uint speed) */ U_BOOT_I2C_ADAP_COMPLETE(fsl_0, fsl_i2c_init, fsl_i2c_probe_chip, fsl_i2c_read, fsl_i2c_write, fsl_i2c_set_bus_speed, - CONFIG_SYS_FSL_I2C_SPEED, CONFIG_SYS_FSL_I2C_SLAVE, + CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 0) #ifdef CONFIG_SYS_FSL_I2C2_OFFSET U_BOOT_I2C_ADAP_COMPLETE(fsl_1, fsl_i2c_init, fsl_i2c_probe_chip, fsl_i2c_read, fsl_i2c_write, fsl_i2c_set_bus_speed, - CONFIG_SYS_FSL_I2C2_SPEED, CONFIG_SYS_FSL_I2C2_SLAVE, + CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 1) #endif #ifdef CONFIG_SYS_FSL_I2C3_OFFSET U_BOOT_I2C_ADAP_COMPLETE(fsl_2, fsl_i2c_init, fsl_i2c_probe_chip, fsl_i2c_read, fsl_i2c_write, fsl_i2c_set_bus_speed, - CONFIG_SYS_FSL_I2C3_SPEED, CONFIG_SYS_FSL_I2C3_SLAVE, + CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 2) #endif #ifdef CONFIG_SYS_FSL_I2C4_OFFSET U_BOOT_I2C_ADAP_COMPLETE(fsl_3, fsl_i2c_init, fsl_i2c_probe_chip, fsl_i2c_read, fsl_i2c_write, fsl_i2c_set_bus_speed, - CONFIG_SYS_FSL_I2C4_SPEED, CONFIG_SYS_FSL_I2C4_SLAVE, + CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE, 3) #endif #else /* CONFIG_DM_I2C */ -- cgit v1.2.3