From 1af0334ab4effb0bd17c3b0cf1fc1b65ff4f3ef8 Mon Sep 17 00:00:00 2001
From: Pratyush Yadav
Date: Sat, 26 Jun 2021 00:47:10 +0530
Subject: mtd: spi-nor-core: Fix address width on flash chips > 16MB
If a flash chip has more than 16MB capacity but its BFPT reports
BFPT_DWORD1_ADDRESS_BYTES_3_OR_4, the spi-nor framework defaults to 3.
The check in spi_nor_scan() doesn't catch it because addr_width did get
set. This fixes that check.
Ported from Kernel commit 324f78dfb442b82365548b657ec4e6974c677502.
Signed-off-by: Pratyush Yadav
Reviewed-by: Jagan Teki
---
drivers/mtd/spi/spi-nor-core.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
(limited to 'drivers/mtd')
diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c
index 6af9c675a4..bfe7ea55c4 100644
--- a/drivers/mtd/spi/spi-nor-core.c
+++ b/drivers/mtd/spi/spi-nor-core.c
@@ -2603,7 +2603,11 @@ int spi_nor_scan(struct spi_nor *nor)
/* already configured from SFDP */
} else if (info->addr_width) {
nor->addr_width = info->addr_width;
- } else if (mtd->size > SZ_16M) {
+ } else {
+ nor->addr_width = 3;
+ }
+
+ if (nor->addr_width == 3 && mtd->size > SZ_16M) {
#ifndef CONFIG_SPI_FLASH_BAR
/* enable 4-byte addressing if the device exceeds 16MiB */
nor->addr_width = 4;
@@ -2617,8 +2621,6 @@ int spi_nor_scan(struct spi_nor *nor)
if (ret < 0)
return ret;
#endif
- } else {
- nor->addr_width = 3;
}
if (nor->addr_width > SPI_NOR_MAX_ADDR_WIDTH) {
--
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