From d3bfad266c49aa826ddb0106bbf763f1ce9af9c4 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 9 Sep 2020 17:50:14 +0200 Subject: pinctrl: stm32: Convert to use APIs which support live DT Use ofnode_ or dev_ APIs instead of fdt_ and fdtdec_ APIs so that the driver can support live DT. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- drivers/pinctrl/pinctrl_stm32.c | 43 ++++++++++++++++++++++------------------- 1 file changed, 23 insertions(+), 20 deletions(-) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index 71fa29a389..24ed83dd46 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -13,8 +13,6 @@ #include #include -DECLARE_GLOBAL_DATA_PTR; - #define MAX_PINS_ONE_IP 70 #define MODE_BITS_MASK 3 #define OSPEED_MASK 3 @@ -308,7 +306,8 @@ static int prep_gpio_dsc(struct stm32_gpio_dsc *gpio_dsc, u32 port_pin) return 0; } -static int prep_gpio_ctl(struct stm32_gpio_ctl *gpio_ctl, u32 gpio_fn, int node) +static int prep_gpio_ctl(struct stm32_gpio_ctl *gpio_ctl, u32 gpio_fn, + ofnode node) { gpio_fn &= 0x00FF; gpio_ctl->af = 0; @@ -329,16 +328,16 @@ static int prep_gpio_ctl(struct stm32_gpio_ctl *gpio_ctl, u32 gpio_fn, int node) break; } - gpio_ctl->speed = fdtdec_get_int(gd->fdt_blob, node, "slew-rate", 0); + gpio_ctl->speed = ofnode_read_u32_default(node, "slew-rate", 0); - if (fdtdec_get_bool(gd->fdt_blob, node, "drive-open-drain")) + if (ofnode_read_bool(node, "drive-open-drain")) gpio_ctl->otype = STM32_GPIO_OTYPE_OD; else gpio_ctl->otype = STM32_GPIO_OTYPE_PP; - if (fdtdec_get_bool(gd->fdt_blob, node, "bias-pull-up")) + if (ofnode_read_bool(node, "bias-pull-up")) gpio_ctl->pupd = STM32_GPIO_PUPD_UP; - else if (fdtdec_get_bool(gd->fdt_blob, node, "bias-pull-down")) + else if (ofnode_read_bool(node, "bias-pull-down")) gpio_ctl->pupd = STM32_GPIO_PUPD_DOWN; else gpio_ctl->pupd = STM32_GPIO_PUPD_NO; @@ -350,32 +349,37 @@ static int prep_gpio_ctl(struct stm32_gpio_ctl *gpio_ctl, u32 gpio_fn, int node) return 0; } -static int stm32_pinctrl_config(int offset) +static int stm32_pinctrl_config(ofnode node) { u32 pin_mux[MAX_PINS_ONE_IP]; int rv, len; + ofnode subnode; /* * check for "pinmux" property in each subnode (e.g. pins1 and pins2 for * usart1) of pin controller phandle "pinctrl-0" * */ - fdt_for_each_subnode(offset, gd->fdt_blob, offset) { + ofnode_for_each_subnode(subnode, node) { struct stm32_gpio_dsc gpio_dsc; struct stm32_gpio_ctl gpio_ctl; int i; - len = fdtdec_get_int_array_count(gd->fdt_blob, offset, - "pinmux", pin_mux, - ARRAY_SIZE(pin_mux)); + rv = ofnode_read_size(subnode, "pinmux"); + if (rv < 0) + return rv; + len = rv / sizeof(pin_mux[0]); debug("%s: no of pinmux entries= %d\n", __func__, len); - if (len < 0) + if (len > MAX_PINS_ONE_IP) return -EINVAL; + rv = ofnode_read_u32_array(subnode, "pinmux", pin_mux, len); + if (rv < 0) + return rv; for (i = 0; i < len; i++) { struct gpio_desc desc; debug("%s: pinmux = %x\n", __func__, *(pin_mux + i)); prep_gpio_dsc(&gpio_dsc, *(pin_mux + i)); - prep_gpio_ctl(&gpio_ctl, *(pin_mux + i), offset); + prep_gpio_ctl(&gpio_ctl, *(pin_mux + i), subnode); rv = uclass_get_device_by_seq(UCLASS_GPIO, gpio_dsc.port, &desc.dev); @@ -424,19 +428,18 @@ static int stm32_pinctrl_bind(struct udevice *dev) #if CONFIG_IS_ENABLED(PINCTRL_FULL) static int stm32_pinctrl_set_state(struct udevice *dev, struct udevice *config) { - return stm32_pinctrl_config(dev_of_offset(config)); + return stm32_pinctrl_config(dev_ofnode(config)); } #else /* PINCTRL_FULL */ static int stm32_pinctrl_set_state_simple(struct udevice *dev, struct udevice *periph) { - const void *fdt = gd->fdt_blob; const fdt32_t *list; uint32_t phandle; - int config_node; + ofnode config_node; int size, i, ret; - list = fdt_getprop(fdt, dev_of_offset(periph), "pinctrl-0", &size); + list = ofnode_get_property(dev_ofnode(periph), "pinctrl-0", &size); if (!list) return -EINVAL; @@ -446,8 +449,8 @@ static int stm32_pinctrl_set_state_simple(struct udevice *dev, for (i = 0; i < size; i++) { phandle = fdt32_to_cpu(*list++); - config_node = fdt_node_offset_by_phandle(fdt, phandle); - if (config_node < 0) { + config_node = ofnode_get_by_phandle(phandle); + if (!ofnode_valid(config_node)) { pr_err("prop pinctrl-0 index %d invalid phandle\n", i); return -EINVAL; } -- cgit v1.2.3 From 10bccd0dd3b91b27b752b48bbff6e725c8393467 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 9 Sep 2020 17:50:15 +0200 Subject: pinctrl: stm32: Add header with SPDX licence Cosmetics: Add header with SPDX licence Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- drivers/pinctrl/pinctrl_stm32.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'drivers/pinctrl') diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c index 24ed83dd46..dbea99532c 100644 --- a/drivers/pinctrl/pinctrl_stm32.c +++ b/drivers/pinctrl/pinctrl_stm32.c @@ -1,3 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Copyright (C) 2017-2020 STMicroelectronics - All Rights Reserved + */ + #include #include #include -- cgit v1.2.3