From ba0a3c16e0c6697f0254644cc7a9849b77000eb8 Mon Sep 17 00:00:00 2001 From: Toshifumi NISHINAGA Date: Fri, 8 Jul 2016 01:02:24 +0900 Subject: stm32: clk: Add 200MHz clock configuration for stm32f746 discovery board This patch adds 200MHz clock configuration for stm32f746 discovery board. This patch is based on STM32F4 and emcraft's[1]. [1]: https://github.com/EmcraftSystems/u-boot Signed-off-by: Toshifumi NISHINAGA --- drivers/serial/serial_stm32x7.c | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) (limited to 'drivers/serial') diff --git a/drivers/serial/serial_stm32x7.c b/drivers/serial/serial_stm32x7.c index cfbfab7e41..592c0bde36 100644 --- a/drivers/serial/serial_stm32x7.c +++ b/drivers/serial/serial_stm32x7.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include "serial_stm32x7.h" @@ -18,7 +19,20 @@ static int stm32_serial_setbrg(struct udevice *dev, int baudrate) { struct stm32x7_serial_platdata *plat = dev->platdata; struct stm32_usart *const usart = plat->base; - writel(plat->clock/baudrate, &usart->brr); + u32 clock, int_div, frac_div, tmp; + + if (((u32)usart & STM32_BUS_MASK) == APB1_PERIPH_BASE) + clock = clock_get(CLOCK_APB1); + else if (((u32)usart & STM32_BUS_MASK) == APB2_PERIPH_BASE) + clock = clock_get(CLOCK_APB2); + else + return -EINVAL; + + int_div = (25 * clock) / (4 * baudrate); + tmp = ((int_div / 100) << USART_BRR_M_SHIFT) & USART_BRR_M_MASK; + frac_div = int_div - (100 * (tmp >> USART_BRR_M_SHIFT)); + tmp |= (((frac_div * 16) + 50) / 100) & USART_BRR_F_MASK; + writel(tmp, &usart->brr); return 0; } -- cgit v1.2.3