From 29795302b942e6ee41c9d95f7e6e29f57d108d42 Mon Sep 17 00:00:00 2001 From: Pali Rohár Date: Sat, 31 Jul 2021 14:22:52 +0200 Subject: arm: mvebu: a38x: Detect CONFIG_SYS_TCLK from SAR register MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Bit 15 in SAR register specifies if TCLK is running at 200 MHz or 250 MHz. Use this information instead of manual configuration in every board file. Signed-off-by: Pali Rohár Reviewed-by: Stefan Roese --- include/configs/helios4.h | 1 - 1 file changed, 1 deletion(-) (limited to 'include/configs/helios4.h') diff --git a/include/configs/helios4.h b/include/configs/helios4.h index 1368080f03..b5814ed55c 100644 --- a/include/configs/helios4.h +++ b/include/configs/helios4.h @@ -17,7 +17,6 @@ * for DDR ECC byte filling in the SPL before loading the main * U-Boot into it. */ -#define CONFIG_SYS_TCLK 250000000 /* 250MHz */ /* USB/EHCI configuration */ #define CONFIG_EHCI_IS_TDI -- cgit v1.2.3