From 798baf7ca35f81eab27dc49289745b19bde3cd39 Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Tue, 9 Apr 2019 21:02:03 +0200 Subject: arm: socfpga: fix comment about SPL memory layout The comment about SPL memory layout for socfpga gen5 is outdated: the initial malloc memory is now at the end of the SRAM, gd is below it (see board_init_f_alloc_reserve). Signed-off-by: Simon Goldschmidt Acked-by: Marek Vasut --- include/configs/socfpga_common.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'include/configs') diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index f9e2cdc1b3..32ee7426b6 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -236,9 +236,9 @@ unsigned int cm_get_qspi_controller_clk_hz(void); * * 0xFFFF_0000 ...... Start of SRAM * 0xFFFF_xxxx ...... Top of stack (grows down) - * 0xFFFF_yyyy ...... Malloc area - * 0xFFFF_zzzz ...... Global Data - * 0xFFFF_FF00 ...... End of SRAM + * 0xFFFF_yyyy ...... Global Data + * 0xFFFF_zzzz ...... Malloc area + * 0xFFFF_FFFF ...... End of SRAM * * SRAM Memory layout for Arria 10: * 0xFFE0_0000 ...... Start of SRAM (bottom) -- cgit v1.2.3 From 4399e48deb55a5786515e089fe9f0aa6e0ce5d6a Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Tue, 9 Apr 2019 21:02:04 +0200 Subject: arm: socfpga: put initial U-Boot stack into DDR If SPL post-reloc stage puts the stack into DDR, U-Boot should be able to do that, too. The reason to do so is that this way, U-Boot initial stack can be larger than SPL initial stack. In situations where we want to save the SPL in SRAM for next boot without reloading, this prevents overwriting the SPL DTB in SRAM if U-Boot stack usage gets too high. To achieve this, the malloc definition for a10 is moved up and sligthly changed to ensure CONFIG_SYS_INIT_RAM_SIZE is the remaining available size. Signed-off-by: Simon Goldschmidt Acked-by: Marek Vasut --- include/configs/socfpga_common.h | 42 +++++++++++++++++++--------------------- 1 file changed, 20 insertions(+), 22 deletions(-) (limited to 'include/configs') diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 32ee7426b6..a501b5209f 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -26,7 +26,13 @@ #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) #define CONFIG_SYS_INIT_RAM_ADDR 0xFFE00000 -#define CONFIG_SYS_INIT_RAM_SIZE 0x40000 /* 256KB */ +/* SPL memory allocation configuration, this is for FAT implementation */ +#ifndef CONFIG_SYS_SPL_MALLOC_SIZE +#define CONFIG_SYS_SPL_MALLOC_SIZE 0x10000 +#endif +#define CONFIG_SYS_INIT_RAM_SIZE (0x40000 - CONFIG_SYS_SPL_MALLOC_SIZE) +#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_ADDR + \ + CONFIG_SYS_INIT_RAM_SIZE) #endif /* @@ -38,12 +44,23 @@ #if ((CONFIG_SYS_BOOTCOUNT_ADDR > CONFIG_SYS_INIT_RAM_ADDR) && \ (CONFIG_SYS_BOOTCOUNT_ADDR < (CONFIG_SYS_INIT_RAM_ADDR + \ CONFIG_SYS_INIT_RAM_SIZE))) -#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SYS_BOOTCOUNT_ADDR +#define CONFIG_SPL_STACK CONFIG_SYS_BOOTCOUNT_ADDR #else -#define CONFIG_SYS_INIT_SP_ADDR \ +#define CONFIG_SPL_STACK \ (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_RAM_SIZE) #endif +/* + * U-Boot stack setup: if SPL post-reloc uses DDR stack, use it in pre-reloc + * phase of U-Boot, too. This prevents overwriting SPL data if stack/heap usage + * in U-Boot pre-reloc is higher than in SPL. + */ +#if defined(CONFIG_SPL_STACK_R_ADDR) && CONFIG_SPL_STACK_R_ADDR +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK_R_ADDR +#else +#define CONFIG_SYS_INIT_SP_ADDR CONFIG_SPL_STACK +#endif + #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 /* @@ -252,16 +269,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_SPL_MAX_SIZE CONFIG_SYS_INIT_RAM_SIZE #endif -#if defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -/* SPL memory allocation configuration, this is for FAT implementation */ -#ifndef CONFIG_SYS_SPL_MALLOC_START -#define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000 -#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SYS_INIT_RAM_SIZE - \ - CONFIG_SYS_SPL_MALLOC_SIZE + \ - CONFIG_SYS_INIT_RAM_ADDR) -#endif -#endif - /* SPL SDMMC boot support */ #ifdef CONFIG_SPL_MMC_SUPPORT #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4) @@ -292,15 +299,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #endif #endif -/* - * Stack setup - */ -#if defined(CONFIG_TARGET_SOCFPGA_GEN5) -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10) -#define CONFIG_SPL_STACK CONFIG_SYS_SPL_MALLOC_START -#endif - /* Extra Environment */ #ifndef CONFIG_SPL_BUILD -- cgit v1.2.3 From 0b7eb4337d47c0d1029a412b50e5dc0c11f3474c Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Thu, 28 Mar 2019 22:09:35 +0100 Subject: arm: socfpga: move vining_fpga to DM_I2C All socfpga boards except for vining_fpga use DM_I2C. Enable DM_I2C for this board and set the EEPROM defines via Kconfig (enabling CONFIG_I2C_EEPROM from MISC). Signed-off-by: Simon Goldschmidt Series-changes: 2 - added (this) patch to move socfpga_vining to DM_I2C --- board/samtec/vining_fpga/socfpga.c | 9 +-------- configs/socfpga_vining_fpga_defconfig | 8 +++++++- include/configs/socfpga_common.h | 26 -------------------------- include/configs/socfpga_vining_fpga.h | 9 --------- 4 files changed, 8 insertions(+), 44 deletions(-) (limited to 'include/configs') diff --git a/board/samtec/vining_fpga/socfpga.c b/board/samtec/vining_fpga/socfpga.c index d99aac6828..efc8ddf162 100644 --- a/board/samtec/vining_fpga/socfpga.c +++ b/board/samtec/vining_fpga/socfpga.c @@ -52,14 +52,7 @@ int misc_init_r(void) u32 serial; int ret; - /* EEPROM is at bus 0. */ - ret = i2c_set_bus_num(0); - if (ret) { - puts("Cannot select EEPROM I2C bus.\n"); - return 0; - } - - /* EEPROM is at address 0x50. */ + /* EEPROM is at address 0x50 (at bus CONFIG_SYS_EEPROM_BUS_NUM). */ ret = eeprom_read(0x50, 0, data, sizeof(data)); if (ret) { puts("Cannot read I2C EEPROM.\n"); diff --git a/configs/socfpga_vining_fpga_defconfig b/configs/socfpga_vining_fpga_defconfig index 7b47b111b7..4a7f775337 100644 --- a/configs/socfpga_vining_fpga_defconfig +++ b/configs/socfpga_vining_fpga_defconfig @@ -16,8 +16,8 @@ CONFIG_VERSION_VARIABLE=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_SPI_LOAD=y CONFIG_CMD_ASKENV=y -CONFIG_CMD_GREPENV=y CONFIG_CMD_EEPROM=y +CONFIG_CMD_GREPENV=y CONFIG_CMD_DFU=y # CONFIG_CMD_FLASH is not set CONFIG_CMD_GPIO=y @@ -44,6 +44,7 @@ CONFIG_DFU_RAM=y CONFIG_DFU_SF=y CONFIG_DM_GPIO=y CONFIG_DWAPB_GPIO=y +CONFIG_DM_I2C=y CONFIG_LED_STATUS=y CONFIG_LED_STATUS_GPIO=y CONFIG_LED_STATUS0=y @@ -55,6 +56,11 @@ CONFIG_LED_STATUS_BIT2=54 CONFIG_LED_STATUS3=y CONFIG_LED_STATUS_BIT3=65 CONFIG_LED_STATUS_CMD=y +CONFIG_MISC=y +CONFIG_I2C_EEPROM=y +CONFIG_SYS_I2C_EEPROM_ADDR=0x50 +CONFIG_SYS_EEPROM_PAGE_WRITE_BITS=3 +CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=70 CONFIG_DM_MMC=y CONFIG_MMC_DW=y CONFIG_MTD_DEVICE=y diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index a501b5209f..a65fc804e3 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -149,32 +149,6 @@ #define CONFIG_SYS_NAND_DATA_BASE SOCFPGA_NANDDATA_ADDRESS #endif -/* - * I2C support - */ -#ifndef CONFIG_DM_I2C -#define CONFIG_SYS_I2C -#define CONFIG_SYS_I2C_BASE SOCFPGA_I2C0_ADDRESS -#define CONFIG_SYS_I2C_BASE1 SOCFPGA_I2C1_ADDRESS -#define CONFIG_SYS_I2C_BASE2 SOCFPGA_I2C2_ADDRESS -#define CONFIG_SYS_I2C_BASE3 SOCFPGA_I2C3_ADDRESS -/* Using standard mode which the speed up to 100Kb/s */ -#define CONFIG_SYS_I2C_SPEED 100000 -#define CONFIG_SYS_I2C_SPEED1 100000 -#define CONFIG_SYS_I2C_SPEED2 100000 -#define CONFIG_SYS_I2C_SPEED3 100000 -/* Address of device when used as slave */ -#define CONFIG_SYS_I2C_SLAVE 0x02 -#define CONFIG_SYS_I2C_SLAVE1 0x02 -#define CONFIG_SYS_I2C_SLAVE2 0x02 -#define CONFIG_SYS_I2C_SLAVE3 0x02 -#ifndef __ASSEMBLY__ -/* Clock supplied to I2C controller in unit of MHz */ -unsigned int cm_get_l4_sp_clk_hz(void); -#define IC_CLK (cm_get_l4_sp_clk_hz() / 1000000) -#endif -#endif /* CONFIG_DM_I2C */ - /* * QSPI support */ diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index 5517ed722d..0e547a1295 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -16,15 +16,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* I2C EEPROM */ -#ifdef CONFIG_CMD_EEPROM -#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 -#define CONFIG_SYS_I2C_EEPROM_BUS 0 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3 -#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 70 -#endif - /* * Status LEDs: * 0 ... Top Green -- cgit v1.2.3 From 71f574df9ade8cf5d55d9e4c92b6d872b66a7b33 Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Wed, 9 Jan 2019 20:47:52 +0100 Subject: arm: socfpga: clean up socfpga_common.h Remove outdated macros and comments (not used any more, outdated due to DM conversion) from socfpga_common.h. Signed-off-by: Simon Goldschmidt Series-changes: 3 - changed commit message: s/defines/macros and comments/ Series-changes: 2 - remove even more outdated things --- include/configs/socfpga_common.h | 40 ---------------------------------------- 1 file changed, 40 deletions(-) (limited to 'include/configs') diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index a65fc804e3..5b5e5f5d43 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -72,29 +72,12 @@ #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot argument buffer size */ -#ifndef CONFIG_SYS_HOSTNAME -#define CONFIG_SYS_HOSTNAME CONFIG_SYS_BOARD -#endif - /* * Cache */ #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE SOCFPGA_MPUL2_ADDRESS -/* - * EPCS/EPCQx1 Serial Flash Controller - */ -#ifdef CONFIG_ALTERA_SPI -/* - * The base address is configurable in QSys, each board must specify the - * base address based on it's particular FPGA configuration. Please note - * that the address here is incremented by 0x400 from the Base address - * selected in QSys, since the SPI registers are at offset +0x400. - * #define CONFIG_SYS_SPI_BASE 0xff240400 - */ -#endif - /* * Ethernet on SoC (EMAC) */ @@ -162,15 +145,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_CQSPI_REF_CLK cm_get_qspi_controller_clk_hz() #endif -/* - * Designware SPI support - */ - -/* - * Serial Driver - */ -#define CONFIG_SYS_NS16550_SERIAL - /* * USB */ @@ -206,20 +180,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void); #define CONFIG_ENV_SECT_SIZE (64 * 1024) #endif -/* - * mtd partitioning for serial NOR flash - * - * device nor0 , # parts = 6 - * #: name size offset mask_flags - * 0: u-boot 0x00100000 0x00000000 0 - * 1: env1 0x00040000 0x00100000 0 - * 2: env2 0x00040000 0x00140000 0 - * 3: UBI 0x03e80000 0x00180000 0 - * 4: boot 0x00e80000 0x00180000 0 - * 5: rootfs 0x01000000 0x01000000 0 - * - */ - /* * SPL * -- cgit v1.2.3 From faea9e7a78d78b178a26198ab8459f6daf423792 Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Wed, 9 Jan 2019 20:49:09 +0100 Subject: arm: socfpga: remove CONFIG_SYS_BOOTMAPSZ socfpga_common.h defines CONFIG_SYS_BOOTMAPSZ to 64 MiB. Since having this define overrides the 'bootm_size' env variable for the whole socfpga platform, let's remove this define from socfpga_common.h and instead rely on the 'bootm_size' env variable (which is initialized to 160 MiB in the same file's default env). This gives users the chance to override it in their own environment. Signed-off-by: Simon Goldschmidt Acked-by: Marek Vasut Series-to: Marek Vasut Series-to: u-boot@lists.denx.de Cover-letter: arm: socfpga: clean up socfpga_common.h This series cleans up the include/configs/socfpga_common.h file a bit. It removes some defines that are used nowhere and cleans up some leftovers after various subsystems have been converted to use DM. END --- include/configs/socfpga_common.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'include/configs') diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 5b5e5f5d43..5eccb01d1d 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -10,8 +10,6 @@ */ #define CONFIG_CLOCKS -#define CONFIG_SYS_BOOTMAPSZ (64 * 1024 * 1024) - #define CONFIG_TIMESTAMP /* Print image info with timestamp */ /* -- cgit v1.2.3 From 4aab2329b282956b3a8a22de7bd30116d1c8df20 Mon Sep 17 00:00:00 2001 From: Simon Goldschmidt Date: Tue, 2 Apr 2019 21:29:41 +0200 Subject: arm: socfpga: clean up board config files Remove outdated defines (not used any more, outdated due to DM conversion) from various socfpga files in include/config. Signed-off-by: Simon Goldschmidt Acked-by: Marek Vasut Series-version: 3 Series-changes: 2 - added (this) patch with further cleanups to the socfpga board config files --- include/configs/socfpga_arria10_socdk.h | 6 ------ include/configs/socfpga_arria5_socdk.h | 2 -- include/configs/socfpga_cyclone5_socdk.h | 2 -- include/configs/socfpga_de0_nano_soc.h | 2 -- include/configs/socfpga_de10_nano.h | 2 -- include/configs/socfpga_de1_soc.h | 2 -- include/configs/socfpga_is1.h | 2 -- include/configs/socfpga_sockit.h | 2 -- include/configs/socfpga_socrates.h | 2 -- include/configs/socfpga_sr1500.h | 11 ----------- include/configs/socfpga_vining_fpga.h | 9 --------- 11 files changed, 42 deletions(-) (limited to 'include/configs') diff --git a/include/configs/socfpga_arria10_socdk.h b/include/configs/socfpga_arria10_socdk.h index 0f116fbf2d..92630c5e6e 100644 --- a/include/configs/socfpga_arria10_socdk.h +++ b/include/configs/socfpga_arria10_socdk.h @@ -19,12 +19,6 @@ /* Memory configurations */ #define PHYS_SDRAM_1_SIZE 0x40000000 -/* Ethernet on SoC (EMAC) */ - -/* - * U-Boot environment configurations - */ - /* * Serial / UART configurations */ diff --git a/include/configs/socfpga_arria5_socdk.h b/include/configs/socfpga_arria5_socdk.h index 24fcdd8b5a..af6137aeb1 100644 --- a/include/configs/socfpga_arria5_socdk.h +++ b/include/configs/socfpga_arria5_socdk.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include diff --git a/include/configs/socfpga_cyclone5_socdk.h b/include/configs/socfpga_cyclone5_socdk.h index 18da8496ef..028db2a09e 100644 --- a/include/configs/socfpga_cyclone5_socdk.h +++ b/include/configs/socfpga_cyclone5_socdk.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include diff --git a/include/configs/socfpga_de0_nano_soc.h b/include/configs/socfpga_de0_nano_soc.h index d3224d5bd3..21108e3447 100644 --- a/include/configs/socfpga_de0_nano_soc.h +++ b/include/configs/socfpga_de0_nano_soc.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include diff --git a/include/configs/socfpga_de10_nano.h b/include/configs/socfpga_de10_nano.h index 2fcabff8af..d85f98fbd4 100644 --- a/include/configs/socfpga_de10_nano.h +++ b/include/configs/socfpga_de10_nano.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include diff --git a/include/configs/socfpga_de1_soc.h b/include/configs/socfpga_de1_soc.h index f37099c58f..9919d292dc 100644 --- a/include/configs/socfpga_de1_soc.h +++ b/include/configs/socfpga_de1_soc.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h index c233c208a5..c4da5947f3 100644 --- a/include/configs/socfpga_is1.h +++ b/include/configs/socfpga_is1.h @@ -19,8 +19,6 @@ /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) #define CONFIG_ARP_TIMEOUT 500UL - -/* PHY */ #endif /* The rest of the configuration is shared */ diff --git a/include/configs/socfpga_sockit.h b/include/configs/socfpga_sockit.h index 3a7f354914..972999949a 100644 --- a/include/configs/socfpga_sockit.h +++ b/include/configs/socfpga_sockit.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include diff --git a/include/configs/socfpga_socrates.h b/include/configs/socfpga_socrates.h index f0d9347891..7faea150a9 100644 --- a/include/configs/socfpga_socrates.h +++ b/include/configs/socfpga_socrates.h @@ -14,8 +14,6 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* Ethernet on SoC (EMAC) */ - /* The rest of the configuration is shared */ #include diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h index b6a98611c0..3a8ccc3021 100644 --- a/include/configs/socfpga_sr1500.h +++ b/include/configs/socfpga_sr1500.h @@ -19,8 +19,6 @@ /* The PHY is autodetected, so no MII PHY address is needed here */ #define PHY_ANEG_TIMEOUT 8000 -/* Environment */ - /* Enable SPI NOR flash reset, needed for SPI booting */ #define CONFIG_SPI_N25Q256A_RESET @@ -36,15 +34,6 @@ #define CONFIG_ENV_OFFSET 0x000e0000 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SECT_SIZE) -/* - * The QSPI NOR flash layout on SR1500: - * - * 0000.0000 - 0003.ffff: SPL (4 times) - * 0004.0000 - 000d.ffff: U-Boot - * 000e.0000 - 000e.ffff: env1 - * 000f.0000 - 000f.ffff: env2 - */ - /* The rest of the configuration is shared */ #include diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h index 0e547a1295..29a92b9146 100644 --- a/include/configs/socfpga_vining_fpga.h +++ b/include/configs/socfpga_vining_fpga.h @@ -16,18 +16,9 @@ #define CONFIG_LOADADDR 0x01000000 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR -/* - * Status LEDs: - * 0 ... Top Green - * 1 ... Top Red - * 2 ... Bottom Green - * 3 ... Bottom Red - */ - /* Ethernet on SoC (EMAC) */ #if defined(CONFIG_CMD_NET) #define CONFIG_BOOTP_SEND_HOSTNAME -/* PHY */ #endif /* Extra Environment */ -- cgit v1.2.3