From d248627f9d4218688e7430bc714405a23885abfa Mon Sep 17 00:00:00 2001
From: Bin Meng <bmeng.cn@gmail.com>
Date: Sat, 7 Aug 2021 13:00:02 +0800
Subject: riscv: qemu: Enable MTD NOR flash support

Enable support to the 2 NOR flashes on the QEMU RISC-V virt machine.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
---
 include/configs/qemu-riscv.h | 2 ++
 1 file changed, 2 insertions(+)

(limited to 'include/configs')

diff --git a/include/configs/qemu-riscv.h b/include/configs/qemu-riscv.h
index 5291de83f8..bbeea96e27 100644
--- a/include/configs/qemu-riscv.h
+++ b/include/configs/qemu-riscv.h
@@ -29,6 +29,8 @@
 
 #define CONFIG_STANDALONE_LOAD_ADDR	0x80200000
 
+#define CONFIG_SYS_MAX_FLASH_BANKS	2
+
 #define RISCV_MMODE_TIMERBASE		0x2000000
 #define RISCV_MMODE_TIMER_FREQ		1000000
 
-- 
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