From 7171d9929640fad7d0176f6fbb16263e2d8d1559 Mon Sep 17 00:00:00 2001 From: Patrick Delaunay Date: Wed, 1 Jun 2022 18:33:40 +0200 Subject: stm32mp: stpmic1: remove the debug unit request by debugger Depending on backup register value, U-Boot SPL maintains the debug unit powered-on for debugging purpose; only BUCK1 is required for powering the debug unit, so revert the setting for all the other power lanes, except BUCK3 that has to be always on. To be functional this patch requires a modification in the debugger ,openocd for example, to update the STM32MP15 backup register when it is required to debug SPL after reset. After deeper analysis this behavior will be never supported in tools so the associated code, will be never used and the associated code can be removed. Signed-off-by: Patrick Delaunay Reviewed-by: Patrice Chotard --- include/power/stpmic1.h | 3 --- 1 file changed, 3 deletions(-) (limited to 'include/power') diff --git a/include/power/stpmic1.h b/include/power/stpmic1.h index d3567df326..201b1df762 100644 --- a/include/power/stpmic1.h +++ b/include/power/stpmic1.h @@ -23,12 +23,9 @@ /* BUCKS_MRST_CR */ #define STPMIC1_MRST_BUCK(buck) BIT(buck) -#define STPMIC1_MRST_BUCK_DEBUG (STPMIC1_MRST_BUCK(STPMIC1_BUCK1) | \ - STPMIC1_MRST_BUCK(STPMIC1_BUCK3)) /* LDOS_MRST_CR */ #define STPMIC1_MRST_LDO(ldo) BIT(ldo) -#define STPMIC1_MRST_LDO_DEBUG 0 /* BUCKx_MAIN_CR (x=1...4) */ #define STPMIC1_BUCK_ENA BIT(0) -- cgit v1.2.3 From 24ec3dea4bf07e8928e82d509ce5bc742fdbde9b Mon Sep 17 00:00:00 2001 From: Tom Rini Date: Fri, 10 Jun 2022 22:59:33 -0400 Subject: arm: samsung: Migrate a number of symbols to Kconfig - In a number of cases, use CONFIG_ARCH_EXYNOS[45] rather than CONFIG_EXYNOS[45] - In other cases, test for CONFIG_ARCH_EXYNOS or CONFIG_ARCH_S5PC1XX - Migrate specific SoC CONFIG values to Kconfig - Use CONFIG_TARGET_x rather than CONFIG_x - Migrate other CONFIG_EXYNOS_x symbols to Kconfig - Reference CONFIG_EXYNOS_RELOCATE_CODE_BASE directly as EXYNOS_RELOCATE_CODE_BASE - Rename CONFIG_S5P_PA_SYSRAM to CONFIG_SMP_PEN_ADDR to match the rest of U-Boot usage. Cc: Minkyu Kang Signed-off-by: Tom Rini --- arch/arm/Kconfig | 3 +++ arch/arm/dts/Makefile | 8 +++---- arch/arm/include/asm/spl.h | 5 ++--- arch/arm/mach-exynos/Kconfig | 39 +++++++++++++++++++++++++++++++++ arch/arm/mach-exynos/Makefile | 4 ++-- arch/arm/mach-exynos/dmc_init_exynos4.c | 2 +- arch/arm/mach-exynos/exynos4_setup.h | 4 ++-- arch/arm/mach-exynos/lowlevel_init.c | 8 +++++-- arch/arm/mach-exynos/sec_boot.S | 2 +- board/samsung/arndale/arndale.c | 4 ++-- configs/odroid-xu3_defconfig | 1 + configs/odroid_defconfig | 1 + configs/trats2_defconfig | 1 + configs/trats_defconfig | 1 + drivers/i2c/exynos_hs_i2c.c | 2 +- drivers/i2c/s3c24x0_i2c.c | 4 ++-- include/configs/arndale.h | 6 +---- include/configs/espresso7420.h | 2 -- include/configs/exynos-common.h | 4 ---- include/configs/exynos4-common.h | 2 -- include/configs/exynos5-common.h | 10 --------- include/configs/exynos5-dt-common.h | 2 -- include/configs/exynos5250-common.h | 2 -- include/configs/exynos5420-common.h | 7 ------ include/configs/exynos7420-common.h | 4 ---- include/configs/exynos78x0-common.h | 4 ---- include/configs/odroid.h | 3 --- include/configs/odroid_xu3.h | 3 --- include/configs/origen.h | 4 ---- include/configs/s5p_goni.h | 5 ----- include/configs/smdkc100.h | 8 ------- include/configs/smdkv310.h | 2 -- include/configs/trats.h | 5 ----- include/configs/trats2.h | 3 --- include/power/fg_battery_cell_params.h | 2 +- scripts/Makefile.spl | 6 ++--- 36 files changed, 74 insertions(+), 99 deletions(-) (limited to 'include/power') diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index e682d65e51..ddef3d03ab 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -609,6 +609,9 @@ config ARM64_SUPPORT_AARCH32 help This ARM64 system supports AArch32 execution state. +config S5P + def_bool y if ARCH_EXYNOS || ARCH_S5PC1XX + choice prompt "Target select" default TARGET_HIKEY diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index a9f4cccf8d..87b210dbb0 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -5,9 +5,9 @@ dtb-$(CONFIG_TARGET_TAURUS) += at91sam9g20-taurus.dtb dtb-$(CONFIG_TARGET_CORVUS) += at91sam9g45-corvus.dtb dtb-$(CONFIG_TARGET_GURNARD) += at91sam9g45-gurnard.dtb -dtb-$(CONFIG_S5PC100) += s5pc1xx-smdkc100.dtb -dtb-$(CONFIG_S5PC110) += s5pc1xx-goni.dtb -dtb-$(CONFIG_EXYNOS4) += exynos4210-origen.dtb \ +dtb-$(CONFIG_TARGET_SMDKC100) += s5pc1xx-smdkc100.dtb +dtb-$(CONFIG_TARGET_S5P_GONI) += s5pc1xx-goni.dtb +dtb-$(CONFIG_ARCH_EXYNOS4) += exynos4210-origen.dtb \ exynos4210-smdkv310.dtb \ exynos4210-universal_c210.dtb \ exynos4210-trats.dtb \ @@ -19,7 +19,7 @@ dtb-$(CONFIG_TARGET_HIKEY960) += hi3660-hikey960.dtb dtb-$(CONFIG_TARGET_POPLAR) += hi3798cv200-poplar.dtb -dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ +dtb-$(CONFIG_ARCH_EXYNOS5) += exynos5250-arndale.dtb \ exynos5250-snow.dtb \ exynos5250-spring.dtb \ exynos5250-smdk5250.dtb \ diff --git a/arch/arm/include/asm/spl.h b/arch/arm/include/asm/spl.h index b5790bd0bc..0ece4b0906 100644 --- a/arch/arm/include/asm/spl.h +++ b/arch/arm/include/asm/spl.h @@ -6,9 +6,8 @@ #ifndef _ASM_SPL_H_ #define _ASM_SPL_H_ -#if defined(CONFIG_ARCH_OMAP2PLUS) \ - || defined(CONFIG_EXYNOS4) || defined(CONFIG_EXYNOS5) \ - || defined(CONFIG_EXYNOS4210) || defined(CONFIG_ARCH_K3) +#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5) || \ + defined(CONFIG_ARCH_K3) || defined(CONFIG_ARCH_OMAP2PLUS) /* Platform-specific defines */ #include diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 77fb9d1775..8410290856 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -54,11 +54,15 @@ endchoice if ARCH_EXYNOS4 +config EXYNOS4210 + bool + choice prompt "EXYNOS4 board select" config TARGET_SMDKV310 bool "Exynos4210 SMDKV310 board" + select EXYNOS4210 select OF_CONTROL select SUPPORT_SPL @@ -70,6 +74,7 @@ config TARGET_S5PC210_UNIVERSAL config TARGET_ORIGEN bool "Exynos4412 Origen board" + select EXYNOS4210 select SUPPORT_SPL config TARGET_TRATS2 @@ -83,6 +88,15 @@ endif if ARCH_EXYNOS5 +config EXYNOS5250 + bool + +config EXYNOS5420 + bool + +config EXYNOS5_DT + bool + config SPL_GPIO default y @@ -97,6 +111,8 @@ choice config TARGET_ODROID_XU3 bool "Exynos5422 Odroid board" + select EXYNOS5_DT + select EXYNOS5420 select OF_CONTROL config TARGET_ARNDALE @@ -105,36 +121,49 @@ config TARGET_ARNDALE select ARM_ERRATA_774769 select CPU_V7_HAS_NONSEC select CPU_V7_HAS_VIRT + select EXYNOS5250 select OF_CONTROL select SUPPORT_SPL config TARGET_SMDK5250 bool "SMDK5250 board" + select EXYNOS5_DT + select EXYNOS5250 select OF_CONTROL select SUPPORT_SPL config TARGET_SNOW bool "Snow board" + select EXYNOS5_DT + select EXYNOS5250 select OF_CONTROL select SUPPORT_SPL config TARGET_SPRING bool "Spring board" + select EXYNOS5_DT + select EXYNOS5250 select OF_CONTROL select SUPPORT_SPL config TARGET_SMDK5420 bool "SMDK5420 board" + select EXYNOS5_DT + select EXYNOS5420 select OF_CONTROL select SUPPORT_SPL config TARGET_PEACH_PI bool "Peach Pi board" + select EXYNOS5_DT + select EXYNOS5420 select OF_CONTROL select SUPPORT_SPL config TARGET_PEACH_PIT bool "Peach Pit board" + select EXYNOS5_DT + select EXYNOS5420 select OF_CONTROL select SUPPORT_SPL @@ -189,6 +218,16 @@ endif config SYS_SOC default "exynos" +config EXYNOS_ACE_SHA + bool "Advanced Crypto Engine SHA support" + depends on (ARCH_EXYNOS4 || ARCH_EXYNOS5) && (LIB_HW_RAND || SHA_HW_ACCEL) + default y if ARCH_EXYNOS5 + +config EXYNOS_TMU + bool "Exynos5 thermal management unit support" + depends on ARCH_EXYNOS5 + default y + source "board/samsung/smdkv310/Kconfig" source "board/samsung/trats/Kconfig" source "board/samsung/universal_c210/Kconfig" diff --git a/arch/arm/mach-exynos/Makefile b/arch/arm/mach-exynos/Makefile index e895c13157..dd097cf541 100644 --- a/arch/arm/mach-exynos/Makefile +++ b/arch/arm/mach-exynos/Makefile @@ -10,8 +10,8 @@ obj-$(CONFIG_ARM64) += mmu-arm64.o obj-$(CONFIG_EXYNOS5420) += sec_boot.o ifdef CONFIG_SPL_BUILD -obj-$(CONFIG_EXYNOS5) += clock_init_exynos5.o -obj-$(CONFIG_EXYNOS5) += dmc_common.o dmc_init_ddr3.o +obj-$(CONFIG_ARCH_EXYNOS5) += clock_init_exynos5.o +obj-$(CONFIG_ARCH_EXYNOS5) += dmc_common.o dmc_init_ddr3.o obj-$(CONFIG_EXYNOS4210)+= dmc_init_exynos4.o clock_init_exynos4.o obj-y += spl_boot.o tzpc.o obj-y += lowlevel_init.o diff --git a/arch/arm/mach-exynos/dmc_init_exynos4.c b/arch/arm/mach-exynos/dmc_init_exynos4.c index ecddc72684..58a3c82f68 100644 --- a/arch/arm/mach-exynos/dmc_init_exynos4.c +++ b/arch/arm/mach-exynos/dmc_init_exynos4.c @@ -175,7 +175,7 @@ void mem_ctrl_init(int reset) * 0: full_sync */ writel(1, ASYNC_CONFIG); -#ifdef CONFIG_ORIGEN +#ifdef CONFIG_TARGET_ORIGEN /* Interleave: 2Bit, Interleave_bit1: 0x15, Interleave_bit0: 0x7 */ writel(APB_SFR_INTERLEAVE_CONF_VAL, EXYNOS4_MIU_BASE + APB_SFR_INTERLEAVE_CONF_OFFSET); diff --git a/arch/arm/mach-exynos/exynos4_setup.h b/arch/arm/mach-exynos/exynos4_setup.h index a08d64a8e2..fbb45eb897 100644 --- a/arch/arm/mach-exynos/exynos4_setup.h +++ b/arch/arm/mach-exynos/exynos4_setup.h @@ -420,7 +420,7 @@ struct mem_timings { #define ABP_SFR_SLV1_SINGLE_ADDRMAP_START_OFFSET 0x828 #define ABP_SFR_SLV1_SINGLE_ADDRMAP_END_OFFSET 0x830 -#ifdef CONFIG_ORIGEN +#ifdef CONFIG_TARGET_ORIGEN /* Interleave: 2Bit, Interleave_bit1: 0x15, Interleave_bit0: 0x7 */ #define APB_SFR_INTERLEAVE_CONF_VAL 0x20001507 #define APB_SFR_ARBRITATION_CONF_VAL 0x00000001 @@ -542,7 +542,7 @@ struct mem_timings { #define CONTROL2_VAL 0x00000000 -#ifdef CONFIG_ORIGEN +#ifdef CONFIG_TARGET_ORIGEN #define TIMINGREF_VAL 0x000000BB #define TIMINGROW_VAL 0x4046654f #define TIMINGDATA_VAL 0x46400506 diff --git a/arch/arm/mach-exynos/lowlevel_init.c b/arch/arm/mach-exynos/lowlevel_init.c index 2645a8ff49..1ff5fcac1b 100644 --- a/arch/arm/mach-exynos/lowlevel_init.c +++ b/arch/arm/mach-exynos/lowlevel_init.c @@ -49,6 +49,10 @@ enum { }; #ifdef CONFIG_EXYNOS5420 + +/* Address for relocating helper code (Last 4 KB of IRAM) */ +#define EXYNOS_RELOCATE_CODE_BASE (CONFIG_IRAM_TOP - 0x1000) + /* * Power up secondary CPUs. */ @@ -56,7 +60,7 @@ static void secondary_cpu_start(void) { v7_enable_smp(EXYNOS5420_INFORM_BASE); svc32_mode_en(); - branch_bx(CONFIG_EXYNOS_RELOCATE_CODE_BASE); + branch_bx(EXYNOS_RELOCATE_CODE_BASE); } /* @@ -153,7 +157,7 @@ static void power_down_core(void) static void secondary_cores_configure(void) { /* Clear secondary boot iRAM base */ - writel(0x0, (CONFIG_EXYNOS_RELOCATE_CODE_BASE + 0x1C)); + writel(0x0, (EXYNOS_RELOCATE_CODE_BASE + 0x1C)); /* set lowpower flag and address */ writel(CPU_RST_FLAG_VAL, CONFIG_LOWPOWER_FLAG); diff --git a/arch/arm/mach-exynos/sec_boot.S b/arch/arm/mach-exynos/sec_boot.S index 59d05e6c01..40c07209e4 100644 --- a/arch/arm/mach-exynos/sec_boot.S +++ b/arch/arm/mach-exynos/sec_boot.S @@ -21,7 +21,7 @@ relocate_wait_code: .ltorg /* * Secondary core waits here until Primary wake it up. - * Below code is copied to CONFIG_EXYNOS_RELOCATE_CODE_BASE. + * Below code is copied to (CONFIG_IRAM_TOP - 0x1000) * This is a workaround code which is supposed to act as a * substitute/supplement to the iROM code. * diff --git a/board/samsung/arndale/arndale.c b/board/samsung/arndale/arndale.c index b43242fd3f..5320c1f2e0 100644 --- a/board/samsung/arndale/arndale.c +++ b/board/samsung/arndale/arndale.c @@ -112,10 +112,10 @@ int checkboard(void) } #endif -#ifdef CONFIG_S5P_PA_SYSRAM +#ifdef CONFIG_SMP_PEN_ADDR void smp_set_core_boot_addr(unsigned long addr, int corenr) { - writel(addr, CONFIG_S5P_PA_SYSRAM); + writel(addr, CONFIG_SMP_PEN_ADDR); /* make sure this write is really executed */ __asm__ volatile ("dsb\n"); diff --git a/configs/odroid-xu3_defconfig b/configs/odroid-xu3_defconfig index 7acdca9339..929a52140d 100644 --- a/configs/odroid-xu3_defconfig +++ b/configs/odroid-xu3_defconfig @@ -6,6 +6,7 @@ CONFIG_SYS_TEXT_BASE=0x43E00000 CONFIG_SYS_MALLOC_LEN=0x5004000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS5=y +# CONFIG_EXYNOS_TMU is not set CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x310000 diff --git a/configs/odroid_defconfig b/configs/odroid_defconfig index d442aca788..8beb6a006e 100644 --- a/configs/odroid_defconfig +++ b/configs/odroid_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_MALLOC_LEN=0x5004000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_ODROID=y +CONFIG_EXYNOS_ACE_SHA=y CONFIG_NR_DRAM_BANKS=8 CONFIG_ENV_SIZE=0x4000 CONFIG_ENV_OFFSET=0x140000 diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig index 00a663fcf2..5c47a22d1e 100644 --- a/configs/trats2_defconfig +++ b/configs/trats2_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_MALLOC_LEN=0x5001000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_TRATS2=y +CONFIG_EXYNOS_ACE_SHA=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2" diff --git a/configs/trats_defconfig b/configs/trats_defconfig index d5f0866606..008a8ff4b3 100644 --- a/configs/trats_defconfig +++ b/configs/trats_defconfig @@ -8,6 +8,7 @@ CONFIG_SYS_MALLOC_LEN=0x5001000 CONFIG_SYS_MALLOC_F_LEN=0x400 CONFIG_ARCH_EXYNOS4=y CONFIG_TARGET_TRATS=y +CONFIG_EXYNOS_ACE_SHA=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x7000 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats" diff --git a/drivers/i2c/exynos_hs_i2c.c b/drivers/i2c/exynos_hs_i2c.c index 39bcacc17a..a7349e06cf 100644 --- a/drivers/i2c/exynos_hs_i2c.c +++ b/drivers/i2c/exynos_hs_i2c.c @@ -147,7 +147,7 @@ static int hsi2c_get_clk_details(struct s3c24x0_i2c_bus *i2c_bus) unsigned int i = 0, utemp0 = 0, utemp1 = 0; unsigned int t_ftl_cycle; -#if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5) +#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5) clkin = get_i2c_clk(); #else clkin = get_PCLK(); diff --git a/drivers/i2c/s3c24x0_i2c.c b/drivers/i2c/s3c24x0_i2c.c index aaccb3aa22..505e20bc61 100644 --- a/drivers/i2c/s3c24x0_i2c.c +++ b/drivers/i2c/s3c24x0_i2c.c @@ -8,7 +8,7 @@ #include #include #include -#if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5) +#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5) #include #include #include @@ -53,7 +53,7 @@ static void read_write_byte(struct s3c24x0_i2c *i2c) static void i2c_ch_init(struct s3c24x0_i2c *i2c, int speed, int slaveadd) { ulong freq, pres = 16, div; -#if (defined CONFIG_EXYNOS4 || defined CONFIG_EXYNOS5) +#if defined(CONFIG_ARCH_EXYNOS4) || defined(CONFIG_ARCH_EXYNOS5) freq = get_i2c_clk(); #else freq = get_PCLK(); diff --git a/include/configs/arndale.h b/include/configs/arndale.h index 5ebba0cda2..7a244769e3 100644 --- a/include/configs/arndale.h +++ b/include/configs/arndale.h @@ -14,13 +14,9 @@ #include "exynos5250-common.h" #include -/* MMC SPL */ -#define CONFIG_EXYNOS_SPL - /* Miscellaneous configurable options */ -#define CONFIG_S5P_PA_SYSRAM 0x02020000 -#define CONFIG_SMP_PEN_ADDR CONFIG_S5P_PA_SYSRAM +#define CONFIG_SMP_PEN_ADDR 0x02020000 /* The PERIPHBASE in the CBAR register is wrong on the Arndale, so override it */ #define CONFIG_ARM_GIC_BASE_ADDRESS 0x10480000 diff --git a/include/configs/espresso7420.h b/include/configs/espresso7420.h index 660d1a0804..2f067a4424 100644 --- a/include/configs/espresso7420.h +++ b/include/configs/espresso7420.h @@ -10,8 +10,6 @@ #include -#define CONFIG_ESPRESSO7420 - #define CONFIG_SYS_SDRAM_BASE 0x40000000 /* DRAM Memory Banks */ diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h index cbcef261f4..79860212f4 100644 --- a/include/configs/exynos-common.h +++ b/include/configs/exynos-common.h @@ -8,10 +8,6 @@ #ifndef __EXYNOS_COMMON_H #define __EXYNOS_COMMON_H -/* High Level Configuration Options */ -#define CONFIG_SAMSUNG /* in a SAMSUNG core */ -#define CONFIG_S5P /* S5P Family */ - #include /* get chip and board defs */ #include #include diff --git a/include/configs/exynos4-common.h b/include/configs/exynos4-common.h index 4202c62612..625a2d8dc1 100644 --- a/include/configs/exynos4-common.h +++ b/include/configs/exynos4-common.h @@ -8,8 +8,6 @@ #ifndef __CONFIG_EXYNOS4_COMMON_H #define __CONFIG_EXYNOS4_COMMON_H -#define CONFIG_EXYNOS4 /* Exynos4 Family */ - #include "exynos-common.h" /* SD/MMC configuration */ diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h index 7ab821d08c..44f5cb1e83 100644 --- a/include/configs/exynos5-common.h +++ b/include/configs/exynos5-common.h @@ -8,15 +8,8 @@ #ifndef __CONFIG_EXYNOS5_COMMON_H #define __CONFIG_EXYNOS5_COMMON_H -#define CONFIG_EXYNOS5 /* Exynos5 Family */ - #include "exynos-common.h" -#define CONFIG_EXYNOS_SPL - -/* Enable ACE acceleration for SHA1 and SHA256 */ -#define CONFIG_EXYNOS_ACE_SHA - /* Power Down Modes */ #define S5P_CHECK_SLEEP 0x00000BAD #define S5P_CHECK_DIDLE 0xBAD00000 @@ -31,9 +24,6 @@ /* select serial console configuration */ #define EXYNOS5_DEFAULT_UART_OFFSET 0x010000 -/* Thermal Management Unit */ -#define CONFIG_EXYNOS_TMU - /* MMC SPL */ #define COPY_BL2_FNPTR_ADDR 0x02020030 diff --git a/include/configs/exynos5-dt-common.h b/include/configs/exynos5-dt-common.h index bcbdfa7ae3..38f6940a3d 100644 --- a/include/configs/exynos5-dt-common.h +++ b/include/configs/exynos5-dt-common.h @@ -15,8 +15,6 @@ "stdout=serial,vidconsole\0" \ "stderr=serial,vidconsole\0" -#define CONFIG_EXYNOS5_DT - #define CONFIG_SYS_SPI_BASE 0x12D30000 #define FLASH_SIZE (4 << 20) #define CONFIG_SPI_BOOTING diff --git a/include/configs/exynos5250-common.h b/include/configs/exynos5250-common.h index 82cb8aff7b..e6f6dbe6bf 100644 --- a/include/configs/exynos5250-common.h +++ b/include/configs/exynos5250-common.h @@ -9,8 +9,6 @@ #ifndef __CONFIG_5250_H #define __CONFIG_5250_H -#define CONFIG_EXYNOS5250 - #define CONFIG_SYS_SDRAM_BASE 0x40000000 /* USB */ diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h index 5e1aba7692..cfff8bb27a 100644 --- a/include/configs/exynos5420-common.h +++ b/include/configs/exynos5420-common.h @@ -8,19 +8,12 @@ #ifndef __CONFIG_EXYNOS5420_H #define __CONFIG_EXYNOS5420_H -#define CONFIG_EXYNOS5420 - -#define CONFIG_EXYNOS5_DT - #define CONFIG_VAR_SIZE_SPL #define CONFIG_IRAM_TOP 0x02074000 #define CONFIG_PHY_IRAM_BASE 0x02020000 -/* Address for relocating helper code (Last 4 KB of IRAM) */ -#define CONFIG_EXYNOS_RELOCATE_CODE_BASE (CONFIG_IRAM_TOP - 0x1000) - /* * Low Power settings */ diff --git a/include/configs/exynos7420-common.h b/include/configs/exynos7420-common.h index e8aed56710..a8bef860c2 100644 --- a/include/configs/exynos7420-common.h +++ b/include/configs/exynos7420-common.h @@ -8,10 +8,6 @@ #ifndef __CONFIG_EXYNOS7420_COMMON_H #define __CONFIG_EXYNOS7420_COMMON_H -/* High Level Configuration Options */ -#define CONFIG_SAMSUNG /* in a SAMSUNG core */ -#define CONFIG_S5P - #include /* get chip and board defs */ #include diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h index 4a2e56b635..6b1de18bc1 100644 --- a/include/configs/exynos78x0-common.h +++ b/include/configs/exynos78x0-common.h @@ -11,10 +11,6 @@ #ifndef __CONFIG_EXYNOS78x0_COMMON_H #define __CONFIG_EXYNOS78x0_COMMON_H -/* High Level Configuration Options */ -#define CONFIG_SAMSUNG /* in a SAMSUNG core */ -#define CONFIG_S5P - #include /* get chip and board defs */ #include diff --git a/include/configs/odroid.h b/include/configs/odroid.h index dec658dd13..d4cc88206b 100644 --- a/include/configs/odroid.h +++ b/include/configs/odroid.h @@ -146,9 +146,6 @@ /* GPT */ -/* Security subsystem - enable hw_rand() */ -#define CONFIG_EXYNOS_ACE_SHA - /* USB */ #define CONFIG_USB_EHCI_EXYNOS diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h index ed3cf212ac..35e7d7d265 100644 --- a/include/configs/odroid_xu3.h +++ b/include/configs/odroid_xu3.h @@ -31,9 +31,6 @@ #define CONFIG_G_DNL_UMS_VENDOR_NUM 0x0525 #define CONFIG_G_DNL_UMS_PRODUCT_NUM 0xA4A5 -/* FIXME: MUST BE REMOVED AFTER TMU IS TURNED ON */ -#undef CONFIG_EXYNOS_TMU - #define CONFIG_DFU_ALT_SYSTEM \ "uImage fat 0 1;" \ "zImage fat 0 1;" \ diff --git a/include/configs/origen.h b/include/configs/origen.h index 4d296b7a03..36aaa7c14f 100644 --- a/include/configs/origen.h +++ b/include/configs/origen.h @@ -10,10 +10,6 @@ #include -/* High Level Configuration Options */ -#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ -#define CONFIG_ORIGEN 1 /* working with ORIGEN*/ - /* ORIGEN has 4 bank of DRAM */ #define CONFIG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h index d27116ad11..8b7e2e5dc9 100644 --- a/include/configs/s5p_goni.h +++ b/include/configs/s5p_goni.h @@ -10,11 +10,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* High Level Configuration Options */ -#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ -#define CONFIG_S5P 1 /* which is in a S5P Family */ -#define CONFIG_S5PC110 1 /* which is in a S5PC110 */ - #include #include /* get chip and board defs */ diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h index 2f04b077ad..9a9f3fedff 100644 --- a/include/configs/smdkc100.h +++ b/include/configs/smdkc100.h @@ -11,14 +11,6 @@ #ifndef __CONFIG_H #define __CONFIG_H -/* - * High Level Configuration Options - * (easy to change) - */ -#define CONFIG_SAMSUNG 1 /* in a SAMSUNG core */ -#define CONFIG_S5P 1 /* which is in a S5P Family */ -#define CONFIG_S5PC100 1 /* which is in a S5PC100 */ - #include /* get chip and board defs */ /* input clock of PLL: SMDKC100 has 12MHz input clock */ diff --git a/include/configs/smdkv310.h b/include/configs/smdkv310.h index 1367b7d060..bb0f547303 100644 --- a/include/configs/smdkv310.h +++ b/include/configs/smdkv310.h @@ -13,8 +13,6 @@ #undef CONFIG_USB_GADGET_DWC2_OTG_PHY /* High Level Configuration Options */ -#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */ - #define CONFIG_SYS_SDRAM_BASE 0x40000000 /* Handling Sleep Mode*/ diff --git a/include/configs/trats.h b/include/configs/trats.h index 118ceb5250..ee4a583baa 100644 --- a/include/configs/trats.h +++ b/include/configs/trats.h @@ -11,8 +11,6 @@ #include -#define CONFIG_TRATS - #ifndef CONFIG_SYS_L2CACHE_OFF #define CONFIG_SYS_L2_PL310 #define CONFIG_SYS_PL310_BASE 0x10502000 @@ -128,9 +126,6 @@ /* GPT */ -/* Security subsystem - enable hw_rand() */ -#define CONFIG_EXYNOS_ACE_SHA - /* Common misc for Samsung */ #define CONFIG_MISC_COMMON diff --git a/include/configs/trats2.h b/include/configs/trats2.h index 2d644a8b23..c5df03a9f5 100644 --- a/include/configs/trats2.h +++ b/include/configs/trats2.h @@ -116,9 +116,6 @@ /* GPT */ -/* Security subsystem - enable hw_rand() */ -#define CONFIG_EXYNOS_ACE_SHA - /* Common misc for Samsung */ #define CONFIG_MISC_COMMON diff --git a/include/power/fg_battery_cell_params.h b/include/power/fg_battery_cell_params.h index b8c895bbab..500c8ea717 100644 --- a/include/power/fg_battery_cell_params.h +++ b/include/power/fg_battery_cell_params.h @@ -7,7 +7,7 @@ #ifndef __FG_BATTERY_CELL_PARAMS_H_ #define __FG_BATTERY_CELL_PARAMS_H_ -#if defined(CONFIG_POWER_FG_MAX17042) && defined(CONFIG_TRATS) +#if defined(CONFIG_POWER_FG_MAX17042) && defined(CONFIG_TARGET_TRATS) /* Cell characteristics - Exynos4 TRATS development board */ /* Shall be written to addr 0x80h */ diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl index c1d32f5879..1cfb8115e3 100644 --- a/scripts/Makefile.spl +++ b/scripts/Makefile.spl @@ -253,7 +253,7 @@ endif INPUTS-y += $(obj)/$(SPL_BIN).bin $(obj)/$(SPL_BIN).sym -ifdef CONFIG_SAMSUNG +ifneq ($(CONFIG_ARCH_EXYNOS)$(CONFIG_ARCH_S5PC1XX),) INPUTS-y += $(obj)/$(BOARD)-spl.bin endif @@ -367,8 +367,8 @@ $(platdata-hdr) $(u-boot-spl-platdata_c) &: $(obj)/$(SPL_BIN).dtb @rm -f $(u-boot-spl-all-platdata_c) $(u-boot-spl-all-platdata) $(call if_changed,dtoc) -ifdef CONFIG_SAMSUNG -ifdef CONFIG_VAR_SIZE_SPL +ifneq ($(CONFIG_ARCH_EXYNOS)$(CONFIG_ARCH_S5PC1XX),) +ifeq ($(CONFIG_EXYNOS5420),y) VAR_SIZE_PARAM = --vs else VAR_SIZE_PARAM = -- cgit v1.2.3