summaryrefslogtreecommitdiff
path: root/arch/arm64/boot/dts/qcom/sdm630.dtsi
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm630.dtsi')
-rw-r--r--arch/arm64/boot/dts/qcom/sdm630.dtsi257
1 files changed, 159 insertions, 98 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi
index deb928d303c2..f87054575ce7 100644
--- a/arch/arm64/boot/dts/qcom/sdm630.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi
@@ -17,14 +17,14 @@
chosen { };
clocks {
- xo_board: xo_board {
+ xo_board: xo-board {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
clock-output-names = "xo_board";
};
- sleep_clk: sleep_clk {
+ sleep_clk: sleep-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32764>;
@@ -343,10 +343,19 @@
};
qhee_code: qhee-code@85800000 {
- reg = <0x0 0x85800000 0x0 0x3700000>;
+ reg = <0x0 0x85800000 0x0 0x600000>;
no-map;
};
+ rmtfs_mem: memory@85e00000 {
+ compatible = "qcom,rmtfs-mem";
+ reg = <0x0 0x85e00000 0x0 0x200000>;
+ no-map;
+
+ qcom,client-id = <1>;
+ qcom,vmid = <15>;
+ };
+
smem_region: smem-mem@86000000 {
reg = <0 0x86000000 0 0x200000>;
no-map;
@@ -357,58 +366,44 @@
no-map;
};
- modem_fw_mem: modem-fw-region@8ac00000 {
+ mpss_region: mpss@8ac00000 {
reg = <0x0 0x8ac00000 0x0 0x7e00000>;
no-map;
};
- adsp_fw_mem: adsp-fw-region@92a00000 {
+ adsp_region: adsp@92a00000 {
reg = <0x0 0x92a00000 0x0 0x1e00000>;
no-map;
};
- pil_mba_mem: pil-mba-region@94800000 {
+ mba_region: mba@94800000 {
reg = <0x0 0x94800000 0x0 0x200000>;
no-map;
};
- buffer_mem: buffer-region@94a00000 {
+ buffer_mem: tzbuffer@94a00000 {
reg = <0x0 0x94a00000 0x0 0x100000>;
no-map;
};
- venus_fw_mem: venus-fw-region@9f800000 {
+ venus_region: venus@9f800000 {
reg = <0x0 0x9f800000 0x0 0x800000>;
no-map;
};
- secure_region2: secure-region2@f7c00000 {
- reg = <0x0 0xf7c00000 0x0 0x5c00000>;
- no-map;
- };
-
adsp_mem: adsp-region@f6000000 {
reg = <0x0 0xf6000000 0x0 0x800000>;
no-map;
};
- qseecom_ta_mem: qseecom-ta-region@fec00000 {
- reg = <0x0 0xfec00000 0x0 0x1000000>;
- no-map;
- };
-
qseecom_mem: qseecom-region@f6800000 {
reg = <0x0 0xf6800000 0x0 0x1400000>;
no-map;
};
- secure_display_memory: secure-region@f5c00000 {
- reg = <0x0 0xf5c00000 0x0 0x5c00000>;
- no-map;
- };
-
- cont_splash_mem: cont-splash-region@9d400000 {
- reg = <0x0 0x9d400000 0x0 0x23ff000>;
+ zap_shader_region: gpu@fed00000 {
+ compatible = "shared-dma-pool";
+ reg = <0x0 0xfed00000 0x0 0xa00000>;
no-map;
};
};
@@ -527,14 +522,18 @@
reg = <0x01f40000 0x20000>;
};
- tlmm: pinctrl@3000000 {
+ tlmm: pinctrl@3100000 {
compatible = "qcom,sdm630-pinctrl";
- reg = <0x03000000 0xc00000>;
+ reg = <0x03100000 0x400000>,
+ <0x03500000 0x400000>,
+ <0x03900000 0x400000>;
+ reg-names = "south", "center", "north";
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
gpio-controller;
- #gpio-cells = <0x2>;
+ gpio-ranges = <&tlmm 0 0 114>;
+ #gpio-cells = <2>;
interrupt-controller;
- #interrupt-cells = <0x2>;
+ #interrupt-cells = <2>;
blsp1_uart1_default: blsp1-uart1-default {
pins = "gpio0", "gpio1", "gpio2", "gpio3";
@@ -554,40 +553,48 @@
bias-disable;
};
- blsp2_uart1_tx_active: blsp2-uart1-tx-active {
- pins = "gpio16";
- drive-strength = <2>;
- bias-disable;
- };
-
- blsp2_uart1_tx_sleep: blsp2-uart1-tx-sleep {
- pins = "gpio16";
- drive-strength = <2>;
- bias-pull-up;
- };
+ blsp2_uart1_default: blsp2-uart1-active {
+ tx-rts {
+ pins = "gpio16", "gpio19";
+ function = "blsp_uart5";
+ drive-strength = <2>;
+ bias-disable;
+ };
- blsp2_uart1_rxcts_active: blsp2-uart1-rxcts-active {
- pins = "gpio17", "gpio18";
- drive-strength = <2>;
- bias-disable;
- };
+ rx {
+ /*
+ * Avoid garbage data while BT module
+ * is powered off or not driving signal
+ */
+ pins = "gpio17";
+ function = "blsp_uart5";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
- blsp2_uart1_rxcts_sleep: blsp2-uart1-rxcts-sleep {
- pins = "gpio17", "gpio18";
- drive-strength = <2>;
- bias-no-pull;
+ cts {
+ /* Match the pull of the BT module */
+ pins = "gpio18";
+ function = "blsp_uart5";
+ drive-strength = <2>;
+ bias-pull-down;
+ };
};
- blsp2_uart1_rfr_active: blsp2-uart1-rfr-active {
- pins = "gpio19";
- drive-strength = <2>;
- bias-disable;
- };
+ blsp2_uart1_sleep: blsp2-uart1-sleep {
+ tx {
+ pins = "gpio16";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-pull-up;
+ };
- blsp2_uart1_rfr_sleep: blsp2-uart1-rfr-sleep {
- pins = "gpio19";
- drive-strength = <2>;
- bias-no-pull;
+ rx-cts-rts {
+ pins = "gpio17", "gpio18", "gpio19";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-no-pull;
+ };
};
i2c1_default: i2c1-default {
@@ -686,50 +693,106 @@
bias-pull-up;
};
- sdc1_clk_on: sdc1-clk-on {
- pins = "sdc1_clk";
- bias-disable;
- drive-strength = <16>;
- };
+ sdc1_state_on: sdc1-on {
+ clk {
+ pins = "sdc1_clk";
+ bias-disable;
+ drive-strength = <16>;
+ };
- sdc1_clk_off: sdc1-clk-off {
- pins = "sdc1_clk";
- bias-disable;
- drive-strength = <2>;
- };
+ cmd {
+ pins = "sdc1_cmd";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
- sdc1_cmd_on: sdc1-cmd-on {
- pins = "sdc1_cmd";
- bias-pull-up;
- drive-strength = <10>;
- };
+ data {
+ pins = "sdc1_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
- sdc1_cmd_off: sdc1-cmd-off {
- pins = "sdc1_cmd";
- bias-pull-up;
- drive-strength = <2>;
+ rclk {
+ pins = "sdc1_rclk";
+ bias-pull-down;
+ };
};
- sdc1_data_on: sdc1-data-on {
- pins = "sdc1_data";
- bias-pull-up;
- drive-strength = <8>;
- };
+ sdc1_state_off: sdc1-off {
+ clk {
+ pins = "sdc1_clk";
+ bias-disable;
+ drive-strength = <2>;
+ };
- sdc1_data_off: sdc1-data-off {
- pins = "sdc1_data";
- bias-pull-up;
- drive-strength = <2>;
+ cmd {
+ pins = "sdc1_cmd";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
+ data {
+ pins = "sdc1_data";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
+ rclk {
+ pins = "sdc1_rclk";
+ bias-pull-down;
+ };
};
- sdc1_rclk_on: sdc1-rclk-on {
- pins = "sdc1_rclk";
- bias-pull-down;
+ sdc2_state_on: sdc2-on {
+ clk {
+ pins = "sdc2_clk";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ cmd {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ data {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <10>;
+ };
+
+ sd-cd {
+ pins = "gpio54";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
};
- sdc1_rclk_off: sdc1-rclk-off {
- pins = "sdc1_rclk";
- bias-pull-down;
+ sdc2_state_off: sdc2-off {
+ clk {
+ pins = "sdc2_clk";
+ bias-disable;
+ drive-strength = <2>;
+ };
+
+ cmd {
+ pins = "sdc2_cmd";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
+ data {
+ pins = "sdc2_data";
+ bias-pull-up;
+ drive-strength = <2>;
+ };
+
+ sd-cd {
+ pins = "gpio54";
+ bias-disable;
+ drive-strength = <2>;
+ };
};
};
@@ -821,8 +884,8 @@
clock-names = "core", "iface", "xo";
pinctrl-names = "default", "sleep";
- pinctrl-0 = <&sdc1_clk_on &sdc1_cmd_on &sdc1_data_on &sdc1_rclk_on>;
- pinctrl-1 = <&sdc1_clk_off &sdc1_cmd_off &sdc1_data_off &sdc1_rclk_off>;
+ pinctrl-0 = <&sdc1_state_on>;
+ pinctrl-1 = <&sdc1_state_off>;
bus-width = <8>;
non-removable;
@@ -967,10 +1030,8 @@
dmas = <&blsp2_dma 0>, <&blsp2_dma 1>;
dma-names = "tx", "rx";
pinctrl-names = "default", "sleep";
- pinctrl-0 = <&blsp2_uart1_tx_active &blsp2_uart1_rxcts_active
- &blsp2_uart1_rfr_active>;
- pinctrl-1 = <&blsp2_uart1_tx_sleep &blsp2_uart1_rxcts_sleep
- &blsp2_uart1_rfr_sleep>;
+ pinctrl-0 = <&blsp2_uart1_default>;
+ pinctrl-1 = <&blsp2_uart1_sleep>;
status = "disabled";
};
generated by cgit v1.2.3 (git 2.39.0) at 2024-06-02 15:21:51 +0300