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authorWilliam Qiu <william.qiu@starfivetech.com>2023-12-22 12:45:45 +0300
committerEmil Renner Berthing <emil.renner.berthing@canonical.com>2024-04-13 23:33:32 +0300
commit2a607367e76cf4e2f212424851439f5c78eaba98 (patch)
treecb68af03e26da47d0e90d99e572ec1da3afe1257
parent709928dc7645ac688df6aa93c9d61bf72a7c18a3 (diff)
downloadlinux-2a607367e76cf4e2f212424851439f5c78eaba98.tar.xz
dt-bindings: pwm: Add bindings for OpenCores PWM Controller
Add bindings for OpenCores PWM Controller. Signed-off-by: William Qiu <william.qiu@starfivetech.com> Reviewed-by: Hal Feng <hal.feng@starfivetech.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> (cherry picked from commit 2529085831b01fcd02ff58ab4e2596d3b31bcf80) Signed-off-by: Emil Renner Berthing <emil.renner.berthing@canonical.com>
-rw-r--r--Documentation/devicetree/bindings/pwm/opencores,pwm.yaml55
1 files changed, 55 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml b/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
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index 000000000000..0b85dd861dfd
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
@@ -0,0 +1,55 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pwm/opencores,pwm.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: OpenCores PWM controller
+
+maintainers:
+ - William Qiu <william.qiu@starfivetech.com>
+
+description:
+ The OpenCores PTC ip core contains a PWM controller. When operating in PWM
+ mode, the PTC core generates binary signal with user-programmable low and
+ high periods. All PTC counters and registers are 32-bit.
+
+allOf:
+ - $ref: pwm.yaml#
+
+properties:
+ compatible:
+ items:
+ - enum:
+ - starfive,jh7100-pwm
+ - starfive,jh7110-pwm
+ - const: opencores,pwm-v1
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ resets:
+ maxItems: 1
+
+ "#pwm-cells":
+ const: 3
+
+required:
+ - compatible
+ - reg
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ pwm@12490000 {
+ compatible = "starfive,jh7110-pwm", "opencores,pwm-v1";
+ reg = <0x12490000 0x10000>;
+ clocks = <&clkgen 181>;
+ resets = <&rstgen 109>;
+ #pwm-cells = <3>;
+ };