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authorMayuresh Chitale <mchitale@ventanamicro.com>2023-03-09 16:13:51 +0300
committerAnup Patel <anup@brainfault.org>2023-03-10 11:16:52 +0300
commit1fe8dc995566d869836d3caf37e427c28536f453 (patch)
treeab708c7d847836efb1a8f6b6a263b6233713f0ed
parent506144f398b7911a2395d127fb6a64082a4a79cc (diff)
downloadopensbi-1fe8dc995566d869836d3caf37e427c28536f453.tar.xz
lib: sbi_pmu: add callback for counter width
This patch adds a callback to fetch the number of bits implemented for a custom firmware counter. If the callback fails or is not implemented then width defaults to 63. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
-rw-r--r--include/sbi/sbi_pmu.h5
-rw-r--r--lib/sbi/sbi_pmu.c6
2 files changed, 11 insertions, 0 deletions
diff --git a/include/sbi/sbi_pmu.h b/include/sbi/sbi_pmu.h
index c365243..b3b75c1 100644
--- a/include/sbi/sbi_pmu.h
+++ b/include/sbi/sbi_pmu.h
@@ -42,6 +42,11 @@ struct sbi_pmu_device {
uint32_t event_idx_code);
/**
+ * Fetch the max width of this counter in number of bits.
+ */
+ int (*fw_counter_width)(void);
+
+ /**
* Read value of custom firmware counter
* Note: 0 <= counter_index < SBI_PMU_FW_CTR_MAX
*/
diff --git a/lib/sbi/sbi_pmu.c b/lib/sbi/sbi_pmu.c
index 154dbda..a99c045 100644
--- a/lib/sbi/sbi_pmu.c
+++ b/lib/sbi/sbi_pmu.c
@@ -761,6 +761,7 @@ unsigned long sbi_pmu_num_ctr(void)
int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info)
{
+ int width;
union sbi_pmu_ctr_info cinfo = {0};
struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
@@ -782,6 +783,11 @@ int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info)
cinfo.type = SBI_PMU_CTR_TYPE_FW;
/* Firmware counters are always 64 bits wide */
cinfo.width = 63;
+ if (pmu_dev && pmu_dev->fw_counter_width) {
+ width = pmu_dev->fw_counter_width();
+ if (width)
+ cinfo.width = width - 1;
+ }
}
*ctr_info = cinfo.value;