diff options
| author | Himanshu Chauhan <hchauhan@ventanamicro.com> | 2023-01-09 08:20:42 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2023-01-09 15:34:28 +0300 |
| commit | 59a08cd7d632bb2394a29956497dfe7829099997 (patch) | |
| tree | e0762a2ad25217259cb7f31c718ba5ef6fd5e128 | |
| parent | 3e2f573e707e78c7e00a977b28ce917ff051e69d (diff) | |
| download | opensbi-59a08cd7d632bb2394a29956497dfe7829099997.tar.xz | |
lib: utils: Add M-mode {R/W} flags to the MMIO regions
Add the M-mode readable/writable flags to mmio regions
of various drivers.
Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Tested-by: Anup Patel <anup@brainfault.org>
| -rw-r--r-- | lib/utils/ipi/aclint_mswi.c | 5 | ||||
| -rw-r--r-- | lib/utils/irqchip/aplic.c | 5 | ||||
| -rw-r--r-- | lib/utils/irqchip/imsic.c | 5 | ||||
| -rw-r--r-- | lib/utils/timer/aclint_mtimer.c | 16 |
4 files changed, 24 insertions, 7 deletions
diff --git a/lib/utils/ipi/aclint_mswi.c b/lib/utils/ipi/aclint_mswi.c index 832e223..6b004cb 100644 --- a/lib/utils/ipi/aclint_mswi.c +++ b/lib/utils/ipi/aclint_mswi.c @@ -88,7 +88,10 @@ int aclint_mswi_cold_init(struct aclint_mswi_data *mswi) region_size = ((mswi->size - pos) < ACLINT_MSWI_ALIGN) ? (mswi->size - pos) : ACLINT_MSWI_ALIGN; sbi_domain_memregion_init(mswi->addr + pos, region_size, - SBI_DOMAIN_MEMREGION_MMIO, ®); + (SBI_DOMAIN_MEMREGION_MMIO | + SBI_DOMAIN_MEMREGION_M_READABLE | + SBI_DOMAIN_MEMREGION_M_WRITABLE), + ®); rc = sbi_domain_root_add_memregion(®); if (rc) return rc; diff --git a/lib/utils/irqchip/aplic.c b/lib/utils/irqchip/aplic.c index 0a8469b..d7fd992 100644 --- a/lib/utils/irqchip/aplic.c +++ b/lib/utils/irqchip/aplic.c @@ -269,7 +269,10 @@ int aplic_cold_irqchip_init(struct aplic_data *aplic) (last_deleg_irq == aplic->num_source) && (first_deleg_irq == 1))) { sbi_domain_memregion_init(aplic->addr, aplic->size, - SBI_DOMAIN_MEMREGION_MMIO, ®); + (SBI_DOMAIN_MEMREGION_MMIO | + SBI_DOMAIN_MEMREGION_M_READABLE | + SBI_DOMAIN_MEMREGION_M_WRITABLE), + ®); rc = sbi_domain_root_add_memregion(®); if (rc) return rc; diff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c index 98f2cb6..11667cd 100644 --- a/lib/utils/irqchip/imsic.c +++ b/lib/utils/irqchip/imsic.c @@ -313,7 +313,10 @@ int imsic_cold_irqchip_init(struct imsic_data *imsic) for (i = 0; i < IMSIC_MAX_REGS && imsic->regs[i].size; i++) { sbi_domain_memregion_init(imsic->regs[i].addr, imsic->regs[i].size, - SBI_DOMAIN_MEMREGION_MMIO, ®); + (SBI_DOMAIN_MEMREGION_MMIO | + SBI_DOMAIN_MEMREGION_M_READABLE | + SBI_DOMAIN_MEMREGION_M_WRITABLE), + ®); rc = sbi_domain_root_add_memregion(®); if (rc) return rc; diff --git a/lib/utils/timer/aclint_mtimer.c b/lib/utils/timer/aclint_mtimer.c index 1846a9a..84ded4e 100644 --- a/lib/utils/timer/aclint_mtimer.c +++ b/lib/utils/timer/aclint_mtimer.c @@ -188,26 +188,34 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt, rc = sbi_domain_root_add_memrange(mt->mtimecmp_addr, mt->mtime_size + mt->mtimecmp_size, MTIMER_REGION_ALIGN, - SBI_DOMAIN_MEMREGION_MMIO); + (SBI_DOMAIN_MEMREGION_MMIO | + SBI_DOMAIN_MEMREGION_M_READABLE | + SBI_DOMAIN_MEMREGION_M_WRITABLE)); if (rc) return rc; } else if (mt->mtimecmp_addr == (mt->mtime_addr + mt->mtime_size)) { rc = sbi_domain_root_add_memrange(mt->mtime_addr, mt->mtime_size + mt->mtimecmp_size, MTIMER_REGION_ALIGN, - SBI_DOMAIN_MEMREGION_MMIO); + (SBI_DOMAIN_MEMREGION_MMIO | + SBI_DOMAIN_MEMREGION_M_READABLE | + SBI_DOMAIN_MEMREGION_M_WRITABLE)); if (rc) return rc; } else { rc = sbi_domain_root_add_memrange(mt->mtime_addr, mt->mtime_size, MTIMER_REGION_ALIGN, - SBI_DOMAIN_MEMREGION_MMIO); + (SBI_DOMAIN_MEMREGION_MMIO | + SBI_DOMAIN_MEMREGION_M_READABLE | + SBI_DOMAIN_MEMREGION_M_WRITABLE)); if (rc) return rc; rc = sbi_domain_root_add_memrange(mt->mtimecmp_addr, mt->mtimecmp_size, MTIMER_REGION_ALIGN, - SBI_DOMAIN_MEMREGION_MMIO); + (SBI_DOMAIN_MEMREGION_MMIO | + SBI_DOMAIN_MEMREGION_M_READABLE | + SBI_DOMAIN_MEMREGION_M_WRITABLE)); if (rc) return rc; } |