diff options
| author | Hal Feng <hal.feng@starfivetech.com> | 2023-08-09 11:02:50 +0300 |
|---|---|---|
| committer | Hal Feng <hal.feng@starfivetech.com> | 2023-11-29 05:46:57 +0300 |
| commit | 4b07186e8ec0980867e1dc611574a8ca591b125c (patch) | |
| tree | 9790ecd520b8eb5cdeaddc3b404449440608ff6c | |
| parent | 4f914dd6f7fc3daf7821d3be07954e95f2b9d3f0 (diff) | |
| download | u-boot-4b07186e8ec0980867e1dc611574a8ca591b125c.tar.xz | |
riscv: dts: jh7110: Add a new clock input to gmac
To be compatible with the VisionFive 2 board.
The code is ported from tag JH7110_VF2_515_v3.9.3 of VF2 repo.
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
| -rw-r--r-- | arch/riscv/dts/jh7110.dtsi | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi index 3f3098b96b..de5289cff5 100644 --- a/arch/riscv/dts/jh7110.dtsi +++ b/arch/riscv/dts/jh7110.dtsi @@ -856,13 +856,15 @@ "ptp_ref", "stmmaceth", "pclk", - "gtxc"; + "gtxc", + "rmii_rtx"; clocks = <&clkgen JH7110_GMAC0_GTXCLK>, <&clkgen JH7110_U0_GMAC5_CLK_TX>, <&clkgen JH7110_GMAC0_PTP>, <&clkgen JH7110_U0_GMAC5_CLK_AHB>, <&clkgen JH7110_U0_GMAC5_CLK_AXI>, - <&clkgen JH7110_GMAC0_GTXC>; + <&clkgen JH7110_GMAC0_GTXC>, + <&clkgen JH7110_GMAC0_RMII_RTX>; resets = <&rstgen RSTN_U0_DW_GMAC5_AXI64_AHB>, <&rstgen RSTN_U0_DW_GMAC5_AXI64_AXI>; reset-names = "ahb", "stmmaceth"; @@ -897,13 +899,15 @@ "ptp_ref", "stmmaceth", "pclk", - "gtxc"; + "gtxc", + "rmii_rtx"; clocks = <&clkgen JH7110_GMAC1_GTXCLK>, <&clkgen JH7110_GMAC5_CLK_TX>, <&clkgen JH7110_GMAC5_CLK_PTP>, <&clkgen JH7110_GMAC5_CLK_AHB>, <&clkgen JH7110_GMAC5_CLK_AXI>, - <&clkgen JH7110_GMAC1_GTXC>; + <&clkgen JH7110_GMAC1_GTXC>, + <&clkgen JH7110_GMAC1_RMII_RTX>; resets = <&rstgen RSTN_U1_DW_GMAC5_AXI64_H_N>, <&rstgen RSTN_U1_DW_GMAC5_AXI64_A_I>; reset-names = "ahb", "stmmaceth"; |