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| author | Will Deacon <will@kernel.org> | 2021-02-12 18:09:34 +0300 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2021-02-12 18:09:34 +0300 |
| commit | c974a8e574f9644aba0607958a3abce596699dc1 (patch) | |
| tree | 22db764b922cbd83fa8497099fb162581a6b99da /Documentation/admin-guide | |
| parent | 1d32854ea76331d10d376ed3ac67831b94466ae9 (diff) | |
| parent | 8ee37e0f97ec66b953d202257293670efaab1daa (diff) | |
| download | linux-c974a8e574f9644aba0607958a3abce596699dc1.tar.xz | |
Merge branch 'for-next/perf' into for-next/core
Perf and PMU updates including support for Cortex-A78 and the v8.3 SPE
extensions.
* for-next/perf:
drivers/perf: Replace spin_lock_irqsave to spin_lock
dt-bindings: arm: add Cortex-A78 binding
arm64: perf: add support for Cortex-A78
arm64: perf: Constify static attribute_group structs
drivers/perf: Prevent forced unbinding of ARM_DMC620_PMU drivers
perf/arm-cmn: Move IRQs when migrating context
perf/arm-cmn: Fix PMU instance naming
perf: Constify static struct attribute_group
perf: hisi: Constify static struct attribute_group
perf/imx_ddr: Constify static struct attribute_group
perf: qcom: Constify static struct attribute_group
drivers/perf: Add support for ARMv8.3-SPE
Diffstat (limited to 'Documentation/admin-guide')
| -rw-r--r-- | Documentation/admin-guide/perf/arm-cmn.rst | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/admin-guide/perf/arm-cmn.rst b/Documentation/admin-guide/perf/arm-cmn.rst index 0e4809346014..796e25b7027b 100644 --- a/Documentation/admin-guide/perf/arm-cmn.rst +++ b/Documentation/admin-guide/perf/arm-cmn.rst @@ -17,7 +17,7 @@ PMU events ---------- The PMU driver registers a single PMU device for the whole interconnect, -see /sys/bus/event_source/devices/arm_cmn. Multi-chip systems may link +see /sys/bus/event_source/devices/arm_cmn_0. Multi-chip systems may link more than one CMN together via external CCIX links - in this situation, each mesh counts its own events entirely independently, and additional PMU devices will be named arm_cmn_{1..n}. |