Merge tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma

Pull dmaengine updates from Vinod Koul:

 - Move Dmaengine DT bindings to YAML and convert Allwinner to schema.

 - FSL dma device_synchronize implementation

 - DW split acpi and of helpers and updates to driver and support for
   Elkhart Lake

 - Move filter fn as private for omap-dma and edma drivers and
   improvements to these drivers

 - Mark expected switch fall-through in couple of drivers

 - Renames of shdma and nbpfaxi binding document

 - Minor updates to bunch of drivers

* tag 'dmaengine-5.4-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (55 commits)
  dmaengine: ti: edma: Use bitmap_set() instead of open coded edma_set_bits()
  dmaengine: ti: edma: Only reset region0 access registers
  dmaengine: ti: edma: Do not reset reserved paRAM slots
  dmaengine: iop-adma.c: fix printk format warning
  dmaengine: stm32-dma: Use struct_size() helper
  dt-bindings: dmaengine: dma-common: Fix the dma-channel-mask property
  dmanegine: ioat/dca: Use struct_size() helper
  dmaengine: iop-adma: remove set but not used variable 'slots_per_op'
  dmaengine: dmatest: Add support for completion polling
  dmaengine: ti: omap-dma: Remove variable override in omap_dma_tx_status()
  dmaengine: ti: omap-dma: Remove 'Assignment in if condition'
  dmaengine: ti: edma: Remove 'Assignment in if condition'
  dmaengine: dw: platform: Split OF helpers to separate module
  dmaengine: dw: platform: Split ACPI helpers to separate module
  dmaengine: dw: platform: Move handle check to dw_dma_acpi_controller_register()
  dmaengine: dw: platform: Switch to acpi_dma_controller_register()
  dmaengine: dw: platform: Use devm_platform_ioremap_resource()
  dmaengine: dw: platform: Enable iDMA 32-bit on Intel Elkhart Lake
  dmaengine: dw: platform: Use struct dw_dma_chip_pdata
  dmaengine: dw: Export struct dw_dma_chip_pdata for wider use
  ...

1 files changed, 84 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/dma/renesas,shdma.txt b/Documentation/devicetree/bindings/dma/renesas,shdma.txt
new file mode 100644
index 000000000000..a91920a49433
--- /dev/null
+++ b/Documentation/devicetree/bindings/dma/renesas,shdma.txt
@@ -0,0 +1,84 @@
+* SHDMA Device Tree bindings
+
+Sh-/r-mobile and R-Car systems often have multiple identical DMA controller
+instances, capable of serving any of a common set of DMA slave devices, using
+the same configuration. To describe this topology we require all compatible
+SHDMA DT nodes to be placed under a DMA multiplexer node. All such compatible
+DMAC instances have the same number of channels and use the same DMA
+descriptors. Therefore respective DMA DT bindings can also all be placed in the
+multiplexer node. Even if there is only one such DMAC instance on a system, it
+still has to be placed under such a multiplexer node.
+
+* DMA multiplexer
+
+Required properties:
+- compatible:	should be "renesas,shdma-mux"
+- #dma-cells:	should be <1>, see "dmas" property below
+
+Optional properties (currently unused):
+- dma-channels:	number of DMA channels
+- dma-requests:	number of DMA request signals
+
+* DMA controller
+
+Required properties:
+- compatible:	should be of the form "renesas,shdma-<soc>", where <soc> should
+		be replaced with the desired SoC model, e.g.
+		"renesas,shdma-r8a73a4" for the system DMAC on r8a73a4 SoC
+
+Example:
+	dmac: dma-multiplexer@0 {
+		compatible = "renesas,shdma-mux";
+		#dma-cells = <1>;
+		dma-channels = <20>;
+		dma-requests = <256>;
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		dma0: dma-controller@e6700020 {
+			compatible = "renesas,shdma-r8a73a4";
+			reg = <0 0xe6700020 0 0x89e0>;
+			interrupt-parent = <&gic>;
+			interrupts = <0 220 4
+					0 200 4
+					0 201 4
+					0 202 4
+					0 203 4
+					0 204 4
+					0 205 4
+					0 206 4
+					0 207 4
+					0 208 4
+					0 209 4
+					0 210 4
+					0 211 4
+					0 212 4
+					0 213 4
+					0 214 4
+					0 215 4
+					0 216 4
+					0 217 4
+					0 218 4
+					0 219 4>;
+			interrupt-names = "error",
+					"ch0", "ch1", "ch2", "ch3",
+					"ch4", "ch5", "ch6", "ch7",
+					"ch8", "ch9", "ch10", "ch11",
+					"ch12", "ch13", "ch14", "ch15",
+					"ch16", "ch17", "ch18", "ch19";
+		};
+	};
+
+* DMA client
+
+Required properties:
+- dmas:		a list of <[DMA multiplexer phandle] [MID/RID value]> pairs,
+		where MID/RID values are fixed handles, specified in the SoC
+		manual
+- dma-names:	a list of DMA channel names, one per "dmas" entry
+
+Example:
+	dmas = <&dmac 0xd1
+		&dmac 0xd2>;
+	dma-names = "tx", "rx";