diff options
author | Jae Hyun Yoo <jae.hyun.yoo@intel.com> | 2019-03-14 01:36:34 +0300 |
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committer | Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com> | 2021-11-05 10:22:07 +0300 |
commit | 3c73debcb0788e56e318bcb582b45c05fa57380b (patch) | |
tree | d9eb06d2c85cbbf199bebb28e06ca458f5140bf8 /Documentation/devicetree | |
parent | 6fb39e7bfaf427c315d157deb78406fa0f6736de (diff) | |
download | linux-3c73debcb0788e56e318bcb582b45c05fa57380b.tar.xz |
char: ipmi: Add clock control logic into Aspeed LPC KCS driver
If LPC KCS driver is registered ahead of lpc-ctrl module, LPC KCS
block will be enabled without heart beating of LCLK until lpc-ctrl
enables the LCLK. This issue causes improper handling on host
interrupts when the host sends interrupt in that time frame. Then
kernel eventually forcibly disables the interrupt with dumping
stack and printing a 'nobody cared this irq' message out.
To prevent this issue, all LPC sub-nodes should enable LCLK
individually so this patch adds clock control logic into the LPC
KCS driver.
Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com>
Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r-- | Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml index 4ff6fabfcb30..6a6e4f6a772c 100644 --- a/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml +++ b/Documentation/devicetree/bindings/ipmi/aspeed,ast2400-kcs-bmc.yaml @@ -40,6 +40,9 @@ properties: - description: ODR register - description: STR register + clocks: + minItems: 1 + aspeed,lpc-io-reg: $ref: '/schemas/types.yaml#/definitions/uint32-array' minItems: 1 @@ -74,6 +77,7 @@ properties: required: - compatible - interrupts + - clocks additionalProperties: false @@ -103,4 +107,5 @@ examples: aspeed,lpc-io-reg = <0xca2>; aspeed,lpc-interrupts = <11 IRQ_TYPE_LEVEL_LOW>; interrupts = <8>; + clocks = <&syscon ASPEED_CLK_GATE_LCLK>; }; |