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authorLinus Torvalds <torvalds@linux-foundation.org>2015-04-22 19:24:55 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2015-04-22 19:24:55 +0300
commit8b3c8ba3d8c2680dab5363a80c024965cac08b1e (patch)
tree18150efb36891e6e76e2cad89c1b2fcc5faeae93 /arch/arm/boot/dts/omap4.dtsi
parentd34dc4f9e88e4b6beefb819e4e743fd6160a9b75 (diff)
parent48c1078509b47b38802329028ccfd77783bcff99 (diff)
downloadlinux-8b3c8ba3d8c2680dab5363a80c024965cac08b1e.tar.xz
Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late changes from Olof Johansson: "We were expecting to sit on this branch through most of the merge window since the contents was merged into our tree late, but we ended up sitting on all of our contents so it can go in with the rest. The contents here is: - a large branch of cleanups of the CM/PRM blocks on OMAP. - a couple of patches plumbing up CM/PRM on OMAP5 and DRA7. - a branch with DT updates for Freescale i.MX. including some shuffling from .dts to .dtsi (include) files that causes a little churn" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (78 commits) ARM: OMAP2+: Fix booting with configs that don't have MFD_SYSCON ARM: OMAP4+: control: add support for initializing control module via DT ARM: dts: dra7: add minimal l4 bus layout with control module support ARM: dts: omap5: add minimal l4 bus layout with control module support ARM: OMAP4+: control: remove support for legacy pad read/write ARM: OMAP4: display: convert display to use syscon for dsi muxing ARM: dts: omap4: add minimal l4 bus layout with control module support ARM: dts: am4372: add minimal l4 bus layout with control module support ARM: dts: am43xx-epos-evm: fix pinmux node layout ARM: dts: am33xx: add minimal l4 bus layout with control module support ARM: dts: omap3: add minimal l4 bus layout with control module support ARM: dts: omap24xx: add minimal l4 bus layout with control module support ARM: OMAP2+: control: add syscon support for register accesses ARM: OMAP2+: id: cache omap_type value ARM: OMAP2+: control: remove API for getting control module base address ARM: OMAP2+: clock: add low-level support for regmap ARM: OMAP4+: PRM: get rid of cpu_is_omap44xx calls from interrupt init ARM: OMAP4+: PRM: setup prm_features from the PRM init time flags ARM: OMAP2+: CM: move SoC specific init calls within a generic API ARM: OMAP4+: PRM: determine prm_device_inst based on DT compatibility ...
Diffstat (limited to 'arch/arm/boot/dts/omap4.dtsi')
-rw-r--r--arch/arm/boot/dts/omap4.dtsi200
1 files changed, 121 insertions, 79 deletions
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index f2091d1c9c36..f884d6adb71e 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -124,99 +124,141 @@
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
- cm1: cm1@4a004000 {
- compatible = "ti,omap4-cm1";
- reg = <0x4a004000 0x2000>;
-
- cm1_clocks: clocks {
- #address-cells = <1>;
- #size-cells = <0>;
- };
+ l4_cfg: l4@4a000000 {
+ compatible = "ti,omap4-l4-cfg", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x4a000000 0x1000000>;
- cm1_clockdomains: clockdomains {
- };
- };
+ cm1: cm1@4000 {
+ compatible = "ti,omap4-cm1";
+ reg = <0x4000 0x2000>;
- prm: prm@4a306000 {
- compatible = "ti,omap4-prm";
- reg = <0x4a306000 0x3000>;
- interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ cm1_clocks: clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
- prm_clocks: clocks {
- #address-cells = <1>;
- #size-cells = <0>;
+ cm1_clockdomains: clockdomains {
+ };
};
- prm_clockdomains: clockdomains {
- };
- };
+ cm2: cm2@8000 {
+ compatible = "ti,omap4-cm2";
+ reg = <0x8000 0x3000>;
- cm2: cm2@4a008000 {
- compatible = "ti,omap4-cm2";
- reg = <0x4a008000 0x3000>;
+ cm2_clocks: clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
- cm2_clocks: clocks {
- #address-cells = <1>;
- #size-cells = <0>;
+ cm2_clockdomains: clockdomains {
+ };
};
- cm2_clockdomains: clockdomains {
+ omap4_scm_core: scm@2000 {
+ compatible = "ti,omap4-scm-core", "simple-bus";
+ reg = <0x2000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x2000 0x1000>;
+
+ scm_conf: scm_conf@0 {
+ compatible = "syscon";
+ reg = <0x0 0x800>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ };
};
- };
-
- scrm: scrm@4a30a000 {
- compatible = "ti,omap4-scrm";
- reg = <0x4a30a000 0x2000>;
- scrm_clocks: clocks {
+ omap4_padconf_core: scm@100000 {
+ compatible = "ti,omap4-scm-padconf-core",
+ "simple-bus";
#address-cells = <1>;
- #size-cells = <0>;
+ #size-cells = <1>;
+ ranges = <0 0x100000 0x1000>;
+
+ omap4_pmx_core: pinmux@40 {
+ compatible = "ti,omap4-padconf",
+ "pinctrl-single";
+ reg = <0x40 0x0196>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ pinctrl-single,register-width = <16>;
+ pinctrl-single,function-mask = <0x7fff>;
+ };
+
+ omap4_padconf_global: omap4_padconf_global@5a0 {
+ compatible = "syscon";
+ reg = <0x5a0 0x170>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pbias_regulator: pbias_regulator {
+ compatible = "ti,pbias-omap";
+ reg = <0x60 0x4>;
+ syscon = <&omap4_padconf_global>;
+ pbias_mmc_reg: pbias_mmc_omap4 {
+ regulator-name = "pbias_mmc_omap4";
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3000000>;
+ };
+ };
+ };
};
- scrm_clockdomains: clockdomains {
- };
- };
-
- counter32k: counter@4a304000 {
- compatible = "ti,omap-counter32k";
- reg = <0x4a304000 0x20>;
- ti,hwmods = "counter_32k";
- };
-
- omap4_pmx_core: pinmux@4a100040 {
- compatible = "ti,omap4-padconf", "pinctrl-single";
- reg = <0x4a100040 0x0196>;
- #address-cells = <1>;
- #size-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-controller;
- pinctrl-single,register-width = <16>;
- pinctrl-single,function-mask = <0x7fff>;
- };
- omap4_pmx_wkup: pinmux@4a31e040 {
- compatible = "ti,omap4-padconf", "pinctrl-single";
- reg = <0x4a31e040 0x0038>;
- #address-cells = <1>;
- #size-cells = <0>;
- #interrupt-cells = <1>;
- interrupt-controller;
- pinctrl-single,register-width = <16>;
- pinctrl-single,function-mask = <0x7fff>;
- };
-
- omap4_padconf_global: tisyscon@4a1005a0 {
- compatible = "syscon";
- reg = <0x4a1005a0 0x170>;
- };
-
- pbias_regulator: pbias_regulator {
- compatible = "ti,pbias-omap";
- reg = <0x60 0x4>;
- syscon = <&omap4_padconf_global>;
- pbias_mmc_reg: pbias_mmc_omap4 {
- regulator-name = "pbias_mmc_omap4";
- regulator-min-microvolt = <1800000>;
- regulator-max-microvolt = <3000000>;
+ l4_wkup: l4@300000 {
+ compatible = "ti,omap4-l4-wkup", "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x300000 0x40000>;
+
+ counter32k: counter@4000 {
+ compatible = "ti,omap-counter32k";
+ reg = <0x4000 0x20>;
+ ti,hwmods = "counter_32k";
+ };
+
+ prm: prm@6000 {
+ compatible = "ti,omap4-prm";
+ reg = <0x6000 0x3000>;
+ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+
+ prm_clocks: clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ prm_clockdomains: clockdomains {
+ };
+ };
+
+ scrm: scrm@a000 {
+ compatible = "ti,omap4-scrm";
+ reg = <0xa000 0x2000>;
+
+ scrm_clocks: clocks {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ scrm_clockdomains: clockdomains {
+ };
+ };
+
+ omap4_pmx_wkup: pinmux@1e040 {
+ compatible = "ti,omap4-padconf",
+ "pinctrl-single";
+ reg = <0x1e040 0x0038>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #interrupt-cells = <1>;
+ interrupt-controller;
+ pinctrl-single,register-width = <16>;
+ pinctrl-single,function-mask = <0x7fff>;
+ };
};
};