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authorKrzysztof Hałasa <khc@pm.waw.pl>2009-11-17 20:48:23 +0300
committerKrzysztof Hałasa <khc@pm.waw.pl>2009-12-05 18:58:41 +0300
commit8d3fdf31dd2066533861bb57ed7df1ae1b1f5fcc (patch)
tree5186d63c67dee5454348e55cf46d31053672d67d /arch/arm/mach-ixp4xx/coyote-pci.c
parenta8b7b34075f693632cd1483b817d4211c7a63257 (diff)
downloadlinux-8d3fdf31dd2066533861bb57ed7df1ae1b1f5fcc.tar.xz
IXP4xx: Introduce IXP4XX_GPIO_IRQ(n) macro and convert IXP4xx platform files.
Signed-off-by: Krzysztof Hałasa <khc@pm.waw.pl>
Diffstat (limited to 'arch/arm/mach-ixp4xx/coyote-pci.c')
-rw-r--r--arch/arm/mach-ixp4xx/coyote-pci.c24
1 files changed, 10 insertions, 14 deletions
diff --git a/arch/arm/mach-ixp4xx/coyote-pci.c b/arch/arm/mach-ixp4xx/coyote-pci.c
index 624f8fe83c45..b978ea8bd6f0 100644
--- a/arch/arm/mach-ixp4xx/coyote-pci.c
+++ b/arch/arm/mach-ixp4xx/coyote-pci.c
@@ -23,30 +23,26 @@
#include <asm/irq.h>
#include <asm/mach/pci.h>
-#define COYOTE_PCI_SLOT0_DEVID 14
-#define COYOTE_PCI_SLOT1_DEVID 15
+#define SLOT0_DEVID 14
+#define SLOT1_DEVID 15
/* PCI controller GPIO to IRQ pin mappings */
-#define COYOTE_PCI_SLOT0_PIN 6
-#define COYOTE_PCI_SLOT1_PIN 11
-
-#define IRQ_COYOTE_PCI_SLOT0 IRQ_IXP4XX_GPIO6
-#define IRQ_COYOTE_PCI_SLOT1 IRQ_IXP4XX_GPIO11
+#define SLOT0_INTA 6
+#define SLOT1_INTA 11
void __init coyote_pci_preinit(void)
{
- set_irq_type(IRQ_COYOTE_PCI_SLOT0, IRQ_TYPE_LEVEL_LOW);
- set_irq_type(IRQ_COYOTE_PCI_SLOT1, IRQ_TYPE_LEVEL_LOW);
-
+ set_irq_type(IXP4XX_GPIO_IRQ(SLOT0_INTA), IRQ_TYPE_LEVEL_LOW);
+ set_irq_type(IXP4XX_GPIO_IRQ(SLOT1_INTA), IRQ_TYPE_LEVEL_LOW);
ixp4xx_pci_preinit();
}
static int __init coyote_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
{
- if (slot == COYOTE_PCI_SLOT0_DEVID)
- return IRQ_COYOTE_PCI_SLOT0;
- else if (slot == COYOTE_PCI_SLOT1_DEVID)
- return IRQ_COYOTE_PCI_SLOT1;
+ if (slot == SLOT0_DEVID)
+ return IXP4XX_GPIO_IRQ(SLOT0_INTA);
+ else if (slot == SLOT1_DEVID)
+ return IXP4XX_GPIO_IRQ(SLOT1_INTA);
else return -1;
}