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authorAaro Koskinen <aaro.koskinen@iki.fi>2009-07-31 13:16:21 +0400
committerDan Williams <dan.j.williams@intel.com>2009-08-19 00:48:35 +0400
commit5b9eda3313b678f20f2bec08e8173f93e85f6c14 (patch)
tree13cf97fa4901f5c32446564cb914fce6947a8cee /arch/arm/plat-iop
parent9e2a7e6f5f1091965c78e01e87af05607bbf937f (diff)
downloadlinux-5b9eda3313b678f20f2bec08e8173f93e85f6c14.tar.xz
iop3xx: ATU and PCI memory configuration corrected
There are two 64 MB outbound memory windows at bus addresses 0x80000000..0x83ffffff and 0x84000000..0x87ffffff for PCI memory. Currently, on iop32x, only the lower window is available for allocations, limiting the available space to 64 MB. On iop33x the full 128 MB can be allocated, but the translation value is wrong for the upper window. The patch enables the full 128 MB space on iop32x and corrects the initialization of OMWTVR1. Redundant definitions are deleted. Tested using a Thecus N2100 board with a graphics adapter in the expansion slot. Both windows are in use: 00:05.0 VGA compatible controller: XGI Technology Inc. (eXtreme Graphics Innovation) Volari Z7 (prog-if 00 [VGA controller]) [...] Region 0: Memory at 80000000 (32-bit, prefetchable) [size=64M] Region 1: Memory at 84080000 (32-bit, non-prefetchable) [size=256K] Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Cc: Lennert Buytenhek <kernel@wantstofly.org> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'arch/arm/plat-iop')
-rw-r--r--arch/arm/plat-iop/pci.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/plat-iop/pci.c b/arch/arm/plat-iop/pci.c
index 77fa7cc7d162..ce31f316ac75 100644
--- a/arch/arm/plat-iop/pci.c
+++ b/arch/arm/plat-iop/pci.c
@@ -257,7 +257,8 @@ void __init iop3xx_atu_setup(void)
*IOP3XX_OUMWTVR0 = 0;
/* Outbound window 1 */
- *IOP3XX_OMWTVR1 = IOP3XX_PCI_LOWER_MEM_BA + IOP3XX_PCI_MEM_WINDOW_SIZE;
+ *IOP3XX_OMWTVR1 = IOP3XX_PCI_LOWER_MEM_BA +
+ IOP3XX_PCI_MEM_WINDOW_SIZE / 2;
*IOP3XX_OUMWTVR1 = 0;
/* BAR 3 ( Disabled ) */