diff options
| author | Caleb Connolly <caleb@connolly.tech> | 2021-03-21 20:46:21 +0300 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2021-03-30 06:44:50 +0300 |
| commit | 9cf3ebd16eae7957d15e1c08944054fe9035ca8b (patch) | |
| tree | 4593c44d330ccb5cd2dc22e60500bd903c4a9973 /arch/arm64/boot/dts/qcom/sm8150.dtsi | |
| parent | 888771a9d04ff7bf96e5ecad37969002c88a95d7 (diff) | |
| download | linux-9cf3ebd16eae7957d15e1c08944054fe9035ca8b.tar.xz | |
arm64: dts: qcom: sm8150: add other QUP nodes and iommus
Add the first and third qupv3 nodes used to hook
up peripherals on some devices, as well as the iommus properties for all
of them.
Signed-off-by: Caleb Connolly <caleb@connolly.tech>
Link: https://lore.kernel.org/r/20210321174522.123036-2-caleb@connolly.tech
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sm8150.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sm8150.dtsi | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 778613d3410b..01b3f14ff452 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -577,12 +577,26 @@ <&sleep_clk>; }; + qupv3_id_0: geniqup@8c0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x0 0x008c0000 0x0 0x6000>; + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; + iommus = <&apps_smmu 0xc3 0x0>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + }; + qupv3_id_1: geniqup@ac0000 { compatible = "qcom,geni-se-qup"; reg = <0x0 0x00ac0000 0x0 0x6000>; clock-names = "m-ahb", "s-ahb"; clocks = <&gcc GCC_QUPV3_WRAP_1_M_AHB_CLK>, <&gcc GCC_QUPV3_WRAP_1_S_AHB_CLK>; + iommus = <&apps_smmu 0x603 0x0>; #address-cells = <2>; #size-cells = <2>; ranges; @@ -598,6 +612,20 @@ }; }; + qupv3_id_2: geniqup@cc0000 { + compatible = "qcom,geni-se-qup"; + reg = <0x0 0x00cc0000 0x0 0x6000>; + + clock-names = "m-ahb", "s-ahb"; + clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, + <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; + iommus = <&apps_smmu 0x7a3 0x0>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "disabled"; + }; + config_noc: interconnect@1500000 { compatible = "qcom,sm8150-config-noc"; reg = <0 0x01500000 0 0x7400>; |