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| author | Takashi Iwai <tiwai@suse.de> | 2019-09-10 14:03:08 +0300 |
|---|---|---|
| committer | Takashi Iwai <tiwai@suse.de> | 2019-09-10 14:03:08 +0300 |
| commit | 7711fb7dac1ab77fd1b4d948f4647a569e4a1ae2 (patch) | |
| tree | dd35ad21e0eb13572757dab279ae41f6d953baed /arch/arm64/include/asm/arch_gicv3.h | |
| parent | 789492f0c86505e63369907bcb1afdf52dec9366 (diff) | |
| parent | bb831786117519fc16dfd3eaa7b84e4f6bbb8d99 (diff) | |
| download | linux-7711fb7dac1ab77fd1b4d948f4647a569e4a1ae2.tar.xz | |
Merge tag 'asoc-v5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-next
ASoC: Updates for v5.4
Quite a big update this time around, particularly in the core
where we've had a lot of cleanups from Morimoto-san - there's
not much functional change but quite a bit of modernization
going on. We've also seen a lot of driver work, a lot of it
cleanups but also some particular drivers.
- Lots and lots of cleanups from Morimoto-san and Yue Haibing.
- Lots of cleanups and enhancements to the Freescale, sunxi dnd
Intel rivers.
- Initial Sound Open Firmware suppot for i.MX8.
- Removal of w90x900 and nuc900 drivers as the platforms are
being removed.
- New support for Cirrus Logic CS47L15 and CS47L92, Freescale
i.MX 7ULP and 8MQ, Meson G12A and NXP UDA1334
Diffstat (limited to 'arch/arm64/include/asm/arch_gicv3.h')
| -rw-r--r-- | arch/arm64/include/asm/arch_gicv3.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/arch_gicv3.h b/arch/arm64/include/asm/arch_gicv3.h index 79155a8cfe7c..89e4c8b79349 100644 --- a/arch/arm64/include/asm/arch_gicv3.h +++ b/arch/arm64/include/asm/arch_gicv3.h @@ -155,6 +155,12 @@ static inline void gic_pmr_mask_irqs(void) BUILD_BUG_ON(GICD_INT_DEF_PRI < (GIC_PRIO_IRQOFF | GIC_PRIO_PSR_I_SET)); BUILD_BUG_ON(GICD_INT_DEF_PRI >= GIC_PRIO_IRQON); + /* + * Need to make sure IRQON allows IRQs when SCR_EL3.FIQ is cleared + * and non-secure PMR accesses are not subject to the shifts that + * are applied to IRQ priorities + */ + BUILD_BUG_ON((0x80 | (GICD_INT_DEF_PRI >> 1)) >= GIC_PRIO_IRQON); gic_write_pmr(GIC_PRIO_IRQOFF); } |