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authorWill Deacon <will.deacon@arm.com>2017-07-07 19:01:50 +0300
committerWill Deacon <will.deacon@arm.com>2017-07-20 12:20:54 +0300
commit32fb5d73c98b079e7c815b62e9d88a39ff8ce509 (patch)
treee7624355431132782ebf5e66404291c026eca667 /arch/arm64/include/asm/atomic_lse.h
parentc396fe7f0c2efdf6c02d723f7bd492c58725c822 (diff)
downloadlinux-32fb5d73c98b079e7c815b62e9d88a39ff8ce509.tar.xz
arm64: atomics: Remove '&' from '+&' asm constraint in lse atomics
The lse implementation of atomic64_dec_if_positive uses the '+&' constraint, but the '&' is redundant and confusing in this case, since early clobber on a read/write operand is a strange concept. Replace the constraint with '+'. Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/atomic_lse.h')
-rw-r--r--arch/arm64/include/asm/atomic_lse.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/atomic_lse.h b/arch/arm64/include/asm/atomic_lse.h
index 99fa69c9c3cf..9ef0797380cb 100644
--- a/arch/arm64/include/asm/atomic_lse.h
+++ b/arch/arm64/include/asm/atomic_lse.h
@@ -435,7 +435,7 @@ static inline long atomic64_dec_if_positive(atomic64_t *v)
" sub x30, x30, %[ret]\n"
" cbnz x30, 1b\n"
"2:")
- : [ret] "+&r" (x0), [v] "+Q" (v->counter)
+ : [ret] "+r" (x0), [v] "+Q" (v->counter)
:
: __LL_SC_CLOBBERS, "cc", "memory");