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authorPaul Walmsley <paul.walmsley@sifive.com>2019-05-20 19:19:41 +0300
committerPaul Walmsley <paul.walmsley@sifive.com>2019-06-17 12:04:10 +0300
commitc35f1b87fc595807ff15d2834d241f9771497205 (patch)
tree2682e7ae0a701b158505bc1123a4745cc0f61d65 /arch/riscv/mm
parent72296bde4f4207566872ee355950a59cbc29f852 (diff)
downloadlinux-c35f1b87fc595807ff15d2834d241f9771497205.tar.xz
riscv: dts: add initial board data for the SiFive HiFive Unleashed
Add initial board data for the SiFive HiFive Unleashed A00. Currently the data populated in this DT file describes the board DRAM configuration and the external clock sources that supply the PRCI. Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Tested-by: Loys Ollivier <lollivier@baylibre.com> Tested-by: Kevin Hilman <khilman@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Antony Pavlov <antonynpavlov@gmail.com> Cc: devicetree@vger.kernel.org Cc: linux-riscv@lists.infradead.org Cc: linux-kernel@vger.kernel.org
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