summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/i915/display
diff options
context:
space:
mode:
authorImre Deak <imre.deak@intel.com>2020-06-16 17:18:54 +0300
committerImre Deak <imre.deak@intel.com>2020-06-23 10:12:35 +0300
commit90d4f99ac56b4aadf4e87871a4e9128474da259b (patch)
treec52ec071ec6b854fd83c021bc27449497a43c934 /drivers/gpu/drm/i915/display
parent3d289d2578eff2a274fc5e63fca2a611404a3003 (diff)
downloadlinux-90d4f99ac56b4aadf4e87871a4e9128474da259b.tar.xz
drm/i915/dp_mst: Clear the ACT sent flag during encoder disabling too
During encoder enabling we clear the flag before starting the ACT sequence and wait for the flag, but the clearing is missing during encoder disabling, add it there too. Since nothing cleared the flag automatically we could've run subsequent disabling steps too early. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20200616141855.746-5-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display')
-rw-r--r--drivers/gpu/drm/i915/display/intel_dp_mst.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 2ee538d99ba7..e1bc14139f46 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -390,6 +390,8 @@ static void intel_mst_post_disable_dp(struct intel_atomic_state *state,
drm_dp_update_payload_part2(&intel_dp->mst_mgr);
+ clear_act_sent(intel_dp);
+
val = intel_de_read(dev_priv,
TRANS_DDI_FUNC_CTL(old_crtc_state->cpu_transcoder));
val &= ~TRANS_DDI_DP_VC_PAYLOAD_ALLOC;