diff options
| author | Madhav Chauhan <madhav.chauhan@intel.com> | 2018-10-15 17:27:59 +0300 |
|---|---|---|
| committer | Jani Nikula <jani.nikula@intel.com> | 2018-10-22 09:45:16 +0300 |
| commit | d364dc66e2d5afdd825f79b70d8d81d287b2524a (patch) | |
| tree | a1b8acd37da102c45c7a6edd6634f69033af0114 /drivers/gpu/drm/i915/intel_dsi.h | |
| parent | 5ffce2546233e0adeb48c752e4e828acd0a4a4a0 (diff) | |
| download | linux-d364dc66e2d5afdd825f79b70d8d81d287b2524a.tar.xz | |
drm/i915/icl: Configure DSI transcoders
This patch programs DSI operation mode, pixel format,
BGR info, link calibration etc for the DSI transcoder.
This patch also extract BGR info of the DSI panel from
VBT and save it inside struct intel_dsi which used for
configuring DSI transcoder.
v2: Rebase
v3: Use newly defined bitfields.
v4 by Jani:
- Use intel_dsi_bitrate()
- Make bgr_enabled bool
- Use 0 instead of 0x0
- Replace DRM_ERROR() with MISSING_CASE() on pixel format and video mode
- Use is_vid_mode()
Signed-off-by: Madhav Chauhan <madhav.chauhan@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/7de4e39a4b2a18e53a2b9d9cea5b5b4c9d6eeb34.1539613303.git.jani.nikula@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/intel_dsi.h')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_dsi.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dsi.h b/drivers/gpu/drm/i915/intel_dsi.h index 12b758ebefce..14567929de9a 100644 --- a/drivers/gpu/drm/i915/intel_dsi.h +++ b/drivers/gpu/drm/i915/intel_dsi.h @@ -81,6 +81,9 @@ struct intel_dsi { u16 dcs_backlight_ports; u16 dcs_cabc_ports; + /* RGB or BGR */ + bool bgr_enabled; + u8 pixel_overlap; u32 port_bits; u32 bw_timer; |