diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-04-16 20:10:04 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2021-04-21 01:23:46 +0300 |
| commit | 708de86e10e59352eb57a3ad6a5a524d8f5c9f13 (patch) | |
| tree | 4bbef9eea1d05624bed43c66cc56ec3e889c5816 /drivers/gpu/drm/i915/intel_pm.c | |
| parent | 103b8cbac28ea2965f24ca52e6a92d76d3851b3c (diff) | |
| download | linux-708de86e10e59352eb57a3ad6a5a524d8f5c9f13.tar.xz | |
drm/i915: Collect dbuf device info into a sub-struct
Collect the related dbuf information into a struct.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210416171011.19012-2-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_pm.c')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_pm.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 105bce19d1df..02d64db2c591 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -3637,10 +3637,10 @@ bool ilk_disable_lp_wm(struct drm_i915_private *dev_priv) u8 intel_enabled_dbuf_slices_mask(struct drm_i915_private *dev_priv) { int i; - int max_slices = INTEL_INFO(dev_priv)->num_supported_dbuf_slices; + int num_slices = INTEL_INFO(dev_priv)->dbuf.num_slices; u8 enabled_slices_mask = 0; - for (i = 0; i < max_slices; i++) { + for (i = 0; i < num_slices; i++) { if (intel_uncore_read(&dev_priv->uncore, DBUF_CTL_S(i)) & DBUF_POWER_STATE) enabled_slices_mask |= BIT(i); } @@ -4030,7 +4030,7 @@ static int intel_compute_sagv_mask(struct intel_atomic_state *state) static int intel_dbuf_size(struct drm_i915_private *dev_priv) { - int ddb_size = INTEL_INFO(dev_priv)->ddb_size; + int ddb_size = INTEL_INFO(dev_priv)->dbuf.size; drm_WARN_ON(&dev_priv->drm, ddb_size == 0); @@ -4043,7 +4043,7 @@ static int intel_dbuf_size(struct drm_i915_private *dev_priv) static int intel_dbuf_slice_size(struct drm_i915_private *dev_priv) { return intel_dbuf_size(dev_priv) / - INTEL_INFO(dev_priv)->num_supported_dbuf_slices; + INTEL_INFO(dev_priv)->dbuf.num_slices; } static void @@ -4070,8 +4070,8 @@ u32 skl_ddb_dbuf_slice_mask(struct drm_i915_private *dev_priv, { u32 slice_mask = 0; u16 ddb_size = intel_dbuf_size(dev_priv); - u16 num_supported_slices = INTEL_INFO(dev_priv)->num_supported_dbuf_slices; - u16 slice_size = ddb_size / num_supported_slices; + int num_slices = INTEL_INFO(dev_priv)->dbuf.num_slices; + u16 slice_size = ddb_size / num_slices; u16 start_slice; u16 end_slice; @@ -5828,7 +5828,7 @@ skl_compute_ddb(struct intel_atomic_state *state) "Enabled dbuf slices 0x%x -> 0x%x (out of %d dbuf slices)\n", old_dbuf_state->enabled_slices, new_dbuf_state->enabled_slices, - INTEL_INFO(dev_priv)->num_supported_dbuf_slices); + INTEL_INFO(dev_priv)->dbuf.num_slices); } for_each_new_intel_crtc_in_state(state, crtc, new_crtc_state, i) { |