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authorWill Deacon <will.deacon@arm.com>2014-11-14 20:18:23 +0300
committerWill Deacon <will.deacon@arm.com>2015-01-19 17:46:44 +0300
commite1d3c0fd701df831169b116cd5c5d6203ac07f70 (patch)
treeeb2537042682bf45a36148d06bb0bfb10ce3da74 /drivers/iommu/io-pgtable.c
parentfdb1d7be7c4d452e9735aeb2b60ae8a2fcf0a514 (diff)
downloadlinux-e1d3c0fd701df831169b116cd5c5d6203ac07f70.tar.xz
iommu: add ARM LPAE page table allocator
A number of IOMMUs found in ARM SoCs can walk architecture-compatible page tables. This patch adds a generic allocator for Stage-1 and Stage-2 v7/v8 long-descriptor page tables. 4k, 16k and 64k pages are supported, with up to 4-levels of walk to cover a 48-bit address space. Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'drivers/iommu/io-pgtable.c')
-rw-r--r--drivers/iommu/io-pgtable.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/iommu/io-pgtable.c b/drivers/iommu/io-pgtable.c
index f664a1ca49cf..6436fe24bc2f 100644
--- a/drivers/iommu/io-pgtable.c
+++ b/drivers/iommu/io-pgtable.c
@@ -24,9 +24,20 @@
#include "io-pgtable.h"
+extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s1_init_fns;
+extern struct io_pgtable_init_fns io_pgtable_arm_32_lpae_s2_init_fns;
+extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s1_init_fns;
+extern struct io_pgtable_init_fns io_pgtable_arm_64_lpae_s2_init_fns;
+
static const struct io_pgtable_init_fns *
io_pgtable_init_table[IO_PGTABLE_NUM_FMTS] =
{
+#ifdef CONFIG_IOMMU_IO_PGTABLE_LPAE
+ [ARM_32_LPAE_S1] = &io_pgtable_arm_32_lpae_s1_init_fns,
+ [ARM_32_LPAE_S2] = &io_pgtable_arm_32_lpae_s2_init_fns,
+ [ARM_64_LPAE_S1] = &io_pgtable_arm_64_lpae_s1_init_fns,
+ [ARM_64_LPAE_S2] = &io_pgtable_arm_64_lpae_s2_init_fns,
+#endif
};
struct io_pgtable_ops *alloc_io_pgtable_ops(enum io_pgtable_fmt fmt,