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authorAnup Patel <anup.patel@wdc.com>2020-06-01 12:15:41 +0300
committerPalmer Dabbelt <palmerdabbelt@google.com>2020-06-10 05:11:22 +0300
commit033a65de7eced89f62d2cd166b1ee2d33af4f1e4 (patch)
tree793a3f57cb982fad7b31cc64df4fe73c1538a46e /drivers/irqchip/irq-riscv-intc.c
parent6b7ce8927b5a4d739670d4dc0de301f2abfd9a5c (diff)
downloadlinux-033a65de7eced89f62d2cd166b1ee2d33af4f1e4.tar.xz
clocksource/drivers/timer-riscv: Use per-CPU timer interrupt
Instead of directly calling RISC-V timer interrupt handler from RISC-V local interrupt conntroller driver, this patch implements RISC-V timer interrupt as a per-CPU interrupt using per-CPU APIs of Linux IRQ subsystem. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
Diffstat (limited to 'drivers/irqchip/irq-riscv-intc.c')
-rw-r--r--drivers/irqchip/irq-riscv-intc.c8
1 files changed, 0 insertions, 8 deletions
diff --git a/drivers/irqchip/irq-riscv-intc.c b/drivers/irqchip/irq-riscv-intc.c
index a80fb1731c50..a6f97fa6ff69 100644
--- a/drivers/irqchip/irq-riscv-intc.c
+++ b/drivers/irqchip/irq-riscv-intc.c
@@ -21,20 +21,12 @@ static struct irq_domain *intc_domain;
static asmlinkage void riscv_intc_irq(struct pt_regs *regs)
{
- struct pt_regs *old_regs;
unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG;
if (unlikely(cause >= BITS_PER_LONG))
panic("unexpected interrupt cause");
switch (cause) {
- case RV_IRQ_TIMER:
- old_regs = set_irq_regs(regs);
- irq_enter();
- riscv_timer_interrupt();
- irq_exit();
- set_irq_regs(old_regs);
- break;
#ifdef CONFIG_SMP
case RV_IRQ_SOFT:
/*