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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2016-11-15 13:37:04 +0300
committerLee Jones <lee.jones@linaro.org>2016-11-29 11:21:36 +0300
commit85a9419a254e234c997a2bf56b71264009ebc117 (patch)
tree04e458302085ac63b7a643664b8bb91f144360ae /drivers/mfd/intel-lpss-pci.c
parentc5e589a171728c9f5c587f9254ec6b343153c2ce (diff)
downloadlinux-85a9419a254e234c997a2bf56b71264009ebc117.tar.xz
mfd: intel-lpss: Try to enable Memory-Write-Invalidate
Enable MWI mechanism if PCI bus master supports it. It might be potential benefit in some cases. Documentation [1] says that standard Memory Write might supply more current data than in the CPU modified cache line and "trashing a line in the cache may trash some data that is more current that in the memory line". This allows to avoid potential retries and other performance degradation issues on the bus. [1] PCI System Architecture, 4th edition, ISBN: 0-201-30974-2, pp.117-119. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'drivers/mfd/intel-lpss-pci.c')
-rw-r--r--drivers/mfd/intel-lpss-pci.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/mfd/intel-lpss-pci.c b/drivers/mfd/intel-lpss-pci.c
index 3228fd182a99..4f561869b966 100644
--- a/drivers/mfd/intel-lpss-pci.c
+++ b/drivers/mfd/intel-lpss-pci.c
@@ -41,6 +41,7 @@ static int intel_lpss_pci_probe(struct pci_dev *pdev,
/* Probably it is enough to set this for iDMA capable devices only */
pci_set_master(pdev);
+ pci_try_set_mwi(pdev);
ret = intel_lpss_probe(&pdev->dev, info);
if (ret)