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authorSunil Goutham <sgoutham@marvell.com>2018-10-10 15:44:29 +0300
committerDavid S. Miller <davem@davemloft.net>2018-10-10 20:06:02 +0300
commit756051e23cce593ced6c637c1b5a793d68164597 (patch)
tree06770af7c9bd85f2cf3cabb9b8f5b4a5dfec2417 /drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
parent746ea74241fa04f7a8c3146adc08b618d88681e2 (diff)
downloadlinux-756051e23cce593ced6c637c1b5a793d68164597.tar.xz
octeontx2-af: Configure block LF's MSIX vector offset
Firmware configures a certain number of MSIX vectors to each of enabled RVU PF/VF. When a block LF is attached to a PF/VF, number of MSIX vectors needed by that LF are set aside (out of PF/VF's total MSIX vectors) and LF's msix_offset is configured in HW. Also added support for a RVU PF/VF to retrieve that block LF's MSIX vector offset information from AF via mbox. Signed-off-by: Sunil Goutham <sgoutham@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h')
-rw-r--r--drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
index eb5cd1ecac1a..92e05817ffe7 100644
--- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
+++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h
@@ -54,6 +54,7 @@ enum rvu_af_int_vec_e {
RVU_AF_INT_VEC_PFME = 0x2,
RVU_AF_INT_VEC_GEN = 0x3,
RVU_AF_INT_VEC_MBOX = 0x4,
+ RVU_AF_INT_VEC_CNT = 0x5,
};
/**
@@ -67,6 +68,7 @@ enum rvu_pf_int_vec_e {
RVU_PF_INT_VEC_VFPF_MBOX0 = 0x4,
RVU_PF_INT_VEC_VFPF_MBOX1 = 0x5,
RVU_PF_INT_VEC_AFPF_MBOX = 0x6,
+ RVU_PF_INT_VEC_CNT = 0x7,
};
#endif /* RVU_STRUCT_H */