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author | Aviv Heller <avivh@mellanox.com> | 2016-05-10 13:47:50 +0300 |
---|---|---|
committer | Leon Romanovsky <leon@kernel.org> | 2016-08-18 18:49:53 +0300 |
commit | 84df61ebc69bdc466180e02d654e9b0284781288 (patch) | |
tree | cc732b7f9c61ca55251cb5a142d61400fa93501e /drivers/net/ethernet/mellanox/mlx5/core/cmd.c | |
parent | d5beb7f2aff4a60237fd97a98d49a78c9045b8f2 (diff) | |
download | linux-84df61ebc69bdc466180e02d654e9b0284781288.tar.xz |
net/mlx5: Add HW interfaces used by LAG
Exposed LAG commands enum and layouts:
- CREATE_LAG
HW enters LAG mode:
RoCE traffic from port two is received on PF0 core dev.
Allows to set tx_affinity (tx port) for QPs and TISes.
Allows to port remap QPs and TISes, overriding their
tx_affinity behavior.
- MODIFY_LAG
Remap QPs and TISes to another port.
- QUERY_LAG
Query whether LAG mode is active.
- DESTROY_LAG
HW exits LAG mode, returning to non-LAG behavior.
- CREATE_VPORT_LAG
Merge Ethernet flow steering, such that traffic received on port
two jumps to PF0 root flow table.
Available only in LAG mode.
- DESTROY_VPORT_LAG
Ethernet flow steering returns to non-LAG behavior.
Caps added:
- lag_master
Driver is in charge of managing the LAG.
This is currently the only option.
- num_lag_ports
LAG is supported only if this field's value is 2.
Other fields:
- QP/TIS tx port affinity
During LAG, this field controls on which port a QP or TIS resides.
- TIS strict tx affinity
When this field is set, the TIS will not be subject to port remap by
CREATE_LAG/MODIFY_LAG.
- LAG demux flow table
Flow table used for redirecting non user-space traffic back to
PF1 root flow table, if the packet was received on port two.
Signed-off-by: Aviv Heller <avivh@mellanox.com>
Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx5/core/cmd.c')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/cmd.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c index 00bec609aae2..6388bc0d9b97 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c @@ -285,6 +285,8 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, case MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN: case MLX5_CMD_OP_DELETE_VXLAN_UDP_DPORT: case MLX5_CMD_OP_DELETE_L2_TABLE_ENTRY: + case MLX5_CMD_OP_DESTROY_LAG: + case MLX5_CMD_OP_DESTROY_VPORT_LAG: case MLX5_CMD_OP_DESTROY_TIR: case MLX5_CMD_OP_DESTROY_SQ: case MLX5_CMD_OP_DESTROY_RQ: @@ -376,6 +378,10 @@ static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, case MLX5_CMD_OP_ADD_VXLAN_UDP_DPORT: case MLX5_CMD_OP_SET_L2_TABLE_ENTRY: case MLX5_CMD_OP_QUERY_L2_TABLE_ENTRY: + case MLX5_CMD_OP_CREATE_LAG: + case MLX5_CMD_OP_MODIFY_LAG: + case MLX5_CMD_OP_QUERY_LAG: + case MLX5_CMD_OP_CREATE_VPORT_LAG: case MLX5_CMD_OP_CREATE_TIR: case MLX5_CMD_OP_MODIFY_TIR: case MLX5_CMD_OP_QUERY_TIR: @@ -514,6 +520,12 @@ const char *mlx5_command_str(int command) MLX5_COMMAND_STR_CASE(DELETE_L2_TABLE_ENTRY); MLX5_COMMAND_STR_CASE(SET_WOL_ROL); MLX5_COMMAND_STR_CASE(QUERY_WOL_ROL); + MLX5_COMMAND_STR_CASE(CREATE_LAG); + MLX5_COMMAND_STR_CASE(MODIFY_LAG); + MLX5_COMMAND_STR_CASE(QUERY_LAG); + MLX5_COMMAND_STR_CASE(DESTROY_LAG); + MLX5_COMMAND_STR_CASE(CREATE_VPORT_LAG); + MLX5_COMMAND_STR_CASE(DESTROY_VPORT_LAG); MLX5_COMMAND_STR_CASE(CREATE_TIR); MLX5_COMMAND_STR_CASE(MODIFY_TIR); MLX5_COMMAND_STR_CASE(DESTROY_TIR); |