diff options
| author | Hongzhou Yang <hongzhou.yang@mediatek.com> | 2015-05-19 09:11:16 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2015-05-19 12:15:03 +0300 |
| commit | 25d76b21b1b959b37520931fb6c4b8319a021705 (patch) | |
| tree | 071a50b956a6406b295b305258a818b2e48660b9 /drivers/pinctrl/mediatek/pinctrl-mtk-common.h | |
| parent | e73fe2713fc9e8ab8d2d039abc48f7684b60f5ac (diff) | |
| download | linux-25d76b21b1b959b37520931fb6c4b8319a021705.tar.xz | |
pinctrl: mediatek: add ies/smt control to common code.
Input enable and smt setting have different register,
modify code to fix it.
Several mediatek soc use similar input enable/smt setting
procedure as mt8173, some soc use generic input enable/smt
setting, some soc has no input enable/smt setting. Adding
common code to handle all those cases, so future soc driver
can use it.
Signed-off-by: Hongzhou Yang <hongzhou.yang@mediatek.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/pinctrl/mediatek/pinctrl-mtk-common.h')
| -rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mtk-common.h | 31 |
1 files changed, 30 insertions, 1 deletions
diff --git a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h index 2a4b7bee4564..c703e7d09025 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mtk-common.h +++ b/drivers/pinctrl/mediatek/pinctrl-mtk-common.h @@ -17,6 +17,7 @@ #include <linux/pinctrl/pinctrl.h> #include <linux/regmap.h> +#include <linux/pinctrl/pinconf-generic.h> #define NO_EINT_SUPPORT 255 #define MT_EDGE_SENSITIVE 0 @@ -25,6 +26,8 @@ #define EINT_DBNC_RST_BIT (0x1 << 1) #define EINT_DBNC_SET_EN (0x1 << 0) +#define MTK_PINCTRL_NOT_SUPPORT (0xffff) + struct mtk_desc_function { const char *name; unsigned char muxval; @@ -143,6 +146,28 @@ struct mtk_pin_spec_pupd_set_samereg { .r0_bit = _r0, \ } +/** + * struct mtk_pin_ies_set - For special pins' ies and smt setting. + * @start: The start pin number of those special pins. + * @end: The end pin number of those special pins. + * @offset: The offset of special setting register. + * @bit: The bit of special setting register. + */ +struct mtk_pin_ies_smt_set { + unsigned short start; + unsigned short end; + unsigned short offset; + unsigned char bit; +}; + +#define MTK_PIN_IES_SMT_SPEC(_start, _end, _offset, _bit) \ + { \ + .start = _start, \ + .end = _end, \ + .bit = _bit, \ + .offset = _offset, \ + } + struct mtk_eint_offsets { const char *name; unsigned int stat; @@ -208,7 +233,7 @@ struct mtk_pinctrl_devdata { int (*spec_pull_set)(struct regmap *reg, unsigned int pin, unsigned char align, bool isup, unsigned int arg); int (*spec_ies_smt_set)(struct regmap *reg, unsigned int pin, - unsigned char align, int value); + unsigned char align, int value, enum pin_config_param arg); unsigned int dir_offset; unsigned int ies_offset; unsigned int smt_offset; @@ -251,4 +276,8 @@ int mtk_pctrl_spec_pull_set_samereg(struct regmap *regmap, unsigned int info_num, unsigned int pin, unsigned char align, bool isup, unsigned int r1r0); +int mtk_pconf_spec_set_ies_smt_range(struct regmap *regmap, + const struct mtk_pin_ies_smt_set *ies_smt_infos, unsigned int info_num, + unsigned int pin, unsigned char align, int value); + #endif /* __PINCTRL_MTK_COMMON_H */ |