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authorMika Westerberg <mika.westerberg@linux.intel.com>2015-10-20 16:53:05 +0300
committerThierry Reding <thierry.reding@gmail.com>2015-11-06 16:26:27 +0300
commit4e11f5acb25b0b8eb937c726ade319b988fe3664 (patch)
treeb9fb12fcf6ffc5c7c6f9fca7b58632c934425457 /drivers/pwm/pwm-lpss.h
parent912b8439041317a0562609ad892eeab9ba2f0cb2 (diff)
downloadlinux-4e11f5acb25b0b8eb937c726ade319b988fe3664.tar.xz
pwm: lpss: Add support for multiple PWMs
New Intel SoCs such as Broxton will have four PWMs per PCI (or ACPI) device. Each PWM has 1k of register space allocated from the parent device. Add support for this. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/pwm/pwm-lpss.h')
-rw-r--r--drivers/pwm/pwm-lpss.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/pwm/pwm-lpss.h b/drivers/pwm/pwm-lpss.h
index aa041bb1b67d..180438368e0a 100644
--- a/drivers/pwm/pwm-lpss.h
+++ b/drivers/pwm/pwm-lpss.h
@@ -20,6 +20,7 @@ struct pwm_lpss_chip;
struct pwm_lpss_boardinfo {
unsigned long clk_rate;
+ unsigned int npwm;
};
extern const struct pwm_lpss_boardinfo pwm_lpss_byt_info;